Commit 4f15a4e0 authored by Frieder Schrempf's avatar Frieder Schrempf Committed by Shawn Guo

ARM: dts: Add spi-[tx/rx]-bus-width for the FSL QSPI controller

We will move the FSL QSPI driver to the SPI framework soon. To
prepare and to make sure the full buswidth is used (as it is with
the current driver), let's add the right properties.
Signed-off-by: default avatarFrieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 00b79b07
......@@ -128,6 +128,8 @@ flash0: s25fl128s@0 {
#size-cells = <1>;
compatible = "spansion,s25fl128s", "jedec,spi-nor";
spi-max-frequency = <66000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
};
flash1: s25fl128s@2 {
......@@ -136,6 +138,8 @@ flash1: s25fl128s@2 {
#size-cells = <1>;
compatible = "spansion,s25fl128s", "jedec,spi-nor";
spi-max-frequency = <66000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
};
};
......
......@@ -113,6 +113,8 @@ flash0: n25q256a@0 {
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
reg = <0>;
};
......@@ -121,6 +123,8 @@ flash1: n25q256a@2 {
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
reg = <2>;
};
};
......
......@@ -217,6 +217,8 @@ flash0: n25q256a@0 {
#size-cells = <1>;
compatible = "micron,n25q256a";
spi-max-frequency = <29000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
reg = <0>;
};
};
......
......@@ -211,6 +211,8 @@ flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <20000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
reg = <0>;
partitions@0 {
......
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