Commit 50506fd0 authored by Linus Torvalds's avatar Linus Torvalds

Automerge

parents 8cd05eff efb941fa
...@@ -201,8 +201,10 @@ static ide_pci_device_t pci_chipsets[] __initdata = { ...@@ -201,8 +201,10 @@ static ide_pci_device_t pci_chipsets[] __initdata = {
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_1, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 }, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_1, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_9, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 }, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_9, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_8, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 }, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_8, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_9, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 }, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 }, {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_9, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
{PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 }, {PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1, pci_init_piix, ata66_piix, ide_init_piix, ide_dmacapable_piix, {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, ON_BOARD, 0, 0 },
#endif #endif
#ifdef CONFIG_BLK_DEV_VIA82CXXX #ifdef CONFIG_BLK_DEV_VIA82CXXX
......
...@@ -61,8 +61,8 @@ ...@@ -61,8 +61,8 @@
#define PIIX_UDMA_NONE 0x00 #define PIIX_UDMA_NONE 0x00
#define PIIX_UDMA_33 0x01 #define PIIX_UDMA_33 0x01
#define PIIX_UDMA_66 0x02 #define PIIX_UDMA_66 0x02
#define PIIX_UDMA_V66 0x03 #define PIIX_UDMA_100 0x03
#define PIIX_UDMA_100 0x04 #define PIIX_UDMA_133 0x04
#define PIIX_NO_SITRE 0x08 /* Chip doesn't have separate slave timing */ #define PIIX_NO_SITRE 0x08 /* Chip doesn't have separate slave timing */
#define PIIX_PINGPONG 0x10 /* Enable ping-pong buffers */ #define PIIX_PINGPONG 0x10 /* Enable ping-pong buffers */
#define PIIX_VICTORY 0x20 /* Efar Victory66 has a different UDMA setup */ #define PIIX_VICTORY 0x20 /* Efar Victory66 has a different UDMA setup */
...@@ -77,8 +77,10 @@ static struct piix_ide_chip { ...@@ -77,8 +77,10 @@ static struct piix_ide_chip {
unsigned short id; unsigned short id;
unsigned char flags; unsigned char flags;
} piix_ide_chips[] = { } piix_ide_chips[] = {
{ PCI_DEVICE_ID_INTEL_82801DB_9, PIIX_UDMA_133 | PIIX_PINGPONG }, /* Intel 82801DB ICH4 */
{ PCI_DEVICE_ID_INTEL_82801CA_11, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801CA ICH3 */ { PCI_DEVICE_ID_INTEL_82801CA_11, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801CA ICH3 */
{ PCI_DEVICE_ID_INTEL_82801CA_10, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801CAM ICH3-M */ { PCI_DEVICE_ID_INTEL_82801CA_10, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801CAM ICH3-M */
{ PCI_DEVICE_ID_INTEL_82801E_9, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801E C-ICH */
{ PCI_DEVICE_ID_INTEL_82801BA_9, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801BA ICH2 */ { PCI_DEVICE_ID_INTEL_82801BA_9, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801BA ICH2 */
{ PCI_DEVICE_ID_INTEL_82801BA_8, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801BAM ICH2-M */ { PCI_DEVICE_ID_INTEL_82801BA_8, PIIX_UDMA_100 | PIIX_PINGPONG }, /* Intel 82801BAM ICH2-M */
{ PCI_DEVICE_ID_INTEL_82801AB_1, PIIX_UDMA_33 | PIIX_PINGPONG }, /* Intel 82801AB ICH0 */ { PCI_DEVICE_ID_INTEL_82801AB_1, PIIX_UDMA_33 | PIIX_PINGPONG }, /* Intel 82801AB ICH0 */
...@@ -88,7 +90,7 @@ static struct piix_ide_chip { ...@@ -88,7 +90,7 @@ static struct piix_ide_chip {
{ PCI_DEVICE_ID_INTEL_82371AB, PIIX_UDMA_33 }, /* Intel 82371AB/EB PIIX4/4E */ { PCI_DEVICE_ID_INTEL_82371AB, PIIX_UDMA_33 }, /* Intel 82371AB/EB PIIX4/4E */
{ PCI_DEVICE_ID_INTEL_82371SB_1, PIIX_UDMA_NONE }, /* Intel 82371SB PIIX3 */ { PCI_DEVICE_ID_INTEL_82371SB_1, PIIX_UDMA_NONE }, /* Intel 82371SB PIIX3 */
{ PCI_DEVICE_ID_INTEL_82371FB_1, PIIX_UDMA_NONE | PIIX_NO_SITRE | PIIX_CHECK_REV }, /* Intel 82371FB PIIX */ { PCI_DEVICE_ID_INTEL_82371FB_1, PIIX_UDMA_NONE | PIIX_NO_SITRE | PIIX_CHECK_REV }, /* Intel 82371FB PIIX */
{ PCI_DEVICE_ID_EFAR_SLC90E66_1, PIIX_UDMA_V66 | PIIX_VICTORY }, /* Efar Victory66 */ { PCI_DEVICE_ID_EFAR_SLC90E66_1, PIIX_UDMA_66 | PIIX_VICTORY }, /* Efar Victory66 */
{ 0 } { 0 }
}; };
...@@ -97,7 +99,7 @@ static unsigned char piix_enabled; ...@@ -97,7 +99,7 @@ static unsigned char piix_enabled;
static unsigned int piix_80w; static unsigned int piix_80w;
static unsigned int piix_clock; static unsigned int piix_clock;
static char *piix_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA66", "UDMA100" }; static char *piix_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA133" };
/* /*
* PIIX/ICH /proc entry. * PIIX/ICH /proc entry.
...@@ -318,20 +320,19 @@ static int piix_set_drive(ide_drive_t *drive, unsigned char speed) ...@@ -318,20 +320,19 @@ static int piix_set_drive(ide_drive_t *drive, unsigned char speed)
{ {
ide_drive_t *peer = drive->channel->drives + (~drive->dn & 1); ide_drive_t *peer = drive->channel->drives + (~drive->dn & 1);
struct ata_timing t, p; struct ata_timing t, p;
int err, T, UT, umul; int err, T, UT, umul = 1;
if (speed != XFER_PIO_SLOW && speed != drive->current_speed) if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
if ((err = ide_config_drive_speed(drive, speed))) if ((err = ide_config_drive_speed(drive, speed)))
return err; return err;
umul = min((speed > XFER_UDMA_4) ? 4 : ((speed > XFER_UDMA_2) ? 2 : 1), if (speed > XFER_UDMA_2 && (piix_config->flags & PIIX_UDMA >= PIIX_UDMA_66))
piix_config->flags & PIIX_UDMA);
if (piix_config->flags & PIIX_VICTORY)
umul = 2; umul = 2;
if (speed > XFER_UDMA_4 && (piix_config->flags & PIIX_UDMA >= PIIX_UDMA_100))
umul = 4;
T = 1000000000 / piix_clock; T = 1000000000 / piix_clock;
UT = umul ? (T / umul) : 0; UT = T / umul;
ata_timing_compute(drive, speed, &t, T, UT); ata_timing_compute(drive, speed, &t, T, UT);
...@@ -388,7 +389,8 @@ int piix_dmaproc(ide_dma_action_t func, struct ata_device *drive, struct request ...@@ -388,7 +389,8 @@ int piix_dmaproc(ide_dma_action_t func, struct ata_device *drive, struct request
(piix_config->flags & PIIX_NODMA ? 0 : (XFER_SWDMA | XFER_MWDMA | (piix_config->flags & PIIX_NODMA ? 0 : (XFER_SWDMA | XFER_MWDMA |
(piix_config->flags & PIIX_UDMA ? XFER_UDMA : 0) | (piix_config->flags & PIIX_UDMA ? XFER_UDMA : 0) |
(w80 && (piix_config->flags & PIIX_UDMA) >= PIIX_UDMA_66 ? XFER_UDMA_66 : 0) | (w80 && (piix_config->flags & PIIX_UDMA) >= PIIX_UDMA_66 ? XFER_UDMA_66 : 0) |
(w80 && (piix_config->flags & PIIX_UDMA) >= PIIX_UDMA_100 ? XFER_UDMA_100 : 0)))); (w80 && (piix_config->flags & PIIX_UDMA) >= PIIX_UDMA_100 ? XFER_UDMA_100 : 0) |
(w80 && (piix_config->flags & PIIX_UDMA) >= PIIX_UDMA_133 ? XFER_UDMA_133 : 0))));
piix_set_drive(drive, speed); piix_set_drive(drive, speed);
...@@ -458,15 +460,17 @@ unsigned int __init pci_init_piix(struct pci_dev *dev, const char *name) ...@@ -458,15 +460,17 @@ unsigned int __init pci_init_piix(struct pci_dev *dev, const char *name)
switch (piix_config->flags & PIIX_UDMA) { switch (piix_config->flags & PIIX_UDMA) {
case PIIX_UDMA_66: case PIIX_UDMA_66:
if (piix->config && PIIX_VICTORY) {
pci_read_config_byte(dev, PIIX_IDESTAT, &t);
piix_80w = ((t & 2) ? 1 : 0) | ((t & 1) ? 2 : 0);
break;
}
case PIIX_UDMA_100: case PIIX_UDMA_100:
case PIIX_UDMA_133:
pci_read_config_dword(dev, PIIX_IDECFG, &u); pci_read_config_dword(dev, PIIX_IDECFG, &u);
piix_80w = ((u & 0x30) ? 1 : 0) | ((u & 0xc0) ? 2 : 0); piix_80w = ((u & 0x30) ? 1 : 0) | ((u & 0xc0) ? 2 : 0);
break; break;
case PIIX_UDMA_V66:
pci_read_config_byte(dev, PIIX_IDESTAT, &t);
piix_80w = ((t & 2) ? 1 : 0) | ((t & 1) ? 2 : 0);
break;
} }
/* /*
......
...@@ -5097,9 +5097,11 @@ ...@@ -5097,9 +5097,11 @@
244b 82820 820 (Camino 2) Chipset IDE U100 244b 82820 820 (Camino 2) Chipset IDE U100
244c 82820 820 (Camino 2) Chipset ISA Bridge (ICH2-M) 244c 82820 820 (Camino 2) Chipset ISA Bridge (ICH2-M)
244e 82820 820 (Camino 2) Chipset PCI 244e 82820 820 (Camino 2) Chipset PCI
245b 82801E C-ICH IDE
2485 AC'97 Audio Controller 2485 AC'97 Audio Controller
248a 82801CAM ICH3-M IDE 248a 82801CAM ICH3-M IDE
248b 82801CA ICH3 IDE 248b 82801CA ICH3 IDE
24cb 82801DB ICH4 IDE
2500 82820 820 (Camino) Chipset Host Bridge (MCH) 2500 82820 820 (Camino) Chipset Host Bridge (MCH)
1043 801c P3C-2000 system chipset 1043 801c P3C-2000 system chipset
2501 82820 820 (Camino) Chipset Host Bridge (MCH) 2501 82820 820 (Camino) Chipset Host Bridge (MCH)
......
...@@ -1631,15 +1631,6 @@ ...@@ -1631,15 +1631,6 @@
#define PCI_DEVICE_ID_INTEL_82380FB 0x124b #define PCI_DEVICE_ID_INTEL_82380FB 0x124b
#define PCI_DEVICE_ID_INTEL_82439 0x1250 #define PCI_DEVICE_ID_INTEL_82439 0x1250
#define PCI_DEVICE_ID_INTEL_80960_RP 0x1960 #define PCI_DEVICE_ID_INTEL_80960_RP 0x1960
#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
#define PCI_DEVICE_ID_INTEL_82437VX 0x7030
#define PCI_DEVICE_ID_INTEL_82439TX 0x7100
#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110
#define PCI_DEVICE_ID_INTEL_82371AB 0x7111
#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112
#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113
#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 #define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
#define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412 #define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412
...@@ -1666,6 +1657,7 @@ ...@@ -1666,6 +1657,7 @@
#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b #define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b
#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c #define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c
#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e #define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e
#define PCI_DEVICE_ID_INTEL_82801E_9 0x245b
#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480 #define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480
#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482 #define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482
#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483 #define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483
...@@ -1676,7 +1668,17 @@ ...@@ -1676,7 +1668,17 @@
#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a #define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a
#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b #define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b
#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c #define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c
#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24cb
#define PCI_DEVICE_ID_INTEL_80310 0x530d #define PCI_DEVICE_ID_INTEL_80310 0x530d
#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
#define PCI_DEVICE_ID_INTEL_82437VX 0x7030
#define PCI_DEVICE_ID_INTEL_82439TX 0x7100
#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110
#define PCI_DEVICE_ID_INTEL_82371AB 0x7111
#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112
#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113
#define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120 #define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120
#define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121 #define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121
#define PCI_DEVICE_ID_INTEL_82810_MC3 0x7122 #define PCI_DEVICE_ID_INTEL_82810_MC3 0x7122
......
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