Commit 51c6ab13 authored by Jassi Brar's avatar Jassi Brar Committed by Mark Brown

ASoC: S3C: I2Sv2: Reject immidiate register value

Towards generalizing CPU driver interface, do not accept direct field
values for the BCLK and RCLK.
The machine driver should simply request the FS-multiple and not provide
the value to be set in divide field of IISMOD.

[Confirmed by Jassi that no existing machine drivers are affected --
broonie]
Signed-off-by: default avatarJassi Brar <jassi.brar@samsung.com>
Acked-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent fa6231e1
...@@ -463,29 +463,25 @@ static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai, ...@@ -463,29 +463,25 @@ static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai,
switch (div_id) { switch (div_id) {
case S3C_I2SV2_DIV_BCLK: case S3C_I2SV2_DIV_BCLK:
if (div > 3) { switch (div) {
/* convert value to bit field */ case 16:
div = S3C2412_IISMOD_BCLK_16FS;
switch (div) { break;
case 16:
div = S3C2412_IISMOD_BCLK_16FS;
break;
case 32: case 32:
div = S3C2412_IISMOD_BCLK_32FS; div = S3C2412_IISMOD_BCLK_32FS;
break; break;
case 24: case 24:
div = S3C2412_IISMOD_BCLK_24FS; div = S3C2412_IISMOD_BCLK_24FS;
break; break;
case 48: case 48:
div = S3C2412_IISMOD_BCLK_48FS; div = S3C2412_IISMOD_BCLK_48FS;
break; break;
default: default:
return -EINVAL; return -EINVAL;
}
} }
reg = readl(i2s->regs + S3C2412_IISMOD); reg = readl(i2s->regs + S3C2412_IISMOD);
...@@ -496,29 +492,25 @@ static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai, ...@@ -496,29 +492,25 @@ static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai,
break; break;
case S3C_I2SV2_DIV_RCLK: case S3C_I2SV2_DIV_RCLK:
if (div > 3) { switch (div) {
/* convert value to bit field */ case 256:
div = S3C2412_IISMOD_RCLK_256FS;
switch (div) { break;
case 256:
div = S3C2412_IISMOD_RCLK_256FS;
break;
case 384: case 384:
div = S3C2412_IISMOD_RCLK_384FS; div = S3C2412_IISMOD_RCLK_384FS;
break; break;
case 512: case 512:
div = S3C2412_IISMOD_RCLK_512FS; div = S3C2412_IISMOD_RCLK_512FS;
break; break;
case 768: case 768:
div = S3C2412_IISMOD_RCLK_768FS; div = S3C2412_IISMOD_RCLK_768FS;
break; break;
default: default:
return -EINVAL; return -EINVAL;
}
} }
reg = readl(i2s->regs + S3C2412_IISMOD); reg = readl(i2s->regs + S3C2412_IISMOD);
......
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