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Commit 53f2ade4 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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ARM: dts: sti: adjust whitespace around '=' 

Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment.  No functional
changes (same DTB).
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarPatrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20220526203632.831039-1-krzysztof.kozlowski@linaro.org
parent 282a4b9e
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Showing with 95 additions and 95 deletions
arch/arm/boot/dts/stih407-family.dtsi
View file @ 53f2ade4
......@@ -137,8 +137,8 @@ picophyreset: picophyreset-controller {
};
irq-syscfg {
compatible = "st,stih407-irq-syscfg";
st,syscfg = <&syscfg_core>;
compatible = "st,stih407-irq-syscfg";
st,syscfg = <&syscfg_core>;
st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
<ST_IRQ_SYSCFG_PMU_1>;
st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
......@@ -157,8 +157,8 @@ usb2_picophy0: phy1 {
miphy28lp_phy: miphy28lp {
compatible = "st,miphy28lp-phy";
st,syscfg = <&syscfg_core>;
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
phy_port0: port@9b22000 {
......@@ -208,26 +208,26 @@ phy_port2: port@8f95000 {
};
st231_gp0: st231-gp0 {
compatible = "st,st231-rproc";
memory-region = <&gp0_reserved>;
resets = <&softreset STIH407_ST231_GP0_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x22c>;
compatible = "st,st231-rproc";
memory-region = <&gp0_reserved>;
resets = <&softreset STIH407_ST231_GP0_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x22c>;
#mbox-cells = <1>;
mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>;
};
st231_delta: st231-delta {
compatible = "st,st231-rproc";
memory-region = <&delta_reserved>;
resets = <&softreset STIH407_ST231_DMU_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x224>;
compatible = "st,st231-rproc";
memory-region = <&delta_reserved>;
resets = <&softreset STIH407_ST231_DMU_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x224>;
#mbox-cells = <1>;
mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>;
......@@ -710,78 +710,78 @@ sata1: sata@9b28000 {
st_dwc3: dwc3@8f94000 {
compatible = "st,stih407-dwc3";
reg = <0x08f94000 0x1000>, <0x110 0x4>;
reg-names = "reg-glue", "syscfg-reg";
st,syscfg = <&syscfg_core>;
resets = <&powerdown STIH407_USB3_POWERDOWN>,
<&softreset STIH407_MIPHY2_SOFTRESET>;
reset-names = "powerdown", "softreset";
#address-cells = <1>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>;
compatible = "st,stih407-dwc3";
reg = <0x08f94000 0x1000>, <0x110 0x4>;
reg-names = "reg-glue", "syscfg-reg";
st,syscfg = <&syscfg_core>;
resets = <&powerdown STIH407_USB3_POWERDOWN>,
<&softreset STIH407_MIPHY2_SOFTRESET>;
reset-names = "powerdown", "softreset";
#address-cells = <1>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>;
ranges;
status = "disabled";
dwc3: dwc3@9900000 {
compatible = "snps,dwc3";
reg = <0x09900000 0x100000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
phy-names = "usb2-phy", "usb3-phy";
phys = <&usb2_picophy0>,
<&phy_port2 PHY_TYPE_USB3>;
compatible = "snps,dwc3";
reg = <0x09900000 0x100000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
phy-names = "usb2-phy", "usb3-phy";
phys = <&usb2_picophy0>,
<&phy_port2 PHY_TYPE_USB3>;
snps,dis_u3_susphy_quirk;
};
};
/* COMMS PWM Module */
pwm0: pwm@9810000 {
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9810000 0x68>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9810000 0x68>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <1>;
status = "disabled";
status = "disabled";
};
/* SBC PWM Module */
pwm1: pwm@9510000 {
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9510000 0x68>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_chan0_default
&pinctrl_pwm1_chan1_default
&pinctrl_pwm1_chan2_default
&pinctrl_pwm1_chan3_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9510000 0x68>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_chan0_default
&pinctrl_pwm1_chan1_default
&pinctrl_pwm1_chan2_default
&pinctrl_pwm1_chan3_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <4>;
status = "disabled";
status = "disabled";
};
rng10: rng@8a89000 {
compatible = "st,rng";
reg = <0x08a89000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
compatible = "st,rng";
reg = <0x08a89000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
};
rng11: rng@8a8a000 {
compatible = "st,rng";
reg = <0x08a8a000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
compatible = "st,rng";
reg = <0x08a8a000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
};
ethernet0: dwmac@9630000 {
......@@ -812,36 +812,36 @@ ethernet0: dwmac@9630000 {
};
mailbox0: mailbox@8f00000 {
compatible = "st,stih407-mailbox";
reg = <0x8f00000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
mbox-name = "a9";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f00000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
mbox-name = "a9";
status = "okay";
};
mailbox1: mailbox@8f01000 {
compatible = "st,stih407-mailbox";
reg = <0x8f01000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_1";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f01000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_1";
status = "okay";
};
mailbox2: mailbox@8f02000 {
compatible = "st,stih407-mailbox";
reg = <0x8f02000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_0";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f02000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_0";
status = "okay";
};
mailbox3: mailbox@8f03000 {
compatible = "st,stih407-mailbox";
reg = <0x8f03000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_audio_video";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f03000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_audio_video";
status = "okay";
};
/* fdma audio */
......@@ -913,7 +913,7 @@ sti_uni_player0: sti-uni-player@8d80000 {
dmas = <&fdma0 2 0 1>;
dma-names = "tx";
status = "disabled";
status = "disabled";
};
sti_uni_player1: sti-uni-player@8d81000 {
......
arch/arm/boot/dts/stih407.dtsi
View file @ 53f2ade4
......@@ -13,7 +13,7 @@ sti-display-subsystem@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
assigned-clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
<&clk_s_c0_pll1 0>,
<&clk_s_c0_flexgen CLK_COMPO_DVP>,
......@@ -106,7 +106,7 @@ sti_hdmi: sti-hdmi@8d04000 {
reg-names = "hdmi-reg";
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq";
interrupt-names = "irq";
clock-names = "pix",
"tmds",
"phy",
......
arch/arm/boot/dts/stih410.dtsi
View file @ 53f2ade4
......@@ -105,7 +105,7 @@ sti-display-subsystem@0 {
#size-cells = <1>;
reg = <0 0>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
assigned-clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
<&clk_s_c0_pll1 0>,
<&clk_s_c0_flexgen CLK_COMPO_DVP>,
......@@ -198,7 +198,7 @@ sti_hdmi: sti-hdmi@8d04000 {
reg-names = "hdmi-reg";
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq";
interrupt-names = "irq";
clock-names = "pix",
"tmds",
"phy",
......
arch/arm/boot/dts/stihxxx-b2120.dtsi
View file @ 53f2ade4
......@@ -175,11 +175,11 @@ demux@8a20000 {
/* tsin0 is TSA on NIMA */
tsin0: port {
tsin-num = <0>;
tsin-num = <0>;
serial-not-parallel;
i2c-bus = <&ssc2>;
reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
dvb-card = <STV0367_TDA18212_NIMA_1>;
i2c-bus = <&ssc2>;
reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
dvb-card = <STV0367_TDA18212_NIMA_1>;
};
};
......
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