Commit 5563ae9b authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'riscv-for-linus-4.19-mw1' of...

Merge tag 'riscv-for-linus-4.19-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux

Pull RISC-V fixes from Palmer Dabbelt:
 "This contains a pair of fixes to the RISC-V port:

   - The removal of our compat.h, which didn't do anything.

   - Fixes to sys_riscv_flush_icache to ensure it actually shows up.

     We're going to just call this a bug in the ABI, as it was always
     supposed to be there.

  I've given these a simple build+boot test, both individually and as
  the actual tag"

* tag 'riscv-for-linus-4.19-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
  riscv: Delete asm/compat.h
  RISC-V: Don't use a global include guard for uapi/asm/syscalls.h
  RISC-V: Define sys_riscv_flush_icache when SMP=n
parents 452938cb 7a3b1bf7
generic-y += bugs.h generic-y += bugs.h
generic-y += cacheflush.h generic-y += cacheflush.h
generic-y += checksum.h generic-y += checksum.h
generic-y += compat.h
generic-y += cputime.h generic-y += cputime.h
generic-y += device.h generic-y += device.h
generic-y += div64.h generic-y += div64.h
......
/*
* Copyright (C) 2012 ARM Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __ASM_COMPAT_H
#define __ASM_COMPAT_H
#ifdef CONFIG_COMPAT
#if defined(CONFIG_64BIT)
#define COMPAT_UTS_MACHINE "riscv64\0\0"
#elif defined(CONFIG_32BIT)
#define COMPAT_UTS_MACHINE "riscv32\0\0"
#else
#error "Unknown RISC-V base ISA"
#endif
#endif /*CONFIG_COMPAT*/
#endif /*__ASM_COMPAT_H*/
...@@ -11,6 +11,11 @@ ...@@ -11,6 +11,11 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
/*
* There is explicitly no include guard here because this file is expected to
* be included multiple times. See uapi/asm/syscalls.h for more info.
*/
#define __ARCH_WANT_SYS_CLONE #define __ARCH_WANT_SYS_CLONE
#include <uapi/asm/unistd.h> #include <uapi/asm/unistd.h>
#include <uapi/asm/syscalls.h> #include <uapi/asm/syscalls.h>
...@@ -38,8 +38,6 @@ struct vdso_data { ...@@ -38,8 +38,6 @@ struct vdso_data {
(void __user *)((unsigned long)(base) + __vdso_##name); \ (void __user *)((unsigned long)(base) + __vdso_##name); \
}) })
#ifdef CONFIG_SMP
asmlinkage long sys_riscv_flush_icache(uintptr_t, uintptr_t, uintptr_t); asmlinkage long sys_riscv_flush_icache(uintptr_t, uintptr_t, uintptr_t);
#endif
#endif /* _ASM_RISCV_VDSO_H */ #endif /* _ASM_RISCV_VDSO_H */
/* SPDX-License-Identifier: GPL-2.0 */ /* SPDX-License-Identifier: GPL-2.0 */
/* /*
* Copyright (C) 2017 SiFive * Copyright (C) 2017-2018 SiFive
*/ */
#ifndef _ASM__UAPI__SYSCALLS_H /*
#define _ASM__UAPI__SYSCALLS_H * There is explicitly no include guard here because this file is expected to
* be included multiple times in order to define the syscall macros via
* __SYSCALL.
*/
/* /*
* Allows the instruction cache to be flushed from userspace. Despite RISC-V * Allows the instruction cache to be flushed from userspace. Despite RISC-V
...@@ -20,7 +23,7 @@ ...@@ -20,7 +23,7 @@
* caller. We don't currently do anything with the address range, that's just * caller. We don't currently do anything with the address range, that's just
* in there for forwards compatibility. * in there for forwards compatibility.
*/ */
#ifndef __NR_riscv_flush_icache
#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15) #define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
#endif #endif
__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
...@@ -48,7 +48,6 @@ SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len, ...@@ -48,7 +48,6 @@ SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
} }
#endif /* !CONFIG_64BIT */ #endif /* !CONFIG_64BIT */
#ifdef CONFIG_SMP
/* /*
* Allows the instruction cache to be flushed from userspace. Despite RISC-V * Allows the instruction cache to be flushed from userspace. Despite RISC-V
* having a direct 'fence.i' instruction available to userspace (which we * having a direct 'fence.i' instruction available to userspace (which we
...@@ -66,15 +65,24 @@ SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len, ...@@ -66,15 +65,24 @@ SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
SYSCALL_DEFINE3(riscv_flush_icache, uintptr_t, start, uintptr_t, end, SYSCALL_DEFINE3(riscv_flush_icache, uintptr_t, start, uintptr_t, end,
uintptr_t, flags) uintptr_t, flags)
{ {
#ifdef CONFIG_SMP
struct mm_struct *mm = current->mm; struct mm_struct *mm = current->mm;
bool local = (flags & SYS_RISCV_FLUSH_ICACHE_LOCAL) != 0; bool local = (flags & SYS_RISCV_FLUSH_ICACHE_LOCAL) != 0;
#endif
/* Check the reserved flags. */ /* Check the reserved flags. */
if (unlikely(flags & ~SYS_RISCV_FLUSH_ICACHE_ALL)) if (unlikely(flags & ~SYS_RISCV_FLUSH_ICACHE_ALL))
return -EINVAL; return -EINVAL;
/*
* Without CONFIG_SMP flush_icache_mm is a just a flush_icache_all(),
* which generates unused variable warnings all over this function.
*/
#ifdef CONFIG_SMP
flush_icache_mm(mm, local); flush_icache_mm(mm, local);
#else
flush_icache_all();
#endif
return 0; return 0;
} }
#endif
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