Commit 59ab4ee0 authored by Cong Liu's avatar Cong Liu Committed by Gerd Hoffmann

drm/qxl: fix qxl can't use in arm64

qxl use ioremap to map ram_header and rom, in the arm64 implementation,
the device is mapped as DEVICE_nGnRE, it can not support unaligned
access. and qxl is a virtual device, it can be treated more like RAM
than actual MMIO registers. use ioremap_wc() replace it.
Signed-off-by: default avatarCong Liu <liucong2@kylinos.cn>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20220324104928.2959545-1-liucong2@kylinos.cnSigned-off-by: default avatarGerd Hoffmann <kraxel@redhat.com>
parent ec3cbb30
......@@ -165,7 +165,7 @@ int qxl_device_init(struct qxl_device *qdev,
(int)qdev->surfaceram_size / 1024,
(sb == 4) ? "64bit" : "32bit");
qdev->rom = ioremap(qdev->rom_base, qdev->rom_size);
qdev->rom = ioremap_wc(qdev->rom_base, qdev->rom_size);
if (!qdev->rom) {
pr_err("Unable to ioremap ROM\n");
r = -ENOMEM;
......@@ -183,7 +183,7 @@ int qxl_device_init(struct qxl_device *qdev,
goto rom_unmap;
}
qdev->ram_header = ioremap(qdev->vram_base +
qdev->ram_header = ioremap_wc(qdev->vram_base +
qdev->rom->ram_header_offset,
sizeof(*qdev->ram_header));
if (!qdev->ram_header) {
......
......@@ -82,13 +82,13 @@ int qxl_ttm_io_mem_reserve(struct ttm_device *bdev,
case TTM_PL_VRAM:
mem->bus.is_iomem = true;
mem->bus.offset = (mem->start << PAGE_SHIFT) + qdev->vram_base;
mem->bus.caching = ttm_cached;
mem->bus.caching = ttm_write_combined;
break;
case TTM_PL_PRIV:
mem->bus.is_iomem = true;
mem->bus.offset = (mem->start << PAGE_SHIFT) +
qdev->surfaceram_base;
mem->bus.caching = ttm_cached;
mem->bus.caching = ttm_write_combined;
break;
default:
return -EINVAL;
......
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