Commit 59f20f5a authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/pp: switch smu callback type for get_argument()

return a uint32_t rather than an int to properly reflect
what the function does.
Reviewed-by: default avatarRex Zhu <rezhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ce7577a2
...@@ -194,7 +194,7 @@ struct pp_smumgr_func { ...@@ -194,7 +194,7 @@ struct pp_smumgr_func {
int (*request_smu_load_fw)(struct pp_hwmgr *hwmgr); int (*request_smu_load_fw)(struct pp_hwmgr *hwmgr);
int (*request_smu_load_specific_fw)(struct pp_hwmgr *hwmgr, int (*request_smu_load_specific_fw)(struct pp_hwmgr *hwmgr,
uint32_t firmware); uint32_t firmware);
int (*get_argument)(struct pp_hwmgr *hwmgr); uint32_t (*get_argument)(struct pp_hwmgr *hwmgr);
int (*send_msg_to_smc)(struct pp_hwmgr *hwmgr, uint16_t msg); int (*send_msg_to_smc)(struct pp_hwmgr *hwmgr, uint16_t msg);
int (*send_msg_to_smc_with_parameter)(struct pp_hwmgr *hwmgr, int (*send_msg_to_smc_with_parameter)(struct pp_hwmgr *hwmgr,
uint16_t msg, uint32_t parameter); uint16_t msg, uint32_t parameter);
......
...@@ -80,7 +80,7 @@ enum SMU10_TABLE_ID { ...@@ -80,7 +80,7 @@ enum SMU10_TABLE_ID {
SMU10_CLOCKTABLE, SMU10_CLOCKTABLE,
}; };
extern int smum_get_argument(struct pp_hwmgr *hwmgr); extern uint32_t smum_get_argument(struct pp_hwmgr *hwmgr);
extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table); extern int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table);
......
...@@ -68,7 +68,7 @@ static int smu10_send_msg_to_smc_without_waiting(struct pp_hwmgr *hwmgr, ...@@ -68,7 +68,7 @@ static int smu10_send_msg_to_smc_without_waiting(struct pp_hwmgr *hwmgr,
return 0; return 0;
} }
static int smu10_read_arg_from_smc(struct pp_hwmgr *hwmgr) static uint32_t smu10_read_arg_from_smc(struct pp_hwmgr *hwmgr)
{ {
struct amdgpu_device *adev = hwmgr->adev; struct amdgpu_device *adev = hwmgr->adev;
......
...@@ -52,10 +52,10 @@ static const enum smu8_scratch_entry firmware_list[] = { ...@@ -52,10 +52,10 @@ static const enum smu8_scratch_entry firmware_list[] = {
SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_G, SMU8_SCRATCH_ENTRY_UCODE_ID_RLC_G,
}; };
static int smu8_get_argument(struct pp_hwmgr *hwmgr) static uint32_t smu8_get_argument(struct pp_hwmgr *hwmgr)
{ {
if (hwmgr == NULL || hwmgr->device == NULL) if (hwmgr == NULL || hwmgr->device == NULL)
return -EINVAL; return 0;
return cgs_read_register(hwmgr->device, return cgs_read_register(hwmgr->device,
mmSMU_MP1_SRBM2P_ARG_0); mmSMU_MP1_SRBM2P_ARG_0);
......
...@@ -142,7 +142,7 @@ int smu9_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, ...@@ -142,7 +142,7 @@ int smu9_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
return 0; return 0;
} }
int smu9_get_argument(struct pp_hwmgr *hwmgr) uint32_t smu9_get_argument(struct pp_hwmgr *hwmgr)
{ {
struct amdgpu_device *adev = hwmgr->adev; struct amdgpu_device *adev = hwmgr->adev;
......
...@@ -27,6 +27,6 @@ bool smu9_is_smc_ram_running(struct pp_hwmgr *hwmgr); ...@@ -27,6 +27,6 @@ bool smu9_is_smc_ram_running(struct pp_hwmgr *hwmgr);
int smu9_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg); int smu9_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
int smu9_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, int smu9_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
uint16_t msg, uint32_t parameter); uint16_t msg, uint32_t parameter);
int smu9_get_argument(struct pp_hwmgr *hwmgr); uint32_t smu9_get_argument(struct pp_hwmgr *hwmgr);
#endif #endif
...@@ -96,7 +96,7 @@ int smum_process_firmware_header(struct pp_hwmgr *hwmgr) ...@@ -96,7 +96,7 @@ int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
return 0; return 0;
} }
int smum_get_argument(struct pp_hwmgr *hwmgr) uint32_t smum_get_argument(struct pp_hwmgr *hwmgr)
{ {
if (NULL != hwmgr->smumgr_funcs->get_argument) if (NULL != hwmgr->smumgr_funcs->get_argument)
return hwmgr->smumgr_funcs->get_argument(hwmgr); return hwmgr->smumgr_funcs->get_argument(hwmgr);
......
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