Commit 60b1ae0c authored by Takashi Iwai's avatar Takashi Iwai

Merge branch 'fix/asoc' into for-linus

parents 0a2d31b6 8c285645
VERSION = 3
PATCHLEVEL = 0
PATCHLEVEL = 1
SUBLEVEL = 0
EXTRAVERSION =
EXTRAVERSION = -rc1
NAME = Sneaky Weasel
# *DOCUMENTATION*
......
......@@ -112,9 +112,6 @@ EXPORT_SYMBOL(__put_user_4);
EXPORT_SYMBOL(__put_user_8);
#endif
/* crypto hash */
EXPORT_SYMBOL(sha_transform);
/* gcc lib functions */
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__ashrdi3);
......
......@@ -12,7 +12,7 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
strchr.o strrchr.o \
testchangebit.o testclearbit.o testsetbit.o \
ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
ucmpdi2.o lib1funcs.o div64.o sha1.o \
ucmpdi2.o lib1funcs.o div64.o \
io-readsb.o io-writesb.o io-readsl.o io-writesl.o
mmu-y := clear_user.o copy_page.o getuser.o putuser.o
......
/*
* linux/arch/arm/lib/sha1.S
*
* SHA transform optimized for ARM
*
* Copyright: (C) 2005 by Nicolas Pitre <nico@fluxnic.net>
* Created: September 17, 2005
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* The reference implementation for this code is linux/lib/sha1.c
*/
#include <linux/linkage.h>
.text
/*
* void sha_transform(__u32 *digest, const char *in, __u32 *W)
*
* Note: the "in" ptr may be unaligned.
*/
ENTRY(sha_transform)
stmfd sp!, {r4 - r8, lr}
@ for (i = 0; i < 16; i++)
@ W[i] = be32_to_cpu(in[i]);
#ifdef __ARMEB__
mov r4, r0
mov r0, r2
mov r2, #64
bl memcpy
mov r2, r0
mov r0, r4
#else
mov r3, r2
mov lr, #16
1: ldrb r4, [r1], #1
ldrb r5, [r1], #1
ldrb r6, [r1], #1
ldrb r7, [r1], #1
subs lr, lr, #1
orr r5, r5, r4, lsl #8
orr r6, r6, r5, lsl #8
orr r7, r7, r6, lsl #8
str r7, [r3], #4
bne 1b
#endif
@ for (i = 0; i < 64; i++)
@ W[i+16] = ror(W[i+13] ^ W[i+8] ^ W[i+2] ^ W[i], 31);
sub r3, r2, #4
mov lr, #64
2: ldr r4, [r3, #4]!
subs lr, lr, #1
ldr r5, [r3, #8]
ldr r6, [r3, #32]
ldr r7, [r3, #52]
eor r4, r4, r5
eor r4, r4, r6
eor r4, r4, r7
mov r4, r4, ror #31
str r4, [r3, #64]
bne 2b
/*
* The SHA functions are:
*
* f1(B,C,D) = (D ^ (B & (C ^ D)))
* f2(B,C,D) = (B ^ C ^ D)
* f3(B,C,D) = ((B & C) | (D & (B | C)))
*
* Then the sub-blocks are processed as follows:
*
* A' = ror(A, 27) + f(B,C,D) + E + K + *W++
* B' = A
* C' = ror(B, 2)
* D' = C
* E' = D
*
* We therefore unroll each loop 5 times to avoid register shuffling.
* Also the ror for C (and also D and E which are successivelyderived
* from it) is applied in place to cut on an additional mov insn for
* each round.
*/
.macro sha_f1, A, B, C, D, E
ldr r3, [r2], #4
eor ip, \C, \D
add \E, r1, \E, ror #2
and ip, \B, ip, ror #2
add \E, \E, \A, ror #27
eor ip, ip, \D, ror #2
add \E, \E, r3
add \E, \E, ip
.endm
.macro sha_f2, A, B, C, D, E
ldr r3, [r2], #4
add \E, r1, \E, ror #2
eor ip, \B, \C, ror #2
add \E, \E, \A, ror #27
eor ip, ip, \D, ror #2
add \E, \E, r3
add \E, \E, ip
.endm
.macro sha_f3, A, B, C, D, E
ldr r3, [r2], #4
add \E, r1, \E, ror #2
orr ip, \B, \C, ror #2
add \E, \E, \A, ror #27
and ip, ip, \D, ror #2
add \E, \E, r3
and r3, \B, \C, ror #2
orr ip, ip, r3
add \E, \E, ip
.endm
ldmia r0, {r4 - r8}
mov lr, #4
ldr r1, .L_sha_K + 0
/* adjust initial values */
mov r6, r6, ror #30
mov r7, r7, ror #30
mov r8, r8, ror #30
3: subs lr, lr, #1
sha_f1 r4, r5, r6, r7, r8
sha_f1 r8, r4, r5, r6, r7
sha_f1 r7, r8, r4, r5, r6
sha_f1 r6, r7, r8, r4, r5
sha_f1 r5, r6, r7, r8, r4
bne 3b
ldr r1, .L_sha_K + 4
mov lr, #4
4: subs lr, lr, #1
sha_f2 r4, r5, r6, r7, r8
sha_f2 r8, r4, r5, r6, r7
sha_f2 r7, r8, r4, r5, r6
sha_f2 r6, r7, r8, r4, r5
sha_f2 r5, r6, r7, r8, r4
bne 4b
ldr r1, .L_sha_K + 8
mov lr, #4
5: subs lr, lr, #1
sha_f3 r4, r5, r6, r7, r8
sha_f3 r8, r4, r5, r6, r7
sha_f3 r7, r8, r4, r5, r6
sha_f3 r6, r7, r8, r4, r5
sha_f3 r5, r6, r7, r8, r4
bne 5b
ldr r1, .L_sha_K + 12
mov lr, #4
6: subs lr, lr, #1
sha_f2 r4, r5, r6, r7, r8
sha_f2 r8, r4, r5, r6, r7
sha_f2 r7, r8, r4, r5, r6
sha_f2 r6, r7, r8, r4, r5
sha_f2 r5, r6, r7, r8, r4
bne 6b
ldmia r0, {r1, r2, r3, ip, lr}
add r4, r1, r4
add r5, r2, r5
add r6, r3, r6, ror #2
add r7, ip, r7, ror #2
add r8, lr, r8, ror #2
stmia r0, {r4 - r8}
ldmfd sp!, {r4 - r8, pc}
ENDPROC(sha_transform)
.align 2
.L_sha_K:
.word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
/*
* void sha_init(__u32 *buf)
*/
.align 2
.L_sha_initial_digest:
.word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0
ENTRY(sha_init)
str lr, [sp, #-4]!
adr r1, .L_sha_initial_digest
ldmia r1, {r1, r2, r3, ip, lr}
stmia r0, {r1, r2, r3, ip, lr}
ldr pc, [sp], #4
ENDPROC(sha_init)
......@@ -65,7 +65,7 @@
#include <plat/iic.h>
#include <plat/pm.h>
#include <sound/wm8915.h>
#include <sound/wm8996.h>
#include <sound/wm8962.h>
#include <sound/wm9081.h>
......@@ -614,7 +614,7 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
.disable_touch = true,
};
static struct wm8915_retune_mobile_config wm8915_retune[] = {
static struct wm8996_retune_mobile_config wm8996_retune[] = {
{
.name = "Sub LPF",
.rate = 48000,
......@@ -635,12 +635,12 @@ static struct wm8915_retune_mobile_config wm8915_retune[] = {
},
};
static struct wm8915_pdata wm8915_pdata __initdata = {
static struct wm8996_pdata wm8996_pdata __initdata = {
.ldo_ena = S3C64XX_GPN(7),
.gpio_base = CODEC_GPIO_BASE,
.micdet_def = 1,
.inl_mode = WM8915_DIFFERRENTIAL_1,
.inr_mode = WM8915_DIFFERRENTIAL_1,
.inl_mode = WM8996_DIFFERRENTIAL_1,
.inr_mode = WM8996_DIFFERRENTIAL_1,
.irq_flags = IRQF_TRIGGER_RISING,
......@@ -652,8 +652,8 @@ static struct wm8915_pdata wm8915_pdata __initdata = {
0x020e, /* GPIO5 == CLKOUT */
},
.retune_mobile_cfgs = wm8915_retune,
.num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
.retune_mobile_cfgs = wm8996_retune,
.num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
};
static struct wm8962_pdata wm8962_pdata __initdata = {
......@@ -679,8 +679,8 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
.platform_data = &glenfarclas_pmic_pdata },
{ I2C_BOARD_INFO("wm1250-ev1", 0x27) },
{ I2C_BOARD_INFO("wm8915", 0x1a),
.platform_data = &wm8915_pdata,
{ I2C_BOARD_INFO("wm8996", 0x1a),
.platform_data = &wm8996_pdata,
.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
},
{ I2C_BOARD_INFO("wm9081", 0x6c),
......
......@@ -1618,18 +1618,20 @@ static void ktsb_phys_patch(void)
{
extern unsigned int __swapper_tsb_phys_patch;
extern unsigned int __swapper_tsb_phys_patch_end;
extern unsigned int __swapper_4m_tsb_phys_patch;
extern unsigned int __swapper_4m_tsb_phys_patch_end;
unsigned long ktsb_pa;
ktsb_pa = kern_base + ((unsigned long)&swapper_tsb[0] - KERNBASE);
patch_one_ktsb_phys(&__swapper_tsb_phys_patch,
&__swapper_tsb_phys_patch_end, ktsb_pa);
#ifndef CONFIG_DEBUG_PAGEALLOC
{
extern unsigned int __swapper_4m_tsb_phys_patch;
extern unsigned int __swapper_4m_tsb_phys_patch_end;
ktsb_pa = (kern_base +
((unsigned long)&swapper_4m_tsb[0] - KERNBASE));
patch_one_ktsb_phys(&__swapper_4m_tsb_phys_patch,
&__swapper_4m_tsb_phys_patch_end, ktsb_pa);
}
#endif
}
......
......@@ -1889,7 +1889,7 @@ static int __devinit sci_init_single(struct platform_device *dev,
if (p->regtype == SCIx_PROBE_REGTYPE) {
ret = sci_probe_regmap(p);
if (unlikely(!ret))
if (unlikely(ret))
return ret;
}
......
......@@ -186,7 +186,7 @@ static int check_acl(struct inode *inode, int mask)
/* no ->get_acl() calls in RCU mode... */
if (acl == ACL_NOT_CACHED)
return -ECHILD;
return posix_acl_permission(inode, acl, mask);
return posix_acl_permission(inode, acl, mask & ~MAY_NOT_BLOCK);
}
acl = get_cached_acl(inode, ACL_TYPE_ACCESS);
......@@ -1267,7 +1267,7 @@ static void terminate_walk(struct nameidata *nd)
* so we keep a cache of "no, this doesn't need follow_link"
* for the common case.
*/
static inline int do_follow_link(struct inode *inode, int follow)
static inline int should_follow_link(struct inode *inode, int follow)
{
if (unlikely(!(inode->i_opflags & IOP_NOFOLLOW))) {
if (likely(inode->i_op->follow_link))
......@@ -1303,7 +1303,7 @@ static inline int walk_component(struct nameidata *nd, struct path *path,
terminate_walk(nd);
return -ENOENT;
}
if (do_follow_link(inode, follow)) {
if (should_follow_link(inode, follow)) {
if (nd->flags & LOOKUP_RCU) {
if (unlikely(unlazy_walk(nd, path->dentry))) {
terminate_walk(nd);
......
......@@ -265,10 +265,11 @@ static inline void put_cred(const struct cred *_cred)
/**
* current_cred - Access the current task's subjective credentials
*
* Access the subjective credentials of the current task.
* Access the subjective credentials of the current task. RCU-safe,
* since nobody else can modify it.
*/
#define current_cred() \
(current->cred)
(*(__force struct cred **)&current->cred)
/**
* __task_cred - Access a task's objective credentials
......@@ -307,7 +308,7 @@ static inline void put_cred(const struct cred *_cred)
({ \
struct user_struct *__u; \
struct cred *__cred; \
__cred = (struct cred *) current_cred(); \
__cred = current_cred(); \
__u = get_uid(__cred->user); \
__u; \
})
......@@ -322,7 +323,7 @@ static inline void put_cred(const struct cred *_cred)
({ \
struct group_info *__groups; \
struct cred *__cred; \
__cred = (struct cred *) current_cred(); \
__cred = current_cred(); \
__groups = get_group_info(__cred->group_info); \
__groups; \
})
......@@ -341,7 +342,7 @@ static inline void put_cred(const struct cred *_cred)
#define current_cred_xxx(xxx) \
({ \
current->cred->xxx; \
current_cred()->xxx; \
})
#define current_uid() (current_cred_xxx(uid))
......
/*
* linux/sound/wm8915.h -- Platform data for WM8915
* linux/sound/wm8996.h -- Platform data for WM8996
*
* Copyright 2011 Wolfson Microelectronics. PLC.
*
......@@ -8,14 +8,14 @@
* published by the Free Software Foundation.
*/
#ifndef __LINUX_SND_WM8903_H
#define __LINUX_SND_WM8903_H
#ifndef __LINUX_SND_WM8996_H
#define __LINUX_SND_WM8996_H
enum wm8915_inmode {
WM8915_DIFFERRENTIAL_1 = 0, /* IN1xP - IN1xN */
WM8915_INVERTING = 1, /* IN1xN */
WM8915_NON_INVERTING = 2, /* IN1xP */
WM8915_DIFFERENTIAL_2 = 3, /* IN2xP - IN2xP */
enum wm8996_inmode {
WM8996_DIFFERRENTIAL_1 = 0, /* IN1xP - IN1xN */
WM8996_INVERTING = 1, /* IN1xN */
WM8996_NON_INVERTING = 2, /* IN1xP */
WM8996_DIFFERENTIAL_2 = 3, /* IN2xP - IN2xP */
};
/**
......@@ -25,23 +25,23 @@ enum wm8915_inmode {
* Configurations are expected to be generated using the ReTune Mobile
* control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
*/
struct wm8915_retune_mobile_config {
struct wm8996_retune_mobile_config {
const char *name;
int rate;
u16 regs[20];
};
#define WM8915_SET_DEFAULT 0x10000
#define WM8996_SET_DEFAULT 0x10000
struct wm8915_pdata {
struct wm8996_pdata {
int irq_flags; /** Set IRQ trigger flags; default active low */
int ldo_ena; /** GPIO for LDO1; -1 for none */
int micdet_def; /** Default MICDET_SRC/HP1FB_SRC/MICD_BIAS */
enum wm8915_inmode inl_mode;
enum wm8915_inmode inr_mode;
enum wm8996_inmode inl_mode;
enum wm8996_inmode inr_mode;
u32 spkmute_seq; /** Value for register 0x802 */
......@@ -49,7 +49,7 @@ struct wm8915_pdata {
u32 gpio_default[5];
int num_retune_mobile_cfgs;
struct wm8915_retune_mobile_config *retune_mobile_cfgs;
struct wm8996_retune_mobile_config *retune_mobile_cfgs;
};
#endif
......@@ -78,7 +78,6 @@ config SND_SOC_ALL_CODECS
select SND_SOC_WM8900 if I2C
select SND_SOC_WM8903 if I2C
select SND_SOC_WM8904 if I2C
select SND_SOC_WM8915 if I2C
select SND_SOC_WM8940 if I2C
select SND_SOC_WM8955 if I2C
select SND_SOC_WM8960 if I2C
......@@ -95,6 +94,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_WM8993 if I2C
select SND_SOC_WM8994 if MFD_WM8994
select SND_SOC_WM8995 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8996 if I2C
select SND_SOC_WM9081 if I2C
select SND_SOC_WM9090 if I2C
select SND_SOC_WM9705 if SND_SOC_AC97_BUS
......@@ -329,9 +329,6 @@ config SND_SOC_WM8903
config SND_SOC_WM8904
tristate
config SND_SOC_WM8915
tristate
config SND_SOC_WM8940
tristate
......@@ -380,6 +377,9 @@ config SND_SOC_WM8994
config SND_SOC_WM8995
tristate
config SND_SOC_WM8996
tristate
config SND_SOC_WM9081
tristate
......
......@@ -63,7 +63,7 @@ snd-soc-wm8804-objs := wm8804.o
snd-soc-wm8900-objs := wm8900.o
snd-soc-wm8903-objs := wm8903.o
snd-soc-wm8904-objs := wm8904.o
snd-soc-wm8915-objs := wm8915.o
snd-soc-wm8996-objs := wm8996.o
snd-soc-wm8940-objs := wm8940.o
snd-soc-wm8955-objs := wm8955.o
snd-soc-wm8960-objs := wm8960.o
......@@ -160,7 +160,7 @@ obj-$(CONFIG_SND_SOC_WM8804) += snd-soc-wm8804.o
obj-$(CONFIG_SND_SOC_WM8900) += snd-soc-wm8900.o
obj-$(CONFIG_SND_SOC_WM8903) += snd-soc-wm8903.o
obj-$(CONFIG_SND_SOC_WM8904) += snd-soc-wm8904.o
obj-$(CONFIG_SND_SOC_WM8915) += snd-soc-wm8915.o
obj-$(CONFIG_SND_SOC_WM8996) += snd-soc-wm8996.o
obj-$(CONFIG_SND_SOC_WM8940) += snd-soc-wm8940.o
obj-$(CONFIG_SND_SOC_WM8955) += snd-soc-wm8955.o
obj-$(CONFIG_SND_SOC_WM8960) += snd-soc-wm8960.o
......
......@@ -33,73 +33,31 @@
#define SGTL5000_DAP_REG_OFFSET 0x0100
#define SGTL5000_MAX_REG_OFFSET 0x013A
/* default value of sgtl5000 registers except DAP */
static const u16 sgtl5000_regs[SGTL5000_MAX_REG_OFFSET >> 1] = {
0xa011, /* 0x0000, CHIP_ID. 11 stand for revison 17 */
0x0000, /* 0x0002, CHIP_DIG_POWER. */
0x0008, /* 0x0004, CHIP_CKL_CTRL */
0x0010, /* 0x0006, CHIP_I2S_CTRL */
0x0000, /* 0x0008, reserved */
0x0008, /* 0x000A, CHIP_SSS_CTRL */
0x0000, /* 0x000C, reserved */
0x020c, /* 0x000E, CHIP_ADCDAC_CTRL */
0x3c3c, /* 0x0010, CHIP_DAC_VOL */
0x0000, /* 0x0012, reserved */
0x015f, /* 0x0014, CHIP_PAD_STRENGTH */
0x0000, /* 0x0016, reserved */
0x0000, /* 0x0018, reserved */
0x0000, /* 0x001A, reserved */
0x0000, /* 0x001E, reserved */
0x0000, /* 0x0020, CHIP_ANA_ADC_CTRL */
0x1818, /* 0x0022, CHIP_ANA_HP_CTRL */
0x0111, /* 0x0024, CHIP_ANN_CTRL */
0x0000, /* 0x0026, CHIP_LINREG_CTRL */
0x0000, /* 0x0028, CHIP_REF_CTRL */
0x0000, /* 0x002A, CHIP_MIC_CTRL */
0x0000, /* 0x002C, CHIP_LINE_OUT_CTRL */
0x0404, /* 0x002E, CHIP_LINE_OUT_VOL */
0x7060, /* 0x0030, CHIP_ANA_POWER */
0x5000, /* 0x0032, CHIP_PLL_CTRL */
0x0000, /* 0x0034, CHIP_CLK_TOP_CTRL */
0x0000, /* 0x0036, CHIP_ANA_STATUS */
0x0000, /* 0x0038, reserved */
0x0000, /* 0x003A, CHIP_ANA_TEST2 */
0x0000, /* 0x003C, CHIP_SHORT_CTRL */
0x0000, /* reserved */
};
/* default value of dap registers */
static const u16 sgtl5000_dap_regs[] = {
0x0000, /* 0x0100, DAP_CONTROL */
0x0000, /* 0x0102, DAP_PEQ */
0x0040, /* 0x0104, DAP_BASS_ENHANCE */
0x051f, /* 0x0106, DAP_BASS_ENHANCE_CTRL */
0x0000, /* 0x0108, DAP_AUDIO_EQ */
0x0040, /* 0x010A, DAP_SGTL_SURROUND */
0x0000, /* 0x010C, DAP_FILTER_COEF_ACCESS */
0x0000, /* 0x010E, DAP_COEF_WR_B0_MSB */
0x0000, /* 0x0110, DAP_COEF_WR_B0_LSB */
0x0000, /* 0x0112, reserved */
0x0000, /* 0x0114, reserved */
0x002f, /* 0x0116, DAP_AUDIO_EQ_BASS_BAND0 */
0x002f, /* 0x0118, DAP_AUDIO_EQ_BAND0 */
0x002f, /* 0x011A, DAP_AUDIO_EQ_BAND2 */
0x002f, /* 0x011C, DAP_AUDIO_EQ_BAND3 */
0x002f, /* 0x011E, DAP_AUDIO_EQ_TREBLE_BAND4 */
0x8000, /* 0x0120, DAP_MAIN_CHAN */
0x0000, /* 0x0122, DAP_MIX_CHAN */
0x0510, /* 0x0124, DAP_AVC_CTRL */
0x1473, /* 0x0126, DAP_AVC_THRESHOLD */
0x0028, /* 0x0128, DAP_AVC_ATTACK */
0x0050, /* 0x012A, DAP_AVC_DECAY */
0x0000, /* 0x012C, DAP_COEF_WR_B1_MSB */
0x0000, /* 0x012E, DAP_COEF_WR_B1_LSB */
0x0000, /* 0x0130, DAP_COEF_WR_B2_MSB */
0x0000, /* 0x0132, DAP_COEF_WR_B2_LSB */
0x0000, /* 0x0134, DAP_COEF_WR_A1_MSB */
0x0000, /* 0x0136, DAP_COEF_WR_A1_LSB */
0x0000, /* 0x0138, DAP_COEF_WR_A2_MSB */
0x0000, /* 0x013A, DAP_COEF_WR_A2_LSB */
/* default value of sgtl5000 registers */
static const u16 sgtl5000_regs[SGTL5000_MAX_REG_OFFSET] = {
[SGTL5000_CHIP_CLK_CTRL] = 0x0008,
[SGTL5000_CHIP_I2S_CTRL] = 0x0010,
[SGTL5000_CHIP_SSS_CTRL] = 0x0008,
[SGTL5000_CHIP_DAC_VOL] = 0x3c3c,
[SGTL5000_CHIP_PAD_STRENGTH] = 0x015f,
[SGTL5000_CHIP_ANA_HP_CTRL] = 0x1818,
[SGTL5000_CHIP_ANA_CTRL] = 0x0111,
[SGTL5000_CHIP_LINE_OUT_VOL] = 0x0404,
[SGTL5000_CHIP_ANA_POWER] = 0x7060,
[SGTL5000_CHIP_PLL_CTRL] = 0x5000,
[SGTL5000_DAP_BASS_ENHANCE] = 0x0040,
[SGTL5000_DAP_BASS_ENHANCE_CTRL] = 0x051f,
[SGTL5000_DAP_SURROUND] = 0x0040,
[SGTL5000_DAP_EQ_BASS_BAND0] = 0x002f,
[SGTL5000_DAP_EQ_BASS_BAND1] = 0x002f,
[SGTL5000_DAP_EQ_BASS_BAND2] = 0x002f,
[SGTL5000_DAP_EQ_BASS_BAND3] = 0x002f,
[SGTL5000_DAP_EQ_BASS_BAND4] = 0x002f,
[SGTL5000_DAP_MAIN_CHAN] = 0x8000,
[SGTL5000_DAP_AVC_CTRL] = 0x0510,
[SGTL5000_DAP_AVC_THRESHOLD] = 0x1473,
[SGTL5000_DAP_AVC_ATTACK] = 0x0028,
[SGTL5000_DAP_AVC_DECAY] = 0x0050,
};
/* regulator supplies for sgtl5000, VDDD is an optional external supply */
......@@ -1023,12 +981,10 @@ static int sgtl5000_suspend(struct snd_soc_codec *codec, pm_message_t state)
static int sgtl5000_restore_regs(struct snd_soc_codec *codec)
{
u16 *cache = codec->reg_cache;
int i;
int regular_regs = SGTL5000_CHIP_SHORT_CTRL >> 1;
u16 reg;
/* restore regular registers */
for (i = 0; i < regular_regs; i++) {
int reg = i << 1;
for (reg = 0; reg <= SGTL5000_CHIP_SHORT_CTRL; reg += 2) {
/* this regs depends on the others */
if (reg == SGTL5000_CHIP_ANA_POWER ||
......@@ -1038,35 +994,31 @@ static int sgtl5000_restore_regs(struct snd_soc_codec *codec)
reg == SGTL5000_CHIP_CLK_CTRL)
continue;
snd_soc_write(codec, reg, cache[i]);
snd_soc_write(codec, reg, cache[reg]);
}
/* restore dap registers */
for (i = SGTL5000_DAP_REG_OFFSET >> 1;
i < SGTL5000_MAX_REG_OFFSET >> 1; i++) {
int reg = i << 1;
snd_soc_write(codec, reg, cache[i]);
}
for (reg = SGTL5000_DAP_REG_OFFSET; reg < SGTL5000_MAX_REG_OFFSET; reg += 2)
snd_soc_write(codec, reg, cache[reg]);
/*
* restore power and other regs according
* to set_power() and set_clock()
*/
snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL,
cache[SGTL5000_CHIP_LINREG_CTRL >> 1]);
cache[SGTL5000_CHIP_LINREG_CTRL]);
snd_soc_write(codec, SGTL5000_CHIP_ANA_POWER,
cache[SGTL5000_CHIP_ANA_POWER >> 1]);
cache[SGTL5000_CHIP_ANA_POWER]);
snd_soc_write(codec, SGTL5000_CHIP_CLK_CTRL,
cache[SGTL5000_CHIP_CLK_CTRL >> 1]);
cache[SGTL5000_CHIP_CLK_CTRL]);
snd_soc_write(codec, SGTL5000_CHIP_REF_CTRL,
cache[SGTL5000_CHIP_REF_CTRL >> 1]);
cache[SGTL5000_CHIP_REF_CTRL]);
snd_soc_write(codec, SGTL5000_CHIP_LINE_OUT_CTRL,
cache[SGTL5000_CHIP_LINE_OUT_CTRL >> 1]);
cache[SGTL5000_CHIP_LINE_OUT_CTRL]);
return 0;
}
......@@ -1454,16 +1406,6 @@ static __devinit int sgtl5000_i2c_probe(struct i2c_client *client,
if (!sgtl5000)
return -ENOMEM;
/*
* copy DAP default values to default value array.
* sgtl5000 register space has a big hole, merge it
* at init phase makes life easy.
* FIXME: should we drop 'const' of sgtl5000_regs?
*/
memcpy((void *)(&sgtl5000_regs[0] + (SGTL5000_DAP_REG_OFFSET >> 1)),
sgtl5000_dap_regs,
SGTL5000_MAX_REG_OFFSET - SGTL5000_DAP_REG_OFFSET);
i2c_set_clientdata(client, sgtl5000);
ret = snd_soc_register_codec(&client->dev,
......
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This source diff could not be displayed because it is too large. You can view the blob instead.
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......@@ -440,9 +440,8 @@ static int hp_event(struct snd_soc_dapm_widget *w,
reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
/* Smallest supported update interval */
snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
WM8993_DCS_TIMER_PERIOD_01_MASK, 1);
WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
calibrate_dc_servo(codec);
......
......@@ -183,7 +183,7 @@ config SND_SOC_SPEYSIDE
tristate "Audio support for Wolfson Speyside"
depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410
select SND_SAMSUNG_I2S
select SND_SOC_WM8915
select SND_SOC_WM8996
select SND_SOC_WM9081
config SND_SOC_SPEYSIDE_WM8962
......
......@@ -14,10 +14,10 @@
#include <sound/jack.h>
#include <linux/gpio.h>
#include "../codecs/wm8915.h"
#include "../codecs/wm8996.h"
#include "../codecs/wm9081.h"
#define WM8915_HPSEL_GPIO 214
#define WM8996_HPSEL_GPIO 214
static int speyside_set_bias_level(struct snd_soc_card *card,
struct snd_soc_dapm_context *dapm,
......@@ -31,12 +31,12 @@ static int speyside_set_bias_level(struct snd_soc_card *card,
switch (level) {
case SND_SOC_BIAS_STANDBY:
ret = snd_soc_dai_set_sysclk(codec_dai, WM8915_SYSCLK_MCLK2,
ret = snd_soc_dai_set_sysclk(codec_dai, WM8996_SYSCLK_MCLK2,
32768, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;
ret = snd_soc_dai_set_pll(codec_dai, WM8915_FLL_MCLK2,
ret = snd_soc_dai_set_pll(codec_dai, WM8996_FLL_MCLK2,
0, 0, 0);
if (ret < 0) {
pr_err("Failed to stop FLL\n");
......@@ -65,7 +65,7 @@ static int speyside_set_bias_level_post(struct snd_soc_card *card,
case SND_SOC_BIAS_PREPARE:
if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
ret = snd_soc_dai_set_pll(codec_dai, 0,
WM8915_FLL_MCLK2,
WM8996_FLL_MCLK2,
32768, 48000 * 256);
if (ret < 0) {
pr_err("Failed to start FLL\n");
......@@ -73,7 +73,7 @@ static int speyside_set_bias_level_post(struct snd_soc_card *card,
}
ret = snd_soc_dai_set_sysclk(codec_dai,
WM8915_SYSCLK_FLL,
WM8996_SYSCLK_FLL,
48000 * 256,
SND_SOC_CLOCK_IN);
if (ret < 0)
......@@ -149,26 +149,26 @@ static void speyside_set_polarity(struct snd_soc_codec *codec,
int polarity)
{
speyside_jack_polarity = !polarity;
gpio_direction_output(WM8915_HPSEL_GPIO, speyside_jack_polarity);
gpio_direction_output(WM8996_HPSEL_GPIO, speyside_jack_polarity);
/* Re-run DAPM to make sure we're using the correct mic bias */
snd_soc_dapm_sync(&codec->dapm);
}
static int speyside_wm8915_init(struct snd_soc_pcm_runtime *rtd)
static int speyside_wm8996_init(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_dai *dai = rtd->codec_dai;
struct snd_soc_codec *codec = rtd->codec;
int ret;
ret = snd_soc_dai_set_sysclk(dai, WM8915_SYSCLK_MCLK2, 32768, 0);
ret = snd_soc_dai_set_sysclk(dai, WM8996_SYSCLK_MCLK2, 32768, 0);
if (ret < 0)
return ret;
ret = gpio_request(WM8915_HPSEL_GPIO, "HP_SEL");
ret = gpio_request(WM8996_HPSEL_GPIO, "HP_SEL");
if (ret != 0)
pr_err("Failed to request HP_SEL GPIO: %d\n", ret);
gpio_direction_output(WM8915_HPSEL_GPIO, speyside_jack_polarity);
gpio_direction_output(WM8996_HPSEL_GPIO, speyside_jack_polarity);
ret = snd_soc_jack_new(codec, "Headset",
SND_JACK_HEADSET | SND_JACK_BTN_0,
......@@ -182,7 +182,7 @@ static int speyside_wm8915_init(struct snd_soc_pcm_runtime *rtd)
if (ret)
return ret;
wm8915_detect(codec, &speyside_headset, speyside_set_polarity);
wm8996_detect(codec, &speyside_headset, speyside_set_polarity);
return 0;
}
......@@ -205,16 +205,16 @@ static struct snd_soc_dai_link speyside_dai[] = {
.name = "CPU",
.stream_name = "CPU",
.cpu_dai_name = "samsung-i2s.0",
.codec_dai_name = "wm8915-aif1",
.codec_dai_name = "wm8996-aif1",
.platform_name = "samsung-audio",
.codec_name = "wm8915.1-001a",
.init = speyside_wm8915_init,
.codec_name = "wm8996.1-001a",
.init = speyside_wm8996_init,
.ops = &speyside_ops,
},
{
.name = "Baseband",
.stream_name = "Baseband",
.cpu_dai_name = "wm8915-aif2",
.cpu_dai_name = "wm8996-aif2",
.codec_dai_name = "wm1250-ev1",
.codec_name = "wm1250-ev1.1-0027",
.ops = &speyside_ops,
......
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