Commit 615b994e authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-for-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Not much interesting going on fixes-wise for us this week, as it
  should be for an -rc7.  I'm not expecting Olof to work much over
  Thanksgiving weekend, so I decided to take over again and push these
  out to you.

  Just four simple fixes this week:

   - one missing of_node_put() on armv7 based mvebu
   - forcing the USB host into the right mode on Chromebook
     (exynos5-snow)
   - enabling two important drivers for exynos_defconfig
   - fixing a noncritical bug for tegra that would cause a regression
     with common code patches queued for 3.19"

* tag 'armsoc-for-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: tegra: irq: fix buggy usage of irq_data irq field
  ARM: exynos_defconfig: Enable max77802 rtc and clock drivers
  ARM: dts: Explicitly set dr_mode on exynos5250-snow
  ARM: mvebu: add missing of_node_put() call in coherency.c
parents e818d5ed 96ba18ff
...@@ -624,4 +624,8 @@ &spi_1 { ...@@ -624,4 +624,8 @@ &spi_1 {
num-cs = <1>; num-cs = <1>;
}; };
&usbdrd_dwc3 {
dr_mode = "host";
};
#include "cros-ec-keyboard.dtsi" #include "cros-ec-keyboard.dtsi"
...@@ -555,7 +555,7 @@ usb@12000000 { ...@@ -555,7 +555,7 @@ usb@12000000 {
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
dwc3 { usbdrd_dwc3: dwc3 {
compatible = "synopsys,dwc3"; compatible = "synopsys,dwc3";
reg = <0x12000000 0x10000>; reg = <0x12000000 0x10000>;
interrupts = <0 72 0>; interrupts = <0 72 0>;
......
...@@ -142,11 +142,13 @@ CONFIG_MMC_DW_IDMAC=y ...@@ -142,11 +142,13 @@ CONFIG_MMC_DW_IDMAC=y
CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_EXYNOS=y
CONFIG_RTC_CLASS=y CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MAX77686=y CONFIG_RTC_DRV_MAX77686=y
CONFIG_RTC_DRV_MAX77802=y
CONFIG_RTC_DRV_S5M=y CONFIG_RTC_DRV_S5M=y
CONFIG_RTC_DRV_S3C=y CONFIG_RTC_DRV_S3C=y
CONFIG_DMADEVICES=y CONFIG_DMADEVICES=y
CONFIG_PL330_DMA=y CONFIG_PL330_DMA=y
CONFIG_COMMON_CLK_MAX77686=y CONFIG_COMMON_CLK_MAX77686=y
CONFIG_COMMON_CLK_MAX77802=y
CONFIG_COMMON_CLK_S2MPS11=y CONFIG_COMMON_CLK_S2MPS11=y
CONFIG_EXYNOS_IOMMU=y CONFIG_EXYNOS_IOMMU=y
CONFIG_IIO=y CONFIG_IIO=y
......
...@@ -400,6 +400,8 @@ int __init coherency_init(void) ...@@ -400,6 +400,8 @@ int __init coherency_init(void)
type == COHERENCY_FABRIC_TYPE_ARMADA_380) type == COHERENCY_FABRIC_TYPE_ARMADA_380)
armada_375_380_coherency_init(np); armada_375_380_coherency_init(np);
of_node_put(np);
return 0; return 0;
} }
......
...@@ -99,42 +99,42 @@ static inline void tegra_irq_write_mask(unsigned int irq, unsigned long reg) ...@@ -99,42 +99,42 @@ static inline void tegra_irq_write_mask(unsigned int irq, unsigned long reg)
static void tegra_mask(struct irq_data *d) static void tegra_mask(struct irq_data *d)
{ {
if (d->irq < FIRST_LEGACY_IRQ) if (d->hwirq < FIRST_LEGACY_IRQ)
return; return;
tegra_irq_write_mask(d->irq, ICTLR_CPU_IER_CLR); tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_CLR);
} }
static void tegra_unmask(struct irq_data *d) static void tegra_unmask(struct irq_data *d)
{ {
if (d->irq < FIRST_LEGACY_IRQ) if (d->hwirq < FIRST_LEGACY_IRQ)
return; return;
tegra_irq_write_mask(d->irq, ICTLR_CPU_IER_SET); tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_SET);
} }
static void tegra_ack(struct irq_data *d) static void tegra_ack(struct irq_data *d)
{ {
if (d->irq < FIRST_LEGACY_IRQ) if (d->hwirq < FIRST_LEGACY_IRQ)
return; return;
tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_CLR); tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR);
} }
static void tegra_eoi(struct irq_data *d) static void tegra_eoi(struct irq_data *d)
{ {
if (d->irq < FIRST_LEGACY_IRQ) if (d->hwirq < FIRST_LEGACY_IRQ)
return; return;
tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_CLR); tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR);
} }
static int tegra_retrigger(struct irq_data *d) static int tegra_retrigger(struct irq_data *d)
{ {
if (d->irq < FIRST_LEGACY_IRQ) if (d->hwirq < FIRST_LEGACY_IRQ)
return 0; return 0;
tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_SET); tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_SET);
return 1; return 1;
} }
...@@ -142,7 +142,7 @@ static int tegra_retrigger(struct irq_data *d) ...@@ -142,7 +142,7 @@ static int tegra_retrigger(struct irq_data *d)
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
static int tegra_set_wake(struct irq_data *d, unsigned int enable) static int tegra_set_wake(struct irq_data *d, unsigned int enable)
{ {
u32 irq = d->irq; u32 irq = d->hwirq;
u32 index, mask; u32 index, mask;
if (irq < FIRST_LEGACY_IRQ || if (irq < FIRST_LEGACY_IRQ ||
......
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