Commit 61c3b19f authored by Corentin Labbe's avatar Corentin Labbe Committed by Mauro Carvalho Chehab

media: staging: media: Revert "media: zoran: remove deprecated driver"

This reverts commit 8dce4b26.
The revert is slighly modified:
- Documentation/media/v4l-drivers/index.rst is ,ot restored since removed from tree
- drivers/staging/media/Makefile is not restored since the zoran driver
  is not compilable yet.
Signed-off-by: default avatarCorentin Labbe <clabbe@baylibre.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 6ca3549d
This diff is collapsed.
......@@ -38,6 +38,8 @@ source "drivers/staging/media/sunxi/Kconfig"
source "drivers/staging/media/tegra-vde/Kconfig"
source "drivers/staging/media/zoran/Kconfig"
source "drivers/staging/media/tegra-video/Kconfig"
source "drivers/staging/media/ipu3/Kconfig"
......
config VIDEO_ZORAN
tristate "Zoran ZR36057/36067 Video For Linux (Deprecated)"
depends on PCI && I2C_ALGOBIT && VIDEO_V4L2 && VIRT_TO_BUS
depends on !ALPHA
help
Say Y for support for MJPEG capture cards based on the Zoran
36057/36067 PCI controller chipset. This includes the Iomega
Buz, Pinnacle DC10+ and the Linux Media Labs LML33. There is
a driver homepage at <http://mjpeg.sf.net/driver-zoran/>. For
more information, check <file:Documentation/media/v4l-drivers/zoran.rst>.
To compile this driver as a module, choose M here: the
module will be called zr36067.
config VIDEO_ZORAN_DC30
tristate "Pinnacle/Miro DC30(+) support"
depends on VIDEO_ZORAN
select VIDEO_ADV7175 if MEDIA_SUBDRV_AUTOSELECT
select VIDEO_VPX3220 if MEDIA_SUBDRV_AUTOSELECT
help
Support for the Pinnacle/Miro DC30(+) MJPEG capture/playback
card. This also supports really old DC10 cards based on the
zr36050 MJPEG codec and zr36016 VFE.
config VIDEO_ZORAN_ZR36060
tristate "Zoran ZR36060"
depends on VIDEO_ZORAN
help
Say Y to support Zoran boards based on 36060 chips.
This includes Iomega Buz, Pinnacle DC10, Linux media Labs 33
and 33 R10 and AverMedia 6 boards.
config VIDEO_ZORAN_BUZ
tristate "Iomega Buz support"
depends on VIDEO_ZORAN_ZR36060
select VIDEO_SAA711X if MEDIA_SUBDRV_AUTOSELECT
select VIDEO_SAA7185 if MEDIA_SUBDRV_AUTOSELECT
help
Support for the Iomega Buz MJPEG capture/playback card.
config VIDEO_ZORAN_DC10
tristate "Pinnacle/Miro DC10(+) support"
depends on VIDEO_ZORAN_ZR36060
select VIDEO_SAA7110 if MEDIA_SUBDRV_AUTOSELECT
select VIDEO_ADV7175 if MEDIA_SUBDRV_AUTOSELECT
help
Support for the Pinnacle/Miro DC10(+) MJPEG capture/playback
card.
config VIDEO_ZORAN_LML33
tristate "Linux Media Labs LML33 support"
depends on VIDEO_ZORAN_ZR36060
select VIDEO_BT819 if MEDIA_SUBDRV_AUTOSELECT
select VIDEO_BT856 if MEDIA_SUBDRV_AUTOSELECT
help
Support for the Linux Media Labs LML33 MJPEG capture/playback
card.
config VIDEO_ZORAN_LML33R10
tristate "Linux Media Labs LML33R10 support"
depends on VIDEO_ZORAN_ZR36060
select VIDEO_SAA711X if MEDIA_SUBDRV_AUTOSELECT
select VIDEO_ADV7170 if MEDIA_SUBDRV_AUTOSELECT
help
support for the Linux Media Labs LML33R10 MJPEG capture/playback
card.
config VIDEO_ZORAN_AVS6EYES
tristate "AverMedia 6 Eyes support"
depends on VIDEO_ZORAN_ZR36060
select VIDEO_BT856 if MEDIA_SUBDRV_AUTOSELECT
select VIDEO_BT866 if MEDIA_SUBDRV_AUTOSELECT
select VIDEO_KS0127 if MEDIA_SUBDRV_AUTOSELECT
help
Support for the AverMedia 6 Eyes video surveillance card.
# SPDX-License-Identifier: GPL-2.0
zr36067-objs := zoran_procfs.o zoran_device.o \
zoran_driver.o zoran_card.o
obj-$(CONFIG_VIDEO_ZORAN) += zr36067.o videocodec.o
obj-$(CONFIG_VIDEO_ZORAN_DC30) += zr36050.o zr36016.o
obj-$(CONFIG_VIDEO_ZORAN_ZR36060) += zr36060.o
The zoran driver is marked deprecated. It will be removed
around May 2019 unless someone is willing to update this
driver to the latest V4L2 frameworks (especially the vb2
framework).
/*
* VIDEO MOTION CODECs internal API for video devices
*
* Interface for MJPEG (and maybe later MPEG/WAVELETS) codec's
* bound to a master device.
*
* (c) 2002 Wolfgang Scherr <scherr@net4you.at>
*
* $Id: videocodec.c,v 1.1.2.8 2003/03/29 07:16:04 rbultje Exp $
*
* ------------------------------------------------------------------------
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* ------------------------------------------------------------------------
*/
#define VIDEOCODEC_VERSION "v0.2"
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/slab.h>
// kernel config is here (procfs flag)
#ifdef CONFIG_PROC_FS
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/uaccess.h>
#endif
#include "videocodec.h"
static int debug;
module_param(debug, int, 0);
MODULE_PARM_DESC(debug, "Debug level (0-4)");
#define dprintk(num, format, args...) \
do { \
if (debug >= num) \
printk(format, ##args); \
} while (0)
struct attached_list {
struct videocodec *codec;
struct attached_list *next;
};
struct codec_list {
const struct videocodec *codec;
int attached;
struct attached_list *list;
struct codec_list *next;
};
static struct codec_list *codeclist_top;
/* ================================================= */
/* function prototypes of the master/slave interface */
/* ================================================= */
struct videocodec *
videocodec_attach (struct videocodec_master *master)
{
struct codec_list *h = codeclist_top;
struct attached_list *a, *ptr;
struct videocodec *codec;
int res;
if (!master) {
dprintk(1, KERN_ERR "videocodec_attach: no data\n");
return NULL;
}
dprintk(2,
"videocodec_attach: '%s', flags %lx, magic %lx\n",
master->name, master->flags, master->magic);
if (!h) {
dprintk(1,
KERN_ERR
"videocodec_attach: no device available\n");
return NULL;
}
while (h) {
// attach only if the slave has at least the flags
// expected by the master
if ((master->flags & h->codec->flags) == master->flags) {
dprintk(4, "videocodec_attach: try '%s'\n",
h->codec->name);
if (!try_module_get(h->codec->owner))
return NULL;
codec = kmemdup(h->codec, sizeof(struct videocodec),
GFP_KERNEL);
if (!codec) {
dprintk(1,
KERN_ERR
"videocodec_attach: no mem\n");
goto out_module_put;
}
res = strlen(codec->name);
snprintf(codec->name + res, sizeof(codec->name) - res,
"[%d]", h->attached);
codec->master_data = master;
res = codec->setup(codec);
if (res == 0) {
dprintk(3, "videocodec_attach '%s'\n",
codec->name);
ptr = kzalloc(sizeof(struct attached_list), GFP_KERNEL);
if (!ptr) {
dprintk(1,
KERN_ERR
"videocodec_attach: no memory\n");
goto out_kfree;
}
ptr->codec = codec;
a = h->list;
if (!a) {
h->list = ptr;
dprintk(4,
"videocodec: first element\n");
} else {
while (a->next)
a = a->next; // find end
a->next = ptr;
dprintk(4,
"videocodec: in after '%s'\n",
h->codec->name);
}
h->attached += 1;
return codec;
} else {
kfree(codec);
}
}
h = h->next;
}
dprintk(1, KERN_ERR "videocodec_attach: no codec found!\n");
return NULL;
out_module_put:
module_put(h->codec->owner);
out_kfree:
kfree(codec);
return NULL;
}
int
videocodec_detach (struct videocodec *codec)
{
struct codec_list *h = codeclist_top;
struct attached_list *a, *prev;
int res;
if (!codec) {
dprintk(1, KERN_ERR "videocodec_detach: no data\n");
return -EINVAL;
}
dprintk(2,
"videocodec_detach: '%s', type: %x, flags %lx, magic %lx\n",
codec->name, codec->type, codec->flags, codec->magic);
if (!h) {
dprintk(1,
KERN_ERR "videocodec_detach: no device left...\n");
return -ENXIO;
}
while (h) {
a = h->list;
prev = NULL;
while (a) {
if (codec == a->codec) {
res = a->codec->unset(a->codec);
if (res >= 0) {
dprintk(3,
"videocodec_detach: '%s'\n",
a->codec->name);
a->codec->master_data = NULL;
} else {
dprintk(1,
KERN_ERR
"videocodec_detach: '%s'\n",
a->codec->name);
a->codec->master_data = NULL;
}
if (prev == NULL) {
h->list = a->next;
dprintk(4,
"videocodec: delete first\n");
} else {
prev->next = a->next;
dprintk(4,
"videocodec: delete middle\n");
}
module_put(a->codec->owner);
kfree(a->codec);
kfree(a);
h->attached -= 1;
return 0;
}
prev = a;
a = a->next;
}
h = h->next;
}
dprintk(1, KERN_ERR "videocodec_detach: given codec not found!\n");
return -EINVAL;
}
int
videocodec_register (const struct videocodec *codec)
{
struct codec_list *ptr, *h = codeclist_top;
if (!codec) {
dprintk(1, KERN_ERR "videocodec_register: no data!\n");
return -EINVAL;
}
dprintk(2,
"videocodec: register '%s', type: %x, flags %lx, magic %lx\n",
codec->name, codec->type, codec->flags, codec->magic);
ptr = kzalloc(sizeof(struct codec_list), GFP_KERNEL);
if (!ptr) {
dprintk(1, KERN_ERR "videocodec_register: no memory\n");
return -ENOMEM;
}
ptr->codec = codec;
if (!h) {
codeclist_top = ptr;
dprintk(4, "videocodec: hooked in as first element\n");
} else {
while (h->next)
h = h->next; // find the end
h->next = ptr;
dprintk(4, "videocodec: hooked in after '%s'\n",
h->codec->name);
}
return 0;
}
int
videocodec_unregister (const struct videocodec *codec)
{
struct codec_list *prev = NULL, *h = codeclist_top;
if (!codec) {
dprintk(1, KERN_ERR "videocodec_unregister: no data!\n");
return -EINVAL;
}
dprintk(2,
"videocodec: unregister '%s', type: %x, flags %lx, magic %lx\n",
codec->name, codec->type, codec->flags, codec->magic);
if (!h) {
dprintk(1,
KERN_ERR
"videocodec_unregister: no device left...\n");
return -ENXIO;
}
while (h) {
if (codec == h->codec) {
if (h->attached) {
dprintk(1,
KERN_ERR
"videocodec: '%s' is used\n",
h->codec->name);
return -EBUSY;
}
dprintk(3, "videocodec: unregister '%s' is ok.\n",
h->codec->name);
if (prev == NULL) {
codeclist_top = h->next;
dprintk(4,
"videocodec: delete first element\n");
} else {
prev->next = h->next;
dprintk(4,
"videocodec: delete middle element\n");
}
kfree(h);
return 0;
}
prev = h;
h = h->next;
}
dprintk(1,
KERN_ERR
"videocodec_unregister: given codec not found!\n");
return -EINVAL;
}
#ifdef CONFIG_PROC_FS
static int proc_videocodecs_show(struct seq_file *m, void *v)
{
struct codec_list *h = codeclist_top;
struct attached_list *a;
seq_printf(m, "<S>lave or attached <M>aster name type flags magic ");
seq_printf(m, "(connected as)\n");
while (h) {
seq_printf(m, "S %32s %04x %08lx %08lx (TEMPLATE)\n",
h->codec->name, h->codec->type,
h->codec->flags, h->codec->magic);
a = h->list;
while (a) {
seq_printf(m, "M %32s %04x %08lx %08lx (%s)\n",
a->codec->master_data->name,
a->codec->master_data->type,
a->codec->master_data->flags,
a->codec->master_data->magic,
a->codec->name);
a = a->next;
}
h = h->next;
}
return 0;
}
#endif
/* ===================== */
/* hook in driver module */
/* ===================== */
static int __init
videocodec_init (void)
{
#ifdef CONFIG_PROC_FS
static struct proc_dir_entry *videocodec_proc_entry;
#endif
printk(KERN_INFO "Linux video codec intermediate layer: %s\n",
VIDEOCODEC_VERSION);
#ifdef CONFIG_PROC_FS
videocodec_proc_entry = proc_create_single("videocodecs", 0, NULL,
proc_videocodecs_show);
if (!videocodec_proc_entry) {
dprintk(1, KERN_ERR "videocodec: can't init procfs.\n");
}
#endif
return 0;
}
static void __exit
videocodec_exit (void)
{
#ifdef CONFIG_PROC_FS
remove_proc_entry("videocodecs", NULL);
#endif
}
EXPORT_SYMBOL(videocodec_attach);
EXPORT_SYMBOL(videocodec_detach);
EXPORT_SYMBOL(videocodec_register);
EXPORT_SYMBOL(videocodec_unregister);
module_init(videocodec_init);
module_exit(videocodec_exit);
MODULE_AUTHOR("Wolfgang Scherr <scherr@net4you.at>");
MODULE_DESCRIPTION("Intermediate API module for video codecs "
VIDEOCODEC_VERSION);
MODULE_LICENSE("GPL");
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/*
* Zoran zr36057/zr36067 PCI controller driver, for the
* Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
* Media Labs LML33/LML33R10.
*
* This part handles card-specific data and detection
*
* Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
*
* Currently maintained by:
* Ronald Bultje <rbultje@ronald.bitfreak.net>
* Laurent Pinchart <laurent.pinchart@skynet.be>
* Mailinglist <mjpeg-users@lists.sf.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ZORAN_CARD_H__
#define __ZORAN_CARD_H__
extern int zr36067_debug;
#define dprintk(num, format, args...) \
do { \
if (zr36067_debug >= num) \
printk(format, ##args); \
} while (0)
/* Anybody who uses more than four? */
#define BUZ_MAX 4
extern const struct video_device zoran_template;
extern int zoran_check_jpg_settings(struct zoran *zr,
struct zoran_jpg_settings *settings,
int try);
extern void zoran_open_init_params(struct zoran *zr);
extern void zoran_vdev_release(struct video_device *vdev);
void zr36016_write(struct videocodec *codec, u16 reg, u32 val);
#endif /* __ZORAN_CARD_H__ */
This diff is collapsed.
/*
* Zoran zr36057/zr36067 PCI controller driver, for the
* Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
* Media Labs LML33/LML33R10.
*
* This part handles card-specific data and detection
*
* Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
*
* Currently maintained by:
* Ronald Bultje <rbultje@ronald.bitfreak.net>
* Laurent Pinchart <laurent.pinchart@skynet.be>
* Mailinglist <mjpeg-users@lists.sf.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ZORAN_DEVICE_H__
#define __ZORAN_DEVICE_H__
/* general purpose I/O */
extern void GPIO(struct zoran *zr,
int bit,
unsigned int value);
/* codec (or actually: guest bus) access */
extern int post_office_wait(struct zoran *zr);
extern int post_office_write(struct zoran *zr,
unsigned guest,
unsigned reg,
unsigned value);
extern int post_office_read(struct zoran *zr,
unsigned guest,
unsigned reg);
extern void detect_guest_activity(struct zoran *zr);
extern void jpeg_codec_sleep(struct zoran *zr,
int sleep);
extern int jpeg_codec_reset(struct zoran *zr);
/* zr360x7 access to raw capture */
extern void zr36057_overlay(struct zoran *zr,
int on);
extern void write_overlay_mask(struct zoran_fh *fh,
struct v4l2_clip *vp,
int count);
extern void zr36057_set_memgrab(struct zoran *zr,
int mode);
extern int wait_grab_pending(struct zoran *zr);
/* interrupts */
extern void print_interrupts(struct zoran *zr);
extern void clear_interrupt_counters(struct zoran *zr);
extern irqreturn_t zoran_irq(int irq, void *dev_id);
/* JPEG codec access */
extern void jpeg_start(struct zoran *zr);
extern void zr36057_enable_jpg(struct zoran *zr,
enum zoran_codec_mode mode);
extern void zoran_feed_stat_com(struct zoran *zr);
/* general */
extern void zoran_set_pci_master(struct zoran *zr,
int set_master);
extern void zoran_init_hardware(struct zoran *zr);
extern void zr36057_restart(struct zoran *zr);
extern const struct zoran_format zoran_formats[];
extern int v4l_nbufs;
extern int v4l_bufsize;
extern int jpg_nbufs;
extern int jpg_bufsize;
extern int pass_through;
/* i2c */
#define decoder_call(zr, o, f, args...) \
v4l2_subdev_call(zr->decoder, o, f, ##args)
#define encoder_call(zr, o, f, args...) \
v4l2_subdev_call(zr->encoder, o, f, ##args)
#endif /* __ZORAN_DEVICE_H__ */
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/*
* Zoran zr36057/zr36067 PCI controller driver, for the
* Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
* Media Labs LML33/LML33R10.
*
* This part handles the procFS entries (/proc/ZORAN[%d])
*
* Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
*
* Currently maintained by:
* Ronald Bultje <rbultje@ronald.bitfreak.net>
* Laurent Pinchart <laurent.pinchart@skynet.be>
* Mailinglist <mjpeg-users@lists.sf.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/vmalloc.h>
#include <linux/proc_fs.h>
#include <linux/pci.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/videodev2.h>
#include <linux/spinlock.h>
#include <linux/sem.h>
#include <linux/seq_file.h>
#include <linux/ctype.h>
#include <linux/poll.h>
#include <asm/io.h>
#include "videocodec.h"
#include "zoran.h"
#include "zoran_procfs.h"
#include "zoran_card.h"
#ifdef CONFIG_PROC_FS
struct procfs_params_zr36067 {
char *name;
short reg;
u32 mask;
short bit;
};
static const struct procfs_params_zr36067 zr67[] = {
{"HSPol", 0x000, 1, 30},
{"HStart", 0x000, 0x3ff, 10},
{"HEnd", 0x000, 0x3ff, 0},
{"VSPol", 0x004, 1, 30},
{"VStart", 0x004, 0x3ff, 10},
{"VEnd", 0x004, 0x3ff, 0},
{"ExtFl", 0x008, 1, 26},
{"TopField", 0x008, 1, 25},
{"VCLKPol", 0x008, 1, 24},
{"DupFld", 0x008, 1, 20},
{"LittleEndian", 0x008, 1, 0},
{"HsyncStart", 0x10c, 0xffff, 16},
{"LineTot", 0x10c, 0xffff, 0},
{"NAX", 0x110, 0xffff, 16},
{"PAX", 0x110, 0xffff, 0},
{"NAY", 0x114, 0xffff, 16},
{"PAY", 0x114, 0xffff, 0},
/* {"",,,}, */
{NULL, 0, 0, 0},
};
static void
setparam (struct zoran *zr,
char *name,
char *sval)
{
int i = 0, reg0, reg, val;
while (zr67[i].name != NULL) {
if (!strncmp(name, zr67[i].name, strlen(zr67[i].name))) {
reg = reg0 = btread(zr67[i].reg);
reg &= ~(zr67[i].mask << zr67[i].bit);
if (!isdigit(sval[0]))
break;
val = simple_strtoul(sval, NULL, 0);
if ((val & ~zr67[i].mask))
break;
reg |= (val & zr67[i].mask) << zr67[i].bit;
dprintk(4,
KERN_INFO
"%s: setparam: setting ZR36067 register 0x%03x: 0x%08x=>0x%08x %s=%d\n",
ZR_DEVNAME(zr), zr67[i].reg, reg0, reg,
zr67[i].name, val);
btwrite(reg, zr67[i].reg);
break;
}
i++;
}
}
static int zoran_show(struct seq_file *p, void *v)
{
struct zoran *zr = p->private;
int i;
seq_printf(p, "ZR36067 registers:\n");
for (i = 0; i < 0x130; i += 16)
seq_printf(p, "%03X %08X %08X %08X %08X \n", i,
btread(i), btread(i+4), btread(i+8), btread(i+12));
return 0;
}
static int zoran_open(struct inode *inode, struct file *file)
{
struct zoran *data = PDE_DATA(inode);
return single_open(file, zoran_show, data);
}
static ssize_t zoran_write(struct file *file, const char __user *buffer,
size_t count, loff_t *ppos)
{
struct zoran *zr = PDE_DATA(file_inode(file));
char *string, *sp;
char *line, *ldelim, *varname, *svar, *tdelim;
if (count > 32768) /* Stupidity filter */
return -EINVAL;
string = sp = vmalloc(count + 1);
if (!string) {
dprintk(1,
KERN_ERR
"%s: write_proc: can not allocate memory\n",
ZR_DEVNAME(zr));
return -ENOMEM;
}
if (copy_from_user(string, buffer, count)) {
vfree (string);
return -EFAULT;
}
string[count] = 0;
dprintk(4, KERN_INFO "%s: write_proc: name=%pD count=%zu zr=%p\n",
ZR_DEVNAME(zr), file, count, zr);
ldelim = " \t\n";
tdelim = "=";
line = strpbrk(sp, ldelim);
while (line) {
*line = 0;
svar = strpbrk(sp, tdelim);
if (svar) {
*svar = 0;
varname = sp;
svar++;
setparam(zr, varname, svar);
}
sp = line + 1;
line = strpbrk(sp, ldelim);
}
vfree(string);
return count;
}
static const struct file_operations zoran_operations = {
.owner = THIS_MODULE,
.open = zoran_open,
.read = seq_read,
.write = zoran_write,
.llseek = seq_lseek,
.release = single_release,
};
#endif
int
zoran_proc_init (struct zoran *zr)
{
#ifdef CONFIG_PROC_FS
char name[8];
snprintf(name, 7, "zoran%d", zr->id);
zr->zoran_proc = proc_create_data(name, 0, NULL, &zoran_operations, zr);
if (zr->zoran_proc != NULL) {
dprintk(2,
KERN_INFO
"%s: procfs entry /proc/%s allocated. data=%p\n",
ZR_DEVNAME(zr), name, zr);
} else {
dprintk(1, KERN_ERR "%s: Unable to initialise /proc/%s\n",
ZR_DEVNAME(zr), name);
return 1;
}
#endif
return 0;
}
void
zoran_proc_cleanup (struct zoran *zr)
{
#ifdef CONFIG_PROC_FS
char name[8];
snprintf(name, 7, "zoran%d", zr->id);
if (zr->zoran_proc)
remove_proc_entry(name, NULL);
zr->zoran_proc = NULL;
#endif
}
/*
* Zoran zr36057/zr36067 PCI controller driver, for the
* Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
* Media Labs LML33/LML33R10.
*
* This part handles card-specific data and detection
*
* Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
*
* Currently maintained by:
* Ronald Bultje <rbultje@ronald.bitfreak.net>
* Laurent Pinchart <laurent.pinchart@skynet.be>
* Mailinglist <mjpeg-users@lists.sf.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ZORAN_PROCFS_H__
#define __ZORAN_PROCFS_H__
extern int zoran_proc_init(struct zoran *zr);
extern void zoran_proc_cleanup(struct zoran *zr);
#endif /* __ZORAN_PROCFS_H__ */
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/*
* Zoran ZR36016 basic configuration functions - header file
*
* Copyright (C) 2001 Wolfgang Scherr <scherr@net4you.at>
*
* $Id: zr36016.h,v 1.1.2.3 2003/01/14 21:18:07 rbultje Exp $
*
* ------------------------------------------------------------------------
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* ------------------------------------------------------------------------
*/
#ifndef ZR36016_H
#define ZR36016_H
/* data stored for each zoran jpeg codec chip */
struct zr36016 {
char name[32];
int num;
/* io datastructure */
struct videocodec *codec;
// coder status
__u8 version;
// actual coder setup
int mode;
__u16 xoff;
__u16 yoff;
__u16 width;
__u16 height;
__u16 xdec;
__u16 ydec;
};
/* direct register addresses */
#define ZR016_GOSTOP 0x00
#define ZR016_MODE 0x01
#define ZR016_IADDR 0x02
#define ZR016_IDATA 0x03
/* indirect register addresses */
#define ZR016I_SETUP1 0x00
#define ZR016I_SETUP2 0x01
#define ZR016I_NAX_LO 0x02
#define ZR016I_NAX_HI 0x03
#define ZR016I_PAX_LO 0x04
#define ZR016I_PAX_HI 0x05
#define ZR016I_NAY_LO 0x06
#define ZR016I_NAY_HI 0x07
#define ZR016I_PAY_LO 0x08
#define ZR016I_PAY_HI 0x09
#define ZR016I_NOL_LO 0x0a
#define ZR016I_NOL_HI 0x0b
/* possible values for mode register */
#define ZR016_RGB444_YUV444 0x00
#define ZR016_RGB444_YUV422 0x01
#define ZR016_RGB444_YUV411 0x02
#define ZR016_RGB444_Y400 0x03
#define ZR016_RGB444_RGB444 0x04
#define ZR016_YUV444_YUV444 0x08
#define ZR016_YUV444_YUV422 0x09
#define ZR016_YUV444_YUV411 0x0a
#define ZR016_YUV444_Y400 0x0b
#define ZR016_YUV444_RGB444 0x0c
#define ZR016_YUV422_YUV422 0x11
#define ZR016_YUV422_YUV411 0x12
#define ZR016_YUV422_Y400 0x13
#define ZR016_YUV411_YUV411 0x16
#define ZR016_YUV411_Y400 0x17
#define ZR016_4444_4444 0x19
#define ZR016_100_100 0x1b
#define ZR016_RGB444 0x00
#define ZR016_YUV444 0x20
#define ZR016_YUV422 0x40
#define ZR016_COMPRESSION 0x80
#define ZR016_EXPANSION 0x80
/* possible values for setup 1 register */
#define ZR016_CKRT 0x80
#define ZR016_VERT 0x40
#define ZR016_HORZ 0x20
#define ZR016_HRFL 0x10
#define ZR016_DSFL 0x08
#define ZR016_SBFL 0x04
#define ZR016_RSTR 0x02
#define ZR016_CNTI 0x01
/* possible values for setup 2 register */
#define ZR016_SYEN 0x40
#define ZR016_CCIR 0x04
#define ZR016_SIGN 0x02
#define ZR016_YMCS 0x01
#endif /*fndef ZR36016_H */
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/*
* Zoran ZR36050 basic configuration functions - header file
*
* Copyright (C) 2001 Wolfgang Scherr <scherr@net4you.at>
*
* $Id: zr36050.h,v 1.1.2.2 2003/01/14 21:18:22 rbultje Exp $
*
* ------------------------------------------------------------------------
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* ------------------------------------------------------------------------
*/
#ifndef ZR36050_H
#define ZR36050_H
#include "videocodec.h"
/* data stored for each zoran jpeg codec chip */
struct zr36050 {
char name[32];
int num;
/* io datastructure */
struct videocodec *codec;
// last coder status
__u8 status1;
// actual coder setup
int mode;
__u16 width;
__u16 height;
__u16 bitrate_ctrl;
__u32 total_code_vol;
__u32 real_code_vol;
__u16 max_block_vol;
__u8 h_samp_ratio[8];
__u8 v_samp_ratio[8];
__u16 scalefact;
__u16 dri;
/* com/app marker */
struct jpeg_com_marker com;
struct jpeg_app_marker app;
};
/* zr36050 register addresses */
#define ZR050_GO 0x000
#define ZR050_HARDWARE 0x002
#define ZR050_MODE 0x003
#define ZR050_OPTIONS 0x004
#define ZR050_MBCV 0x005
#define ZR050_MARKERS_EN 0x006
#define ZR050_INT_REQ_0 0x007
#define ZR050_INT_REQ_1 0x008
#define ZR050_TCV_NET_HI 0x009
#define ZR050_TCV_NET_MH 0x00a
#define ZR050_TCV_NET_ML 0x00b
#define ZR050_TCV_NET_LO 0x00c
#define ZR050_TCV_DATA_HI 0x00d
#define ZR050_TCV_DATA_MH 0x00e
#define ZR050_TCV_DATA_ML 0x00f
#define ZR050_TCV_DATA_LO 0x010
#define ZR050_SF_HI 0x011
#define ZR050_SF_LO 0x012
#define ZR050_AF_HI 0x013
#define ZR050_AF_M 0x014
#define ZR050_AF_LO 0x015
#define ZR050_ACV_HI 0x016
#define ZR050_ACV_MH 0x017
#define ZR050_ACV_ML 0x018
#define ZR050_ACV_LO 0x019
#define ZR050_ACT_HI 0x01a
#define ZR050_ACT_MH 0x01b
#define ZR050_ACT_ML 0x01c
#define ZR050_ACT_LO 0x01d
#define ZR050_ACV_TRUN_HI 0x01e
#define ZR050_ACV_TRUN_MH 0x01f
#define ZR050_ACV_TRUN_ML 0x020
#define ZR050_ACV_TRUN_LO 0x021
#define ZR050_STATUS_0 0x02e
#define ZR050_STATUS_1 0x02f
#define ZR050_SOF_IDX 0x040
#define ZR050_SOS1_IDX 0x07a
#define ZR050_SOS2_IDX 0x08a
#define ZR050_SOS3_IDX 0x09a
#define ZR050_SOS4_IDX 0x0aa
#define ZR050_DRI_IDX 0x0c0
#define ZR050_DNL_IDX 0x0c6
#define ZR050_DQT_IDX 0x0cc
#define ZR050_DHT_IDX 0x1d4
#define ZR050_APP_IDX 0x380
#define ZR050_COM_IDX 0x3c0
/* zr36050 hardware register bits */
#define ZR050_HW_BSWD 0x80
#define ZR050_HW_MSTR 0x40
#define ZR050_HW_DMA 0x20
#define ZR050_HW_CFIS_1_CLK 0x00
#define ZR050_HW_CFIS_2_CLK 0x04
#define ZR050_HW_CFIS_3_CLK 0x08
#define ZR050_HW_CFIS_4_CLK 0x0C
#define ZR050_HW_CFIS_5_CLK 0x10
#define ZR050_HW_CFIS_6_CLK 0x14
#define ZR050_HW_CFIS_7_CLK 0x18
#define ZR050_HW_CFIS_8_CLK 0x1C
#define ZR050_HW_BELE 0x01
/* zr36050 mode register bits */
#define ZR050_MO_COMP 0x80
#define ZR050_MO_ATP 0x40
#define ZR050_MO_PASS2 0x20
#define ZR050_MO_TLM 0x10
#define ZR050_MO_DCONLY 0x08
#define ZR050_MO_BRC 0x04
#define ZR050_MO_ATP 0x40
#define ZR050_MO_PASS2 0x20
#define ZR050_MO_TLM 0x10
#define ZR050_MO_DCONLY 0x08
/* zr36050 option register bits */
#define ZR050_OP_NSCN_1 0x00
#define ZR050_OP_NSCN_2 0x20
#define ZR050_OP_NSCN_3 0x40
#define ZR050_OP_NSCN_4 0x60
#define ZR050_OP_NSCN_5 0x80
#define ZR050_OP_NSCN_6 0xA0
#define ZR050_OP_NSCN_7 0xC0
#define ZR050_OP_NSCN_8 0xE0
#define ZR050_OP_OVF 0x10
/* zr36050 markers-enable register bits */
#define ZR050_ME_APP 0x80
#define ZR050_ME_COM 0x40
#define ZR050_ME_DRI 0x20
#define ZR050_ME_DQT 0x10
#define ZR050_ME_DHT 0x08
#define ZR050_ME_DNL 0x04
#define ZR050_ME_DQTI 0x02
#define ZR050_ME_DHTI 0x01
/* zr36050 status0/1 register bit masks */
#define ZR050_ST_RST_MASK 0x20
#define ZR050_ST_SOF_MASK 0x02
#define ZR050_ST_SOS_MASK 0x02
#define ZR050_ST_DATRDY_MASK 0x80
#define ZR050_ST_MRKDET_MASK 0x40
#define ZR050_ST_RFM_MASK 0x10
#define ZR050_ST_RFD_MASK 0x08
#define ZR050_ST_END_MASK 0x04
#define ZR050_ST_TCVOVF_MASK 0x02
#define ZR050_ST_DATOVF_MASK 0x01
/* pixel component idx */
#define ZR050_Y_COMPONENT 0
#define ZR050_U_COMPONENT 1
#define ZR050_V_COMPONENT 2
#endif /*fndef ZR36050_H */
/*
* zr36057.h - zr36057 register offsets
*
* Copyright (C) 1998 Dave Perks <dperks@ibm.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _ZR36057_H_
#define _ZR36057_H_
/* Zoran ZR36057 registers */
#define ZR36057_VFEHCR 0x000 /* Video Front End, Horizontal Configuration Register */
#define ZR36057_VFEHCR_HSPol (1<<30)
#define ZR36057_VFEHCR_HStart 10
#define ZR36057_VFEHCR_HEnd 0
#define ZR36057_VFEHCR_Hmask 0x3ff
#define ZR36057_VFEVCR 0x004 /* Video Front End, Vertical Configuration Register */
#define ZR36057_VFEVCR_VSPol (1<<30)
#define ZR36057_VFEVCR_VStart 10
#define ZR36057_VFEVCR_VEnd 0
#define ZR36057_VFEVCR_Vmask 0x3ff
#define ZR36057_VFESPFR 0x008 /* Video Front End, Scaler and Pixel Format Register */
#define ZR36057_VFESPFR_ExtFl (1<<26)
#define ZR36057_VFESPFR_TopField (1<<25)
#define ZR36057_VFESPFR_VCLKPol (1<<24)
#define ZR36057_VFESPFR_HFilter 21
#define ZR36057_VFESPFR_HorDcm 14
#define ZR36057_VFESPFR_VerDcm 8
#define ZR36057_VFESPFR_DispMode 6
#define ZR36057_VFESPFR_YUV422 (0<<3)
#define ZR36057_VFESPFR_RGB888 (1<<3)
#define ZR36057_VFESPFR_RGB565 (2<<3)
#define ZR36057_VFESPFR_RGB555 (3<<3)
#define ZR36057_VFESPFR_ErrDif (1<<2)
#define ZR36057_VFESPFR_Pack24 (1<<1)
#define ZR36057_VFESPFR_LittleEndian (1<<0)
#define ZR36057_VDTR 0x00c /* Video Display "Top" Register */
#define ZR36057_VDBR 0x010 /* Video Display "Bottom" Register */
#define ZR36057_VSSFGR 0x014 /* Video Stride, Status, and Frame Grab Register */
#define ZR36057_VSSFGR_DispStride 16
#define ZR36057_VSSFGR_VidOvf (1<<8)
#define ZR36057_VSSFGR_SnapShot (1<<1)
#define ZR36057_VSSFGR_FrameGrab (1<<0)
#define ZR36057_VDCR 0x018 /* Video Display Configuration Register */
#define ZR36057_VDCR_VidEn (1<<31)
#define ZR36057_VDCR_MinPix 24
#define ZR36057_VDCR_Triton (1<<24)
#define ZR36057_VDCR_VidWinHt 12
#define ZR36057_VDCR_VidWinWid 0
#define ZR36057_MMTR 0x01c /* Masking Map "Top" Register */
#define ZR36057_MMBR 0x020 /* Masking Map "Bottom" Register */
#define ZR36057_OCR 0x024 /* Overlay Control Register */
#define ZR36057_OCR_OvlEnable (1 << 15)
#define ZR36057_OCR_MaskStride 0
#define ZR36057_SPGPPCR 0x028 /* System, PCI, and General Purpose Pins Control Register */
#define ZR36057_SPGPPCR_SoftReset (1<<24)
#define ZR36057_GPPGCR1 0x02c /* General Purpose Pins and GuestBus Control Register (1) */
#define ZR36057_MCSAR 0x030 /* MPEG Code Source Address Register */
#define ZR36057_MCTCR 0x034 /* MPEG Code Transfer Control Register */
#define ZR36057_MCTCR_CodTime (1 << 30)
#define ZR36057_MCTCR_CEmpty (1 << 29)
#define ZR36057_MCTCR_CFlush (1 << 28)
#define ZR36057_MCTCR_CodGuestID 20
#define ZR36057_MCTCR_CodGuestReg 16
#define ZR36057_MCMPR 0x038 /* MPEG Code Memory Pointer Register */
#define ZR36057_ISR 0x03c /* Interrupt Status Register */
#define ZR36057_ISR_GIRQ1 (1<<30)
#define ZR36057_ISR_GIRQ0 (1<<29)
#define ZR36057_ISR_CodRepIRQ (1<<28)
#define ZR36057_ISR_JPEGRepIRQ (1<<27)
#define ZR36057_ICR 0x040 /* Interrupt Control Register */
#define ZR36057_ICR_GIRQ1 (1<<30)
#define ZR36057_ICR_GIRQ0 (1<<29)
#define ZR36057_ICR_CodRepIRQ (1<<28)
#define ZR36057_ICR_JPEGRepIRQ (1<<27)
#define ZR36057_ICR_IntPinEn (1<<24)
#define ZR36057_I2CBR 0x044 /* I2C Bus Register */
#define ZR36057_I2CBR_SDA (1<<1)
#define ZR36057_I2CBR_SCL (1<<0)
#define ZR36057_JMC 0x100 /* JPEG Mode and Control */
#define ZR36057_JMC_JPG (1 << 31)
#define ZR36057_JMC_JPGExpMode (0 << 29)
#define ZR36057_JMC_JPGCmpMode (1 << 29)
#define ZR36057_JMC_MJPGExpMode (2 << 29)
#define ZR36057_JMC_MJPGCmpMode (3 << 29)
#define ZR36057_JMC_RTBUSY_FB (1 << 6)
#define ZR36057_JMC_Go_en (1 << 5)
#define ZR36057_JMC_SyncMstr (1 << 4)
#define ZR36057_JMC_Fld_per_buff (1 << 3)
#define ZR36057_JMC_VFIFO_FB (1 << 2)
#define ZR36057_JMC_CFIFO_FB (1 << 1)
#define ZR36057_JMC_Stll_LitEndian (1 << 0)
#define ZR36057_JPC 0x104 /* JPEG Process Control */
#define ZR36057_JPC_P_Reset (1 << 7)
#define ZR36057_JPC_CodTrnsEn (1 << 5)
#define ZR36057_JPC_Active (1 << 0)
#define ZR36057_VSP 0x108 /* Vertical Sync Parameters */
#define ZR36057_VSP_VsyncSize 16
#define ZR36057_VSP_FrmTot 0
#define ZR36057_HSP 0x10c /* Horizontal Sync Parameters */
#define ZR36057_HSP_HsyncStart 16
#define ZR36057_HSP_LineTot 0
#define ZR36057_FHAP 0x110 /* Field Horizontal Active Portion */
#define ZR36057_FHAP_NAX 16
#define ZR36057_FHAP_PAX 0
#define ZR36057_FVAP 0x114 /* Field Vertical Active Portion */
#define ZR36057_FVAP_NAY 16
#define ZR36057_FVAP_PAY 0
#define ZR36057_FPP 0x118 /* Field Process Parameters */
#define ZR36057_FPP_Odd_Even (1 << 0)
#define ZR36057_JCBA 0x11c /* JPEG Code Base Address */
#define ZR36057_JCFT 0x120 /* JPEG Code FIFO Threshold */
#define ZR36057_JCGI 0x124 /* JPEG Codec Guest ID */
#define ZR36057_JCGI_JPEGuestID 4
#define ZR36057_JCGI_JPEGuestReg 0
#define ZR36057_GCR2 0x12c /* GuestBus Control Register (2) */
#define ZR36057_POR 0x200 /* Post Office Register */
#define ZR36057_POR_POPen (1<<25)
#define ZR36057_POR_POTime (1<<24)
#define ZR36057_POR_PODir (1<<23)
#define ZR36057_STR 0x300 /* "Still" Transfer Register */
#endif
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/*
* Zoran ZR36060 basic configuration functions - header file
*
* Copyright (C) 2002 Laurent Pinchart <laurent.pinchart@skynet.be>
*
* $Id: zr36060.h,v 1.1.1.1.2.3 2003/01/14 21:18:47 rbultje Exp $
*
* ------------------------------------------------------------------------
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* ------------------------------------------------------------------------
*/
#ifndef ZR36060_H
#define ZR36060_H
#include "videocodec.h"
/* data stored for each zoran jpeg codec chip */
struct zr36060 {
char name[32];
int num;
/* io datastructure */
struct videocodec *codec;
// last coder status
__u8 status;
// actual coder setup
int mode;
__u16 width;
__u16 height;
__u16 bitrate_ctrl;
__u32 total_code_vol;
__u32 real_code_vol;
__u16 max_block_vol;
__u8 h_samp_ratio[8];
__u8 v_samp_ratio[8];
__u16 scalefact;
__u16 dri;
/* app/com marker data */
struct jpeg_app_marker app;
struct jpeg_com_marker com;
};
/* ZR36060 register addresses */
#define ZR060_LOAD 0x000
#define ZR060_CFSR 0x001
#define ZR060_CIR 0x002
#define ZR060_CMR 0x003
#define ZR060_MBZ 0x004
#define ZR060_MBCVR 0x005
#define ZR060_MER 0x006
#define ZR060_IMR 0x007
#define ZR060_ISR 0x008
#define ZR060_TCV_NET_HI 0x009
#define ZR060_TCV_NET_MH 0x00a
#define ZR060_TCV_NET_ML 0x00b
#define ZR060_TCV_NET_LO 0x00c
#define ZR060_TCV_DATA_HI 0x00d
#define ZR060_TCV_DATA_MH 0x00e
#define ZR060_TCV_DATA_ML 0x00f
#define ZR060_TCV_DATA_LO 0x010
#define ZR060_SF_HI 0x011
#define ZR060_SF_LO 0x012
#define ZR060_AF_HI 0x013
#define ZR060_AF_M 0x014
#define ZR060_AF_LO 0x015
#define ZR060_ACV_HI 0x016
#define ZR060_ACV_MH 0x017
#define ZR060_ACV_ML 0x018
#define ZR060_ACV_LO 0x019
#define ZR060_ACT_HI 0x01a
#define ZR060_ACT_MH 0x01b
#define ZR060_ACT_ML 0x01c
#define ZR060_ACT_LO 0x01d
#define ZR060_ACV_TRUN_HI 0x01e
#define ZR060_ACV_TRUN_MH 0x01f
#define ZR060_ACV_TRUN_ML 0x020
#define ZR060_ACV_TRUN_LO 0x021
#define ZR060_IDR_DEV 0x022
#define ZR060_IDR_REV 0x023
#define ZR060_TCR_HI 0x024
#define ZR060_TCR_LO 0x025
#define ZR060_VCR 0x030
#define ZR060_VPR 0x031
#define ZR060_SR 0x032
#define ZR060_BCR_Y 0x033
#define ZR060_BCR_U 0x034
#define ZR060_BCR_V 0x035
#define ZR060_SGR_VTOTAL_HI 0x036
#define ZR060_SGR_VTOTAL_LO 0x037
#define ZR060_SGR_HTOTAL_HI 0x038
#define ZR060_SGR_HTOTAL_LO 0x039
#define ZR060_SGR_VSYNC 0x03a
#define ZR060_SGR_HSYNC 0x03b
#define ZR060_SGR_BVSTART 0x03c
#define ZR060_SGR_BHSTART 0x03d
#define ZR060_SGR_BVEND_HI 0x03e
#define ZR060_SGR_BVEND_LO 0x03f
#define ZR060_SGR_BHEND_HI 0x040
#define ZR060_SGR_BHEND_LO 0x041
#define ZR060_AAR_VSTART_HI 0x042
#define ZR060_AAR_VSTART_LO 0x043
#define ZR060_AAR_VEND_HI 0x044
#define ZR060_AAR_VEND_LO 0x045
#define ZR060_AAR_HSTART_HI 0x046
#define ZR060_AAR_HSTART_LO 0x047
#define ZR060_AAR_HEND_HI 0x048
#define ZR060_AAR_HEND_LO 0x049
#define ZR060_SWR_VSTART_HI 0x04a
#define ZR060_SWR_VSTART_LO 0x04b
#define ZR060_SWR_VEND_HI 0x04c
#define ZR060_SWR_VEND_LO 0x04d
#define ZR060_SWR_HSTART_HI 0x04e
#define ZR060_SWR_HSTART_LO 0x04f
#define ZR060_SWR_HEND_HI 0x050
#define ZR060_SWR_HEND_LO 0x051
#define ZR060_SOF_IDX 0x060
#define ZR060_SOS_IDX 0x07a
#define ZR060_DRI_IDX 0x0c0
#define ZR060_DQT_IDX 0x0cc
#define ZR060_DHT_IDX 0x1d4
#define ZR060_APP_IDX 0x380
#define ZR060_COM_IDX 0x3c0
/* ZR36060 LOAD register bits */
#define ZR060_LOAD_Load (1 << 7)
#define ZR060_LOAD_SyncRst (1 << 0)
/* ZR36060 Code FIFO Status register bits */
#define ZR060_CFSR_Busy (1 << 7)
#define ZR060_CFSR_CBusy (1 << 2)
#define ZR060_CFSR_CFIFO (3 << 0)
/* ZR36060 Code Interface register */
#define ZR060_CIR_Code16 (1 << 7)
#define ZR060_CIR_Endian (1 << 6)
#define ZR060_CIR_CFIS (1 << 2)
#define ZR060_CIR_CodeMstr (1 << 0)
/* ZR36060 Codec Mode register */
#define ZR060_CMR_Comp (1 << 7)
#define ZR060_CMR_ATP (1 << 6)
#define ZR060_CMR_Pass2 (1 << 5)
#define ZR060_CMR_TLM (1 << 4)
#define ZR060_CMR_BRB (1 << 2)
#define ZR060_CMR_FSF (1 << 1)
/* ZR36060 Markers Enable register */
#define ZR060_MER_App (1 << 7)
#define ZR060_MER_Com (1 << 6)
#define ZR060_MER_DRI (1 << 5)
#define ZR060_MER_DQT (1 << 4)
#define ZR060_MER_DHT (1 << 3)
/* ZR36060 Interrupt Mask register */
#define ZR060_IMR_EOAV (1 << 3)
#define ZR060_IMR_EOI (1 << 2)
#define ZR060_IMR_End (1 << 1)
#define ZR060_IMR_DataErr (1 << 0)
/* ZR36060 Interrupt Status register */
#define ZR060_ISR_ProCnt (3 << 6)
#define ZR060_ISR_EOAV (1 << 3)
#define ZR060_ISR_EOI (1 << 2)
#define ZR060_ISR_End (1 << 1)
#define ZR060_ISR_DataErr (1 << 0)
/* ZR36060 Video Control register */
#define ZR060_VCR_Video8 (1 << 7)
#define ZR060_VCR_Range (1 << 6)
#define ZR060_VCR_FIDet (1 << 3)
#define ZR060_VCR_FIVedge (1 << 2)
#define ZR060_VCR_FIExt (1 << 1)
#define ZR060_VCR_SyncMstr (1 << 0)
/* ZR36060 Video Polarity register */
#define ZR060_VPR_VCLKPol (1 << 7)
#define ZR060_VPR_PValPol (1 << 6)
#define ZR060_VPR_PoePol (1 << 5)
#define ZR060_VPR_SImgPol (1 << 4)
#define ZR060_VPR_BLPol (1 << 3)
#define ZR060_VPR_FIPol (1 << 2)
#define ZR060_VPR_HSPol (1 << 1)
#define ZR060_VPR_VSPol (1 << 0)
/* ZR36060 Scaling register */
#define ZR060_SR_VScale (1 << 2)
#define ZR060_SR_HScale2 (1 << 0)
#define ZR060_SR_HScale4 (2 << 0)
#endif /*fndef ZR36060_H */
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