Commit 621d65f3 authored by Lucas Tanure's avatar Lucas Tanure Committed by Mark Brown

ASoC: cs42l42: Provide finer control on playback path

Removing cs42l42_hpdrv_evt that enables the entire chain and replace by
a set of widgets that can better define the codec
Signed-off-by: default avatarLucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210306185553.62053-9-tanureal@opensource.cirrus.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 1abca8e1
...@@ -462,54 +462,33 @@ static const struct snd_kcontrol_new cs42l42_snd_controls[] = { ...@@ -462,54 +462,33 @@ static const struct snd_kcontrol_new cs42l42_snd_controls[] = {
0x3f, 1, mixer_tlv) 0x3f, 1, mixer_tlv)
}; };
static int cs42l42_hpdrv_evt(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
if (event & SND_SOC_DAPM_POST_PMU) {
/* Enable the channels */
snd_soc_component_update_bits(component, CS42L42_ASP_RX_DAI0_EN,
CS42L42_ASP_RX0_CH_EN_MASK,
(CS42L42_ASP_RX0_CH1_EN |
CS42L42_ASP_RX0_CH2_EN) <<
CS42L42_ASP_RX0_CH_EN_SHIFT);
/* Power up */
snd_soc_component_update_bits(component, CS42L42_PWR_CTL1,
CS42L42_ASP_DAI_PDN_MASK | CS42L42_MIXER_PDN_MASK |
CS42L42_HP_PDN_MASK, 0);
} else if (event & SND_SOC_DAPM_PRE_PMD) {
/* Disable the channels */
snd_soc_component_update_bits(component, CS42L42_ASP_RX_DAI0_EN,
CS42L42_ASP_RX0_CH_EN_MASK, 0);
/* Power down */
snd_soc_component_update_bits(component, CS42L42_PWR_CTL1,
CS42L42_ASP_DAI_PDN_MASK | CS42L42_MIXER_PDN_MASK |
CS42L42_HP_PDN_MASK,
CS42L42_ASP_DAI_PDN_MASK | CS42L42_MIXER_PDN_MASK |
CS42L42_HP_PDN_MASK);
} else {
dev_err(component->dev, "Invalid event 0x%x\n", event);
}
return 0;
}
static const struct snd_soc_dapm_widget cs42l42_dapm_widgets[] = { static const struct snd_soc_dapm_widget cs42l42_dapm_widgets[] = {
/* Playback Path */
SND_SOC_DAPM_OUTPUT("HP"), SND_SOC_DAPM_OUTPUT("HP"),
SND_SOC_DAPM_AIF_IN("SDIN", NULL, 0, CS42L42_ASP_CLK_CFG, SND_SOC_DAPM_DAC("DAC", NULL, CS42L42_PWR_CTL1, CS42L42_HP_PDN_SHIFT, 1),
CS42L42_ASP_SCLK_EN_SHIFT, false), SND_SOC_DAPM_MIXER("MIXER", CS42L42_PWR_CTL1, CS42L42_MIXER_PDN_SHIFT, 1, NULL, 0),
SND_SOC_DAPM_OUT_DRV_E("HPDRV", SND_SOC_NOPM, 0, SND_SOC_DAPM_AIF_IN("SDIN1", NULL, 0, CS42L42_ASP_RX_DAI0_EN, CS42L42_ASP_RX0_CH1_SHIFT, 0),
0, NULL, 0, cs42l42_hpdrv_evt, SND_SOC_DAPM_AIF_IN("SDIN2", NULL, 1, CS42L42_ASP_RX_DAI0_EN, CS42L42_ASP_RX0_CH2_SHIFT, 0),
SND_SOC_DAPM_POST_PMU |
SND_SOC_DAPM_PRE_PMD) /* Playback Requirements */
SND_SOC_DAPM_SUPPLY("ASP DAI0", CS42L42_PWR_CTL1, CS42L42_ASP_DAI_PDN_SHIFT, 1, NULL, 0),
SND_SOC_DAPM_SUPPLY("SCLK", CS42L42_ASP_CLK_CFG, CS42L42_ASP_SCLK_EN_SHIFT, 0, NULL, 0),
}; };
static const struct snd_soc_dapm_route cs42l42_audio_map[] = { static const struct snd_soc_dapm_route cs42l42_audio_map[] = {
{"SDIN", NULL, "Playback"}, /* Playback Path */
{"HPDRV", NULL, "SDIN"}, {"HP", NULL, "DAC"},
{"HP", NULL, "HPDRV"} {"DAC", NULL, "MIXER"},
{"MIXER", NULL, "SDIN1"},
{"MIXER", NULL, "SDIN2"},
{"SDIN1", NULL, "Playback"},
{"SDIN2", NULL, "Playback"},
/* Playback Requirements */
{"SDIN1", NULL, "ASP DAI0"},
{"SDIN2", NULL, "ASP DAI0"},
{"SDIN1", NULL, "SCLK"},
{"SDIN2", NULL, "SCLK"},
}; };
static int cs42l42_component_probe(struct snd_soc_component *component) static int cs42l42_component_probe(struct snd_soc_component *component)
......
...@@ -695,10 +695,10 @@ ...@@ -695,10 +695,10 @@
#define CS42L42_ASP_RX_DAI0_EN (CS42L42_PAGE_2A + 0x01) #define CS42L42_ASP_RX_DAI0_EN (CS42L42_PAGE_2A + 0x01)
#define CS42L42_ASP_RX0_CH_EN_SHIFT 2 #define CS42L42_ASP_RX0_CH_EN_SHIFT 2
#define CS42L42_ASP_RX0_CH_EN_MASK (0xf << CS42L42_ASP_RX0_CH_EN_SHIFT) #define CS42L42_ASP_RX0_CH_EN_MASK (0xf << CS42L42_ASP_RX0_CH_EN_SHIFT)
#define CS42L42_ASP_RX0_CH1_EN 1 #define CS42L42_ASP_RX0_CH1_SHIFT 2
#define CS42L42_ASP_RX0_CH2_EN 2 #define CS42L42_ASP_RX0_CH2_SHIFT 3
#define CS42L42_ASP_RX0_CH3_EN 4 #define CS42L42_ASP_RX0_CH3_SHIFT 4
#define CS42L42_ASP_RX0_CH4_EN 8 #define CS42L42_ASP_RX0_CH4_SHIFT 5
#define CS42L42_ASP_RX_DAI0_CH1_AP_RES (CS42L42_PAGE_2A + 0x02) #define CS42L42_ASP_RX_DAI0_CH1_AP_RES (CS42L42_PAGE_2A + 0x02)
#define CS42L42_ASP_RX_DAI0_CH1_BIT_MSB (CS42L42_PAGE_2A + 0x03) #define CS42L42_ASP_RX_DAI0_CH1_BIT_MSB (CS42L42_PAGE_2A + 0x03)
......
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