Commit 633cc5fe authored by David S. Miller's avatar David S. Miller

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue

Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates 2015-06-03

This series contains updates to e1000e only.

Yanir provides 8 fixes and 1 version bump for e1000e.  First fix resolves
a possible unit hang if multiple descriptors are available in the rings
during reset or runtime suspend.  Fixed a warning on SPARC compile based
on a suggested solution from Alex Duyck.  Fixed a logical error, where
a "if" condition under which a flush should occur, was revered.  Fixed
a hardware issue that prevented i219 from working in legacy interrupts
mode.  Fixed the hardware clock configuration and suprious non-linear
increment.  Lastly, fixed a system hang which occurred during execution
of "ethtool -t <NIC>", by disabling MULR for the loopback test to avoid
the hand state.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3896d655 529498cd
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......@@ -98,6 +98,8 @@ struct e1000_info;
#define DEFAULT_RADV 8
#define BURST_RDTR 0x20
#define BURST_RADV 0x20
#define PCICFG_DESC_RING_STATUS 0xe4
#define FLUSH_DESC_REQUIRED 0x100
/* in the case of WTHRESH, it appears at least the 82571/2 hardware
* writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
......@@ -384,6 +386,10 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca);
#define INCVALUE_SHIFT_25MHz 18
#define INCPERIOD_25MHz 1
#define INCVALUE_24MHz 125
#define INCVALUE_SHIFT_24MHz 14
#define INCPERIOD_24MHz 3
/* Another drawback of scaling the incvalue by a large factor is the
* 64-bit SYSTIM register overflows more quickly. This is dealt with
* by simply reading the clock before it overflows.
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......@@ -1516,8 +1516,19 @@ static int e1000_set_es2lan_mac_loopback(struct e1000_adapter *adapter)
static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
u32 rctl;
u32 rctl, fext_nvm11, tarc0;
if (hw->mac.type == e1000_pch_spt) {
fext_nvm11 = er32(FEXTNVM11);
fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
ew32(FEXTNVM11, fext_nvm11);
tarc0 = er32(TARC(0));
/* clear bits 28 & 29 (control of MULR concurrent requests) */
tarc0 &= 0xcfffffff;
/* set bit 29 (value of MULR requests is now 2) */
tarc0 |= 0x20000000;
ew32(TARC(0), tarc0);
}
if (hw->phy.media_type == e1000_media_type_fiber ||
hw->phy.media_type == e1000_media_type_internal_serdes) {
switch (hw->mac.type) {
......@@ -1542,7 +1553,7 @@ static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
u32 rctl;
u32 rctl, fext_nvm11, tarc0;
u16 phy_reg;
rctl = er32(RCTL);
......@@ -1550,6 +1561,16 @@ static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
ew32(RCTL, rctl);
switch (hw->mac.type) {
case e1000_pch_spt:
fext_nvm11 = er32(FEXTNVM11);
fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
ew32(FEXTNVM11, fext_nvm11);
tarc0 = er32(TARC(0));
/* clear bits 28 & 29 (control of MULR concurrent requests) */
/* set bit 29 (value of MULR requests is now 0) */
tarc0 &= 0xcfffffff;
ew32(TARC(0), tarc0);
/* fall through */
case e1000_80003es2lan:
if (hw->phy.media_type == e1000_media_type_fiber ||
hw->phy.media_type == e1000_media_type_internal_serdes) {
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......@@ -1014,7 +1014,6 @@ static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link)
u16 speed, duplex, scale = 0;
u16 max_snoop, max_nosnoop;
u16 max_ltr_enc; /* max LTR latency encoded */
s64 lat_ns; /* latency (ns) */
u64 value;
u32 rxa;
......@@ -1040,14 +1039,10 @@ static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link)
* 2^25*(2^10-1) ns. The scale is encoded as 0=2^0ns,
* 1=2^5ns, 2=2^10ns,...5=2^25ns.
*/
lat_ns = ((s64)rxa * 1024 -
(2 * (s64)hw->adapter->max_frame_size)) * 8 * 1000;
if (lat_ns < 0) {
value = 0;
} else {
value = lat_ns;
do_div(value, speed);
}
rxa *= 512;
value = (rxa > hw->adapter->max_frame_size) ?
(rxa - hw->adapter->max_frame_size) * (16000 / speed) :
0;
while (value > PCI_LTR_VALUE_MASK) {
scale++;
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......@@ -98,8 +98,15 @@
#define E1000_FEXTNVM6_K1_OFF_ENABLE 0x80000000
/* bit for disabling packet buffer read */
#define E1000_FEXTNVM7_DISABLE_PB_READ 0x00040000
#define E1000_FEXTNVM7_SIDE_CLK_UNGATE 0x00000004
#define E1000_FEXTNVM7_DISABLE_SMB_PERST 0x00000020
#define E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS 0x00000800
#define E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS 0x00001000
#define E1000_FEXTNVM11_DISABLE_PB_READ 0x00000200
#define E1000_FEXTNVM11_DISABLE_MULR_FIX 0x00002000
/* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
#define E1000_RXDCTL_THRESH_UNIT_DESC 0x01000000
#define K1_ENTRY_LATENCY 0
#define K1_MIN_TIME 1
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......@@ -48,7 +48,7 @@
#define DRV_EXTRAVERSION "-k"
#define DRV_VERSION "2.3.2" DRV_EXTRAVERSION
#define DRV_VERSION "3.2.5" DRV_EXTRAVERSION
char e1000e_driver_name[] = "e1000e";
const char e1000e_driver_version[] = DRV_VERSION;
......@@ -3525,22 +3525,30 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
switch (hw->mac.type) {
case e1000_pch2lan:
case e1000_pch_lpt:
case e1000_pch_spt:
/* On I217, I218 and I219, the clock frequency is 25MHz
* or 96MHz as indicated by the System Clock Frequency
* Indication
*/
if (((hw->mac.type != e1000_pch_lpt) &&
(hw->mac.type != e1000_pch_spt)) ||
(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
/* Stable 96MHz frequency */
incperiod = INCPERIOD_96MHz;
incvalue = INCVALUE_96MHz;
shift = INCVALUE_SHIFT_96MHz;
adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
} else {
/* Stable 25MHz frequency */
incperiod = INCPERIOD_25MHz;
incvalue = INCVALUE_25MHz;
shift = INCVALUE_SHIFT_25MHz;
adapter->cc.shift = shift;
}
break;
case e1000_pch_spt:
if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
/* Stable 24MHz frequency */
incperiod = INCPERIOD_24MHz;
incvalue = INCVALUE_24MHz;
shift = INCVALUE_SHIFT_24MHz;
adapter->cc.shift = shift;
break;
}
/* fall-through */
return -EINVAL;
case e1000_82574:
case e1000_82583:
/* Stable 25MHz frequency */
......@@ -3787,6 +3795,108 @@ static void e1000_power_down_phy(struct e1000_adapter *adapter)
adapter->hw.phy.ops.power_down(&adapter->hw);
}
/**
* e1000_flush_tx_ring - remove all descriptors from the tx_ring
*
* We want to clear all pending descriptors from the TX ring.
* zeroing happens when the HW reads the regs. We assign the ring itself as
* the data of the next descriptor. We don't care about the data we are about
* to reset the HW.
*/
static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
struct e1000_ring *tx_ring = adapter->tx_ring;
struct e1000_tx_desc *tx_desc = NULL;
u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
u16 size = 512;
tctl = er32(TCTL);
ew32(TCTL, tctl | E1000_TCTL_EN);
tdt = er32(TDT(0));
BUG_ON(tdt != tx_ring->next_to_use);
tx_desc = E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
tx_desc->buffer_addr = tx_ring->dma;
tx_desc->lower.data = cpu_to_le32(txd_lower | size);
tx_desc->upper.data = 0;
/* flush descriptors to memory before notifying the HW */
wmb();
tx_ring->next_to_use++;
if (tx_ring->next_to_use == tx_ring->count)
tx_ring->next_to_use = 0;
ew32(TDT(0), tx_ring->next_to_use);
mmiowb();
usleep_range(200, 250);
}
/**
* e1000_flush_rx_ring - remove all descriptors from the rx_ring
*
* Mark all descriptors in the RX ring as consumed and disable the rx ring
*/
static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
{
u32 rctl, rxdctl;
struct e1000_hw *hw = &adapter->hw;
rctl = er32(RCTL);
ew32(RCTL, rctl & ~E1000_RCTL_EN);
e1e_flush();
usleep_range(100, 150);
rxdctl = er32(RXDCTL(0));
/* zero the lower 14 bits (prefetch and host thresholds) */
rxdctl &= 0xffffc000;
/* update thresholds: prefetch threshold to 31, host threshold to 1
* and make sure the granularity is "descriptors" and not "cache lines"
*/
rxdctl |= (0x1F | (1 << 8) | E1000_RXDCTL_THRESH_UNIT_DESC);
ew32(RXDCTL(0), rxdctl);
/* momentarily enable the RX ring for the changes to take effect */
ew32(RCTL, rctl | E1000_RCTL_EN);
e1e_flush();
usleep_range(100, 150);
ew32(RCTL, rctl & ~E1000_RCTL_EN);
}
/**
* e1000_flush_desc_rings - remove all descriptors from the descriptor rings
*
* In i219, the descriptor rings must be emptied before resetting the HW
* or before changing the device state to D3 during runtime (runtime PM).
*
* Failure to do this will cause the HW to enter a unit hang state which can
* only be released by PCI reset on the device
*
*/
static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
{
u16 hang_state;
u32 fext_nvm11, tdlen;
struct e1000_hw *hw = &adapter->hw;
/* First, disable MULR fix in FEXTNVM11 */
fext_nvm11 = er32(FEXTNVM11);
fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
ew32(FEXTNVM11, fext_nvm11);
/* do nothing if we're not in faulty state, or if the queue is empty */
tdlen = er32(TDLEN(0));
pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
&hang_state);
if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
return;
e1000_flush_tx_ring(adapter);
/* recheck, maybe the fault is caused by the rx ring */
pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
&hang_state);
if (hang_state & FLUSH_DESC_REQUIRED)
e1000_flush_rx_ring(adapter);
}
/**
* e1000e_reset - bring the hardware into a known good state
*
......@@ -3943,6 +4053,8 @@ void e1000e_reset(struct e1000_adapter *adapter)
}
}
if (hw->mac.type == e1000_pch_spt)
e1000_flush_desc_rings(adapter);
/* Allow time for pending master requests to run */
mac->ops.reset_hw(hw);
......@@ -4016,6 +4128,20 @@ void e1000e_reset(struct e1000_adapter *adapter)
phy_data &= ~IGP02E1000_PM_SPD;
e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
}
if (hw->mac.type == e1000_pch_spt && adapter->int_mode == 0) {
u32 reg;
/* Fextnvm7 @ 0xe4[2] = 1 */
reg = er32(FEXTNVM7);
reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
ew32(FEXTNVM7, reg);
/* Fextnvm9 @ 0x5bb4[13:12] = 11 */
reg = er32(FEXTNVM9);
reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
ew32(FEXTNVM9, reg);
}
}
int e1000e_up(struct e1000_adapter *adapter)
......@@ -4115,8 +4241,6 @@ void e1000e_down(struct e1000_adapter *adapter, bool reset)
spin_unlock(&adapter->stats64_lock);
e1000e_flush_descriptors(adapter);
e1000_clean_tx_ring(adapter->tx_ring);
e1000_clean_rx_ring(adapter->rx_ring);
adapter->link_speed = 0;
adapter->link_duplex = 0;
......@@ -4127,8 +4251,14 @@ void e1000e_down(struct e1000_adapter *adapter, bool reset)
e1000_lv_jumbo_workaround_ich8lan(hw, false))
e_dbg("failed to disable jumbo frame workaround mode\n");
if (reset && !pci_channel_offline(adapter->pdev))
e1000e_reset(adapter);
if (!pci_channel_offline(adapter->pdev)) {
if (reset)
e1000e_reset(adapter);
else if (hw->mac.type == e1000_pch_spt)
e1000_flush_desc_rings(adapter);
}
e1000_clean_tx_ring(adapter->tx_ring);
e1000_clean_rx_ring(adapter->rx_ring);
}
void e1000e_reinit_locked(struct e1000_adapter *adapter)
......@@ -4151,9 +4281,16 @@ static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
cc);
struct e1000_hw *hw = &adapter->hw;
cycle_t systim, systim_next;
/* SYSTIMH latching upon SYSTIML read does not work well. To fix that
* we don't want to allow overflow of SYSTIML and a change to SYSTIMH
* to occur between reads, so if we read a vale close to overflow, we
* wait for overflow to occur and read both registers when its safe.
*/
u32 systim_overflow_latch_fix = 0x3FFFFFFF;
/* latch SYSTIMH on read of SYSTIML */
systim = (cycle_t)er32(SYSTIML);
do {
systim = (cycle_t)er32(SYSTIML);
} while (systim > systim_overflow_latch_fix);
systim |= (cycle_t)er32(SYSTIMH) << 32;
if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
......@@ -7301,7 +7438,7 @@ static int __init e1000_init_module(void)
pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
e1000e_driver_version);
pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n");
pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
ret = pci_register_driver(&e1000_driver);
return ret;
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......
/* Intel PRO/1000 Linux driver
* Copyright(c) 1999 - 2014 Intel Corporation.
* Copyright(c) 1999 - 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
......@@ -38,6 +38,8 @@
#define E1000_FEXTNVM4 0x00024 /* Future Extended NVM 4 - RW */
#define E1000_FEXTNVM6 0x00010 /* Future Extended NVM 6 - RW */
#define E1000_FEXTNVM7 0x000E4 /* Future Extended NVM 7 - RW */
#define E1000_FEXTNVM9 0x5BB4 /* Future Extended NVM 9 - RW */
#define E1000_FEXTNVM11 0x5BBC /* Future Extended NVM 11 - RW */
#define E1000_PCIEANACFG 0x00F18 /* PCIE Analog Config */
#define E1000_FCT 0x00030 /* Flow Control Type - RW */
#define E1000_VET 0x00038 /* VLAN Ether Type - RW */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment