Commit 64f4466c authored by Seiya Wang's avatar Seiya Wang Committed by Stephen Boyd

clk: mediatek: correct cpu clock name for MT8173 SoC

Correct cpu clock name from ca57 to ca72 since MT8173 does use cortex-a72.
Signed-off-by: default avatarSeiya Wang <seiya.wang@mediatek.com>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent bfeffd15
......@@ -533,7 +533,7 @@ static const char * const ca53_parents[] __initconst = {
"univpll"
};
static const char * const ca57_parents[] __initconst = {
static const char * const ca72_parents[] __initconst = {
"clk26m",
"armca15pll",
"mainpll",
......@@ -542,7 +542,7 @@ static const char * const ca57_parents[] __initconst = {
static const struct mtk_composite cpu_muxes[] __initconst = {
MUX(CLK_INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2),
MUX(CLK_INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2),
MUX(CLK_INFRA_CA72SEL, "infra_ca72_sel", ca72_parents, 0x0000, 2, 2),
};
static const struct mtk_composite top_muxes[] __initconst = {
......
......@@ -194,7 +194,8 @@
#define CLK_INFRA_PMICWRAP 11
#define CLK_INFRA_CLK_13M 12
#define CLK_INFRA_CA53SEL 13
#define CLK_INFRA_CA57SEL 14
#define CLK_INFRA_CA57SEL 14 /* Deprecated. Don't use it. */
#define CLK_INFRA_CA72SEL 14
#define CLK_INFRA_NR_CLK 15
/* PERI_SYS */
......
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