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Merge tag 'qcom-arm64-for-6.6' of... 

Merge tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm ARM64 DeviceTree updates for v6.6

Initial support for the SM4450 platform and the QRD device thereon is
added.

The IPQ5018 platform is introduced, and the RDP432-C2 board thereon.

A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based
LEDs and buttons.

On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added.

On MSM8916, the D3 camera mezzanine is improved and refactored out to
its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with
charger, while Samsung Galaxy J5 and E5 gains touchscreen support.

A few fixes for MSM8939 are introduced, and initial support for Samsung
Galaxy A7 is add.

Support for scaling the cache bus fabric is introduced on MSM8996. A
missing interrupt for the USB2 controller is added. The touchscreen vio
supply on Xiaomi Mi 5 is corrected, and a few other cleanups are
introduces across other devices.

The display controller is introduced for MSM8998, a few clock fixes are
introduced and missing power domains are added for the multimedia
subsystem iommu.

Reserved memory-regions and reserved GPIO lists are updated for the
QDU/QRU1000 IDPs.

USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is
enabled for the RB2.

PCIe and Ethernet support is introduced on SA8775P, and enabled for the
Ride board.

On SC7180 the PSCI integration is refactored, to allow supporting
devices with the Qualcomm firmware. BWMON is introduced, alongside the
CPUfreq-based bus voting.

A number of fixes are added for SC8180X, on the Primus and Lenovo Flex
5G devices pmic_glink is introduced and wired up, to provide support for
external display.

Missing SCM interconnect is added to SC8280XP, and the PDC is marked as
wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is
corrected and a few regulators are renamed to align with schematics. The
Lenovo Thinkpad X13s gains camera activity LED and a set of previously
reserved GPIOs are released. The SA8540P Ride platform gains RTC
support.

For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced
and wired up as wakeup-parent of the TLMM.

On SDM845 the UFS controller gains interconnect path description,
power-domain information is added to GCC and minimum frequency of the
UFS ICE is corrected. On RB3 continuous splash memory region is
described, and the camera subsystem is enabled. On the Lenovo Yoga C630
a missing power supply for the display panel is added, and the debug
UART is introduced.

SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75
PMIC is described and added to the IDP.

GPU description is added to SM6115, and together with display enabled on
the Lenovo Tab P11.

On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU
is added, and the PDC is registered as wakeup-parent of TLMM.

L3 cache scaling is introduced on SM6375.

The DSI PHY compatible and an interrupt for I2C7 are corrected for
SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected.

On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node
gains interconnect paths, SMMU is marked as DMA coherent and dynamic
power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line
names are updated.

On SM8350 missing cluster sleep states and LMH interrupts are added,
the CPU compatibles are corrected and APR and LPASS pinctrl support is
introduced. The HDK gains uSD card support and PMK8350 is added.

For SM8450 support for RNG and RPMh stats are added, the ICE handling is
extracted from the UFS node and the display subsystem gains a missing
interconnect path. Thermal description is improved for the HDK.

On SM8550 MTP and QRD the pmic_glink is introduced, to provide
DisplayPort output. A missing regulator supply is also added.

A few platforms that happens to share the RPMH power-domain resource
identifier constants are migrated to new generic defines. ADC channel
names are generalized on various PMICs.

A variety of devices gain chassis-type, and the GIC_SPI constant is
replacing the 0 across a few different platforms.

* tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (215 commits)
  arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
  arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
  arm64: dts: qcom: sdm670: Add PDC
  arm64: dts: qcom: msm8916-samsung-e5: Add touchscreen
  arm64: dts: qcom: sc7180: Split up TF-A related PSCI configuration
  arm64: dts: qcom: sc8280xp-x13s: Add camera activity LED
  arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pins
  arm64: dts: qcom: msm8998: Add DPU1 nodes
  arm64: dts: qcom: msm8996: Fix dsi1 interrupts
  arm64: dts: qcom: sdx75-idp: Add regulator nodes
  arm64: dts: qcom: sdx75: Add rpmhpd node
  arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75
  arm64: dts: qcom: Add pmx75 PMIC dtsi
  arm64: dts: qcom: Add pm7550ba PMIC dtsi
  arm64: dts: qcom: Add pinctrl gpio support for pm7250b
  arm64: dts: qcom: sdx75: Add spmi node
  arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMU
  ...

Link: https://lore.kernel.org/r/20230819034551.2537866-1-andersson@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3b6d013c 110e70fc
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Showing with 8956 additions and 1972 deletions
Documentation/devicetree/bindings/arm/qcom-soc.yaml
View file @ 6522fbd4
......@@ -31,7 +31,7 @@ properties:
compatible:
oneOf:
# Preferred naming style for compatibles of SoC components:
- pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+-.*$"
- pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+(pro)?-.*$"
- pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$"
# Legacy namings - variations of existing patterns/compatibles are OK,
......
Documentation/devicetree/bindings/arm/qcom.yaml
View file @ 6522fbd4
......@@ -30,6 +30,7 @@ description: |
apq8084
apq8096
ipq4018
ipq5018
ipq5332
ipq6018
ipq8074
......@@ -72,6 +73,7 @@ description: |
sdx65
sdx75
sm4250
sm4450
sm6115
sm6115p
sm6125
......@@ -104,6 +106,7 @@ description: |
hk10-c2
idp
liquid
rdp432-c2
mtp
qrd
rb2
......@@ -186,6 +189,7 @@ properties:
- items:
- enum:
- samsung,a7
- sony,kanuti-tulip
- square,apq8039-t2
- const: qcom,msm8939
......@@ -339,6 +343,11 @@ properties:
- qcom,ipq4019-dk04.1-c1
- const: qcom,ipq4019
- items:
- enum:
- qcom,ipq5018-rdp432-c2
- const: qcom,ipq5018
- items:
- enum:
- qcom,ipq5332-ap-mi01.2
......@@ -902,6 +911,11 @@ properties:
- const: qcom,qrb4210
- const: qcom,sm4250
- items:
- enum:
- qcom,sm4450-qrd
- const: qcom,sm4450
- items:
- enum:
- fxtec,pro1x
......
Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml 0 → 100644
View file @ 6522fbd4
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Global Clock & Reset Controller on IPQ5018
maintainers:
- Sricharan Ramabadhran <quic_srichara@quicinc.com>
description: |
Qualcomm global clock control module provides the clocks, resets and power
domains on IPQ5018
See also::
include/dt-bindings/clock/qcom,ipq5018-gcc.h
include/dt-bindings/reset/qcom,ipq5018-gcc.h
properties:
compatible:
const: qcom,gcc-ipq5018
clocks:
items:
- description: Board XO source
- description: Sleep clock source
- description: PCIE20 PHY0 pipe clock source
- description: PCIE20 PHY1 pipe clock source
- description: USB3 PHY pipe clock source
- description: GEPHY RX clock source
- description: GEPHY TX clock source
- description: UNIPHY RX clock source
- description: UNIPHY TX clk source
required:
- compatible
- clocks
allOf:
- $ref: qcom,gcc.yaml#
unevaluatedProperties: false
examples:
- |
clock-controller@1800000 {
compatible = "qcom,gcc-ipq5018";
reg = <0x01800000 0x80000>;
clocks = <&xo_board_clk>,
<&sleep_clk>,
<&pcie20_phy0_pipe_clk>,
<&pcie20_phy1_pipe_clk>,
<&usb3_phy0_pipe_clk>,
<&gephy_rx_clk>,
<&gephy_tx_clk>,
<&uniphy_rx_clk>,
<&uniphy_tx_clk>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
...
arch/arm64/boot/dts/qcom/Makefile
View file @ 6522fbd4
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8016-sbc-d3-camera-mezzanine.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8039-t2.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp441.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp442.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp468.dtb
......@@ -39,6 +41,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-thwc-uf896.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-thwc-ufi001c.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-wingtech-wt88047.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-yiming-uz801v3.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8939-samsung-a7.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8939-sony-xperia-kanuti-tulip.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8953-motorola-potter.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8953-xiaomi-daisy.dtb
......@@ -186,6 +189,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdx75-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm4450-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6115-fxtec-pro1x.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6115p-lenovo-j606f.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb
......
arch/arm64/boot/dts/qcom/apq8016-sbc-d3-camera-mezzanine.dts 0 → 100644
View file @ 6522fbd4
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
* Copyright (c) 2023, Linaro Ltd.
*/
/dts-v1/;
#include "apq8016-sbc.dts"
/ {
camera_vdddo_1v8: camera-vdddo-1v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdddo";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
camera_vdda_2v8: camera-vdda-2v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdda";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
camera_vddd_1v5: camera-vddd-1v5 {
compatible = "regulator-fixed";
regulator-name = "camera_vddd";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
};
&camss {
status = "okay";
ports {
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
data-lanes = <0 2>;
remote-endpoint = <&ov5640_ep>;
};
};
};
};
&cci {
status = "okay";
};
&cci_i2c0 {
camera_rear@3b {
compatible = "ovti,ov5640";
reg = <0x3b>;
powerdown-gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&camera_rear_default>;
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "xclk";
assigned-clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
assigned-clock-rates = <23880000>;
DOVDD-supply = <&camera_vdddo_1v8>;
AVDD-supply = <&camera_vdda_2v8>;
DVDD-supply = <&camera_vddd_1v5>;
port {
ov5640_ep: endpoint {
data-lanes = <1 2>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
};
arch/arm64/boot/dts/qcom/apq8016-sbc.dts
View file @ 6522fbd4
......@@ -34,30 +34,6 @@ chosen {
stdout-path = "serial0";
};
camera_vdddo_1v8: camera-vdddo-1v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdddo";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
camera_vdda_2v8: camera-vdda-2v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdda";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
camera_vddd_1v5: camera-vddd-1v5 {
compatible = "regulator-fixed";
regulator-name = "camera_vddd";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
reserved-memory {
ramoops@bff00000 {
compatible = "ramoops";
......@@ -77,7 +53,7 @@ usb2513 {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 121 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
......@@ -172,15 +148,13 @@ led@6 {
};
&blsp_i2c2 {
/* On Low speed expansion */
/* On Low speed expansion: LS-I2C0 */
status = "okay";
label = "LS-I2C0";
};
&blsp_i2c4 {
/* On High speed expansion */
/* On High speed expansion: HS-I2C2 */
status = "okay";
label = "HS-I2C2";
adv_bridge: bridge@39 {
status = "okay";
......@@ -228,21 +202,18 @@ adv7533_out: endpoint {
};
&blsp_i2c6 {
/* On Low speed expansion */
/* On Low speed expansion: LS-I2C1 */
status = "okay";
label = "LS-I2C1";
};
&blsp_spi3 {
/* On High speed expansion */
/* On High speed expansion: HS-SPI1 */
status = "okay";
label = "HS-SPI1";
};
&blsp_spi5 {
/* On Low speed expansion */
/* On Low speed expansion: LS-SPI0 */
status = "okay";
label = "LS-SPI0";
};
&blsp_uart1 {
......@@ -257,50 +228,6 @@ &blsp_uart2 {
&camss {
status = "okay";
ports {
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
data-lanes = <0 2>;
remote-endpoint = <&ov5640_ep>;
status = "okay";
};
};
};
};
&cci {
status = "okay";
};
&cci_i2c0 {
camera_rear@3b {
compatible = "ovti,ov5640";
reg = <0x3b>;
enable-gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&camera_rear_default>;
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "xclk";
clock-frequency = <23880000>;
vdddo-supply = <&camera_vdddo_1v8>;
vdda-supply = <&camera_vdda_2v8>;
vddd-supply = <&camera_vddd_1v5>;
/* No camera mezzanine by default */
status = "disabled";
port {
ov5640_ep: endpoint {
data-lanes = <0 2>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
};
&lpass {
......
arch/arm64/boot/dts/qcom/apq8039-t2.dts
View file @ 6522fbd4
......@@ -366,7 +366,6 @@ typec_irq: typec-irq-state {
function = "gpio";
pins = "gpio107";
bias-pull-up;
input-enable;
};
};
......@@ -375,7 +374,6 @@ &usb {
pinctrl-0 = <&pinctrl_otg_default>;
pinctrl-1 = <&pinctrl_otg_host>;
pinctrl-2 = <&pinctrl_otg_device>;
pin-switch-delay-us = <100000>;
usb-role-switch;
status = "okay";
......
arch/arm64/boot/dts/qcom/apq8096-db820c.dts
View file @ 6522fbd4
......@@ -99,14 +99,14 @@ button {
usb2_id: usb2-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pmi8994_gpios 6 GPIO_ACTIVE_HIGH>;
id-gpios = <&pmi8994_gpios 6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb2_vbus_det_gpio>;
};
usb3_id: usb3-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pm8994_gpios 22 GPIO_ACTIVE_HIGH>;
id-gpios = <&pm8994_gpios 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_vbus_det_gpio>;
};
......@@ -138,8 +138,7 @@ wlan_en: wlan-en-1-8v {
};
&blsp1_i2c3 {
/* On Low speed expansion */
label = "LS-I2C0";
/* On Low speed expansion: LS-I2C0 */
status = "okay";
};
......@@ -168,14 +167,12 @@ &adsp_pil {
};
&blsp2_i2c1 {
/* On High speed expansion */
label = "HS-I2C2";
/* On High speed expansion: HS-I2C2 */
status = "okay";
};
&blsp2_i2c1 {
/* On Low speed expansion */
label = "LS-I2C1";
/* On Low speed expansion: LS-I2C1 */
status = "okay";
};
......@@ -236,8 +233,8 @@ &mdss_hdmi {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mdss_hdmi_hpd_active &mdss_hdmi_ddc_active>;
pinctrl-1 = <&mdss_hdmi_hpd_suspend &mdss_hdmi_ddc_suspend>;
pinctrl-0 = <&hdmi_hpd_active &hdmi_ddc_active>;
pinctrl-1 = <&hdmi_hpd_suspend &hdmi_ddc_suspend>;
core-vdda-supply = <&vreg_l12a_1p8>;
core-vcc-supply = <&vreg_s4a_1p8>;
......@@ -433,28 +430,28 @@ sdc2_cd_off: sdc2-cd-off-state {
drive-strength = <2>;
};
mdss_hdmi_hpd_active: mdss_hdmi-hpd-active-state {
hdmi_hpd_active: hdmi-hpd-active-state {
pins = "gpio34";
function = "hdmi_hot";
bias-pull-down;
drive-strength = <16>;
};
mdss_hdmi_hpd_suspend: mdss_hdmi-hpd-suspend-state {
hdmi_hpd_suspend: hdmi-hpd-suspend-state {
pins = "gpio34";
function = "hdmi_hot";
bias-pull-down;
drive-strength = <2>;
};
mdss_hdmi_ddc_active: mdss_hdmi-ddc-active-state {
hdmi_ddc_active: hdmi-ddc-active-state {
pins = "gpio32", "gpio33";
function = "hdmi_ddc";
drive-strength = <2>;
bias-pull-up;
};
mdss_hdmi_ddc_suspend: mdss_hdmi-ddc-suspend-state {
hdmi_ddc_suspend: hdmi-ddc-suspend-state {
pins = "gpio32", "gpio33";
function = "hdmi_ddc";
drive-strength = <2>;
......@@ -1043,7 +1040,7 @@ cpu {
};
};
mdss_hdmi-dai-link {
hdmi-dai-link {
link-name = "HDMI";
cpu {
sound-dai = <&q6afedai HDMI_RX>;
......
arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts 0 → 100644
View file @ 6522fbd4
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* IPQ5018 MP03.1-C2 board device tree source
*
* Copyright (c) 2023 The Linux Foundation. All rights reserved.
*/
/dts-v1/;
#include "ipq5018.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ5018/AP-RDP432.1-C2";
compatible = "qcom,ipq5018-rdp432-c2", "qcom,ipq5018";
aliases {
serial0 = &blsp1_uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&blsp1_uart1 {
pinctrl-0 = <&uart1_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhc_1 {
pinctrl-0 = <&sdc_default_state>;
pinctrl-names = "default";
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <192000000>;
bus-width = <4>;
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&tlmm {
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio9";
function = "sdc1_clk";
drive-strength = <8>;
bias-disable;
};
cmd-pins {
pins = "gpio8";
function = "sdc1_cmd";
drive-strength = <8>;
bias-pull-up;
};
data-pins {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "sdc1_data";
drive-strength = <8>;
bias-disable;
};
};
};
&xo_board_clk {
clock-frequency = <24000000>;
};
arch/arm64/boot/dts/qcom/ipq5018.dtsi 0 → 100644
View file @ 6522fbd4
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* IPQ5018 SoC device tree source
*
* Copyright (c) 2023 The Linux Foundation. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-ipq5018.h>
#include <dt-bindings/reset/qcom,gcc-ipq5018.h>
/ {
interrupt-parent = <&intc>;
#address-cells = <2>;
#size-cells = <2>;
clocks {
sleep_clk: sleep-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
};
xo_board_clk: xo-board-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
CPU0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
enable-method = "psci";
next-level-cache = <&L2_0>;
};
CPU1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
enable-method = "psci";
next-level-cache = <&L2_0>;
};
L2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-size = <0x80000>;
cache-unified;
};
};
firmware {
scm {
compatible = "qcom,scm-ipq5018", "qcom,scm";
};
};
memory@40000000 {
device_type = "memory";
/* We expect the bootloader to fill in the size */
reg = <0x0 0x40000000 0x0 0x0>;
};
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
tz_region: tz@4ac00000 {
reg = <0x0 0x4ac00000 0x0 0x200000>;
no-map;
};
};
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq5018-tlmm";
reg = <0x01000000 0x300000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&tlmm 0 0 47>;
interrupt-controller;
#interrupt-cells = <2>;
uart1_pins: uart1-state {
pins = "gpio31", "gpio32", "gpio33", "gpio34";
function = "blsp1_uart1";
drive-strength = <8>;
bias-pull-down;
};
};
gcc: clock-controller@1800000 {
compatible = "qcom,gcc-ipq5018";
reg = <0x01800000 0x80000>;
clocks = <&xo_board_clk>,
<&sleep_clk>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<0>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
sdhc_1: mmc@7804000 {
compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
reg = <0x7804000 0x1000>;
reg-names = "hc";
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_AHB_CLK>,
<&gcc GCC_SDCC1_APPS_CLK>,
<&xo_board_clk>;
clock-names = "iface", "core", "xo";
non-removable;
status = "disabled";
};
blsp1_uart1: serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x078af000 0x200>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
reg = <0x0b000000 0x1000>, /* GICD */
<0x0b002000 0x2000>, /* GICC */
<0x0b001000 0x1000>, /* GICH */
<0x0b004000 0x2000>; /* GICV */
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-controller;
#interrupt-cells = <3>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0b00a000 0x1ffa>;
v2m0: v2m@0 {
compatible = "arm,gic-v2m-frame";
reg = <0x00000000 0xff8>;
msi-controller;
};
v2m1: v2m@1000 {
compatible = "arm,gic-v2m-frame";
reg = <0x00001000 0xff8>;
msi-controller;
};
};
timer@b120000 {
compatible = "arm,armv7-timer-mem";
reg = <0x0b120000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
frame@b120000 {
reg = <0x0b121000 0x1000>,
<0x0b122000 0x1000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
frame-number = <0>;
};
frame@b123000 {
reg = <0xb123000 0x1000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
frame-number = <1>;
status = "disabled";
};
frame@b124000 {
frame-number = <2>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x0b124000 0x1000>;
status = "disabled";
};
frame@b125000 {
reg = <0x0b125000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
frame-number = <3>;
status = "disabled";
};
frame@b126000 {
reg = <0x0b126000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
frame-number = <4>;
status = "disabled";
};
frame@b127000 {
reg = <0x0b127000 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
frame-number = <5>;
status = "disabled";
};
frame@b128000 {
reg = <0x0b128000 0x1000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
frame-number = <6>;
status = "disabled";
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
};
arch/arm64/boot/dts/qcom/ipq5332-rdp-common.dtsi 0 → 100644
View file @ 6522fbd4
// SPDX-License-Identifier: BSD-3-Clause
/*
* IPQ5332 RDP board common device tree source
*
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ipq5332.dtsi"
/ {
aliases {
serial0 = &blsp1_uart0;
};
chosen {
stdout-path = "serial0";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default>;
pinctrl-names = "default";
button-wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&gpio_leds_default>;
pinctrl-names = "default";
led-0 {
gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
};
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board {
clock-frequency = <24000000>;
};
/* PINCTRL */
&tlmm {
gpio_keys_default: gpio-keys-default-state {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
gpio_leds_default: gpio-leds-default-state {
pins = "gpio36";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
View file @ 6522fbd4
......@@ -7,25 +7,11 @@
/dts-v1/;
#include "ipq5332.dtsi"
#include "ipq5332-rdp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2";
compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
aliases {
serial0 = &blsp1_uart0;
};
chosen {
stdout-path = "serial0";
};
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_i2c1 {
......@@ -46,16 +32,6 @@ &sdhc {
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board {
clock-frequency = <24000000>;
};
/* PINCTRL */
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";
......
arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts
View file @ 6522fbd4
......@@ -7,25 +7,11 @@
/dts-v1/;
#include "ipq5332.dtsi"
#include "ipq5332-rdp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ5332 MI01.3";
compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332";
aliases {
serial0 = &blsp1_uart0;
};
chosen {
stdout-path = "serial0";
};
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_i2c1 {
......@@ -60,16 +46,6 @@ &sdhc {
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board {
clock-frequency = <24000000>;
};
/* PINCTRL */
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";
......
arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts
View file @ 6522fbd4
......@@ -7,25 +7,11 @@
/dts-v1/;
#include "ipq5332.dtsi"
#include "ipq5332-rdp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ5332 MI01.6";
compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
aliases {
serial0 = &blsp1_uart0;
};
chosen {
stdout-path = "serial0";
};
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_spi0 {
......@@ -53,14 +39,6 @@ &sdhc {
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board {
clock-frequency = <24000000>;
};
/* PINCTRL */
&tlmm {
......
arch/arm64/boot/dts/qcom/ipq5332-rdp474.dts
View file @ 6522fbd4
......@@ -7,41 +7,11 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ipq5332.dtsi"
#include "ipq5332-rdp-common.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ5332 MI01.9";
compatible = "qcom,ipq5332-ap-mi01.9", "qcom,ipq5332";
aliases {
serial0 = &blsp1_uart0;
};
chosen {
stdout-path = "serial0";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio_keys_default_state>;
pinctrl-names = "default";
button-wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
};
&blsp1_uart0 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
&blsp1_i2c1 {
......@@ -62,24 +32,9 @@ &sdhc {
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board {
clock-frequency = <24000000>;
};
/* PINCTRL */
&tlmm {
gpio_keys_default_state: gpio-keys-default-state {
pins = "gpio35";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";
function = "blsp1_i2c0";
......
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View file @ 6522fbd4
......@@ -146,6 +146,32 @@ psci: psci {
method = "smc";
};
rpm: remoteproc {
compatible = "qcom,ipq6018-rpm-proc", "qcom,rpm-proc";
glink-edge {
compatible = "qcom,glink-rpm";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
mboxes = <&apcs_glb 0>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-ipq6018";
qcom,glink-channels = "rpm_requests";
regulators {
compatible = "qcom,rpm-mp5496-regulators";
ipq6018_s2: s2 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1062500>;
regulator-always-on;
};
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
......@@ -182,28 +208,6 @@ q6_region: memory@4ab00000 {
};
};
rpm-glink {
compatible = "qcom,glink-rpm";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
mboxes = <&apcs_glb 0>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-ipq6018";
qcom,glink-channels = "rpm_requests";
regulators {
compatible = "qcom,rpm-mp5496-regulators";
ipq6018_s2: s2 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1062500>;
regulator-always-on;
};
};
};
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_region>;
......
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View file @ 6522fbd4
......@@ -794,10 +794,10 @@ frame@b128000 {
pcie1: pci@10000000 {
compatible = "qcom,pcie-ipq8074";
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x00088000 0x2000>,
<0x10100000 0x1000>;
reg = <0x10000000 0xf1d>,
<0x10000f20 0xa8>,
<0x00088000 0x2000>,
<0x10100000 0x1000>;
reg-names = "dbi", "elbi", "parf", "config";
device_type = "pci";
linux,pci-domain = <1>;
......
arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
View file @ 6522fbd4
......@@ -21,6 +21,24 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
regulator_fixed_3p3: s3300 {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
regulator-name = "fixed_3p3";
};
regulator_fixed_0p925: s0925 {
compatible = "regulator-fixed";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <925000>;
regulator-boot-on;
regulator-always-on;
regulator-name = "fixed_0p925";
};
};
&blsp1_uart2 {
......@@ -45,6 +63,13 @@ ipq9574_s1: s1 {
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1075000>;
};
mp5496_l2: l2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
};
};
......@@ -98,6 +123,29 @@ rclk-pins {
};
};
&usb_0_dwc3 {
dr_mode = "host";
};
&usb_0_qmpphy {
vdda-pll-supply = <&mp5496_l2>;
vdda-phy-supply = <&regulator_fixed_0p925>;
status = "okay";
};
&usb_0_qusbphy {
vdd-supply = <&regulator_fixed_0p925>;
vdda-pll-supply = <&mp5496_l2>;
vdda-phy-dpdm-supply = <&regulator_fixed_3p3>;
status = "okay";
};
&usb3 {
status = "okay";
};
&xo_board_clk {
clock-frequency = <24000000>;
};
arch/arm64/boot/dts/qcom/ipq9574.dtsi
View file @ 6522fbd4
......@@ -10,6 +10,7 @@
#include <dt-bindings/clock/qcom,ipq9574-gcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/qcom,ipq9574-gcc.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
......@@ -42,6 +43,7 @@ CPU0: cpu@0 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq9574_s1>;
#cooling-cells = <2>;
};
CPU1: cpu@1 {
......@@ -54,6 +56,7 @@ CPU1: cpu@1 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq9574_s1>;
#cooling-cells = <2>;
};
CPU2: cpu@2 {
......@@ -66,6 +69,7 @@ CPU2: cpu@2 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq9574_s1>;
#cooling-cells = <2>;
};
CPU3: cpu@3 {
......@@ -78,6 +82,7 @@ CPU3: cpu@3 {
clock-names = "cpu";
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&ipq9574_s1>;
#cooling-cells = <2>;
};
L2_0: l2-cache {
......@@ -151,6 +156,22 @@ psci {
method = "smc";
};
rpm: remoteproc {
compatible = "qcom,ipq9574-rpm-proc", "qcom,rpm-proc";
glink-edge {
compatible = "qcom,glink-rpm";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
mboxes = <&apcs_glb 0>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-ipq9574";
qcom,glink-channels = "rpm_requests";
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
......@@ -179,18 +200,6 @@ smem@4aa00000 {
};
};
rpm-glink {
compatible = "qcom,glink-rpm";
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
mboxes = <&apcs_glb 0>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-ipq9574";
qcom,glink-channels = "rpm_requests";
};
};
soc: soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -401,6 +410,8 @@ blsp1_i2c1: i2c@78b6000 {
clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
status = "disabled";
......@@ -429,6 +440,8 @@ blsp1_i2c2: i2c@78b7000 {
clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 16>, <&blsp_dma 17>;
dma-names = "tx", "rx";
status = "disabled";
......@@ -457,6 +470,8 @@ blsp1_i2c3: i2c@78b8000 {
clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 18>, <&blsp_dma 19>;
dma-names = "tx", "rx";
status = "disabled";
......@@ -486,6 +501,8 @@ blsp1_i2c4: i2c@78b9000 {
clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
assigned-clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
assigned-clock-rates = <50000000>;
dmas = <&blsp_dma 20>, <&blsp_dma 21>;
dma-names = "tx", "rx";
status = "disabled";
......@@ -505,6 +522,91 @@ blsp1_spi4: spi@78b9000 {
status = "disabled";
};
usb_0_qusbphy: phy@7b000 {
compatible = "qcom,ipq9574-qusb2-phy";
reg = <0x0007b000 0x180>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
<&xo_board_clk>;
clock-names = "cfg_ahb",
"ref";
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
status = "disabled";
};
usb_0_qmpphy: phy@7d000 {
compatible = "qcom,ipq9574-qmp-usb3-phy";
reg = <0x0007d000 0xa00>;
#phy-cells = <0>;
clocks = <&gcc GCC_USB0_AUX_CLK>,
<&xo_board_clk>,
<&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
<&gcc GCC_USB0_PIPE_CLK>;
clock-names = "aux",
"ref",
"cfg_ahb",
"pipe";
resets = <&gcc GCC_USB0_PHY_BCR>,
<&gcc GCC_USB3PHY_0_PHY_BCR>;
reset-names = "phy",
"phy_phy";
#clock-cells = <0>;
clock-output-names = "usb0_pipe_clk";
status = "disabled";
};
usb3: usb@8af8800 {
compatible = "qcom,ipq9574-dwc3", "qcom,dwc3";
reg = <0x08af8800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&gcc GCC_SNOC_USB_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_ANOC_USB_AXI_CLK>,
<&gcc GCC_USB0_SLEEP_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
"core",
"iface",
"sleep",
"mock_utmi";
assigned-clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
assigned-clock-rates = <200000000>,
<24000000>;
interrupts-extended = <&intc GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event";
resets = <&gcc GCC_USB_BCR>;
status = "disabled";
usb_0_dwc3: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x8a00000 0xcd00>;
clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "ref";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb_0_qusbphy>, <&usb_0_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
};
};
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
reg = <0x0b000000 0x1000>, /* GICD */
......@@ -727,18 +829,28 @@ cpu0-thermal {
thermal-sensors = <&tsens 10>;
trips {
cpu-critical {
cpu0_crit: cpu-critical {
temperature = <120000>;
hysteresis = <10000>;
type = "critical";
};
cpu-passive {
cpu0_alert: cpu-passive {
temperature = <110000>;
hysteresis = <1000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu0_alert>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
cpu1-thermal {
......@@ -747,18 +859,28 @@ cpu1-thermal {
thermal-sensors = <&tsens 11>;
trips {
cpu-critical {
cpu1_crit: cpu-critical {
temperature = <120000>;
hysteresis = <10000>;
type = "critical";
};
cpu-passive {
cpu1_alert: cpu-passive {
temperature = <110000>;
hysteresis = <1000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu1_alert>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
cpu2-thermal {
......@@ -767,18 +889,28 @@ cpu2-thermal {
thermal-sensors = <&tsens 12>;
trips {
cpu-critical {
cpu2_crit: cpu-critical {
temperature = <120000>;
hysteresis = <10000>;
type = "critical";
};
cpu-passive {
cpu2_alert: cpu-passive {
temperature = <110000>;
hysteresis = <1000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu2_alert>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
cpu3-thermal {
......@@ -787,18 +919,28 @@ cpu3-thermal {
thermal-sensors = <&tsens 13>;
trips {
cpu-critical {
cpu3_crit: cpu-critical {
temperature = <120000>;
hysteresis = <10000>;
type = "critical";
};
cpu-passive {
cpu3_alert: cpu-passive {
temperature = <110000>;
hysteresis = <1000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu3_alert>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
wcss-phyb-thermal {
......
arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts
View file @ 6522fbd4
......@@ -48,7 +48,7 @@ button-volume-up {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
......
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts
View file @ 6522fbd4
......@@ -52,7 +52,7 @@ led-0 {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 69 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 69 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
......
arch/arm64/boot/dts/qcom/msm8916-gplus-fl8005a.dts
View file @ 6522fbd4
......@@ -75,7 +75,7 @@ led-green {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&usb_id_default>;
pinctrl-names = "default";
};
......
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts
View file @ 6522fbd4
......@@ -80,7 +80,7 @@ led-2 {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 117 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
......
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
View file @ 6522fbd4
......@@ -165,7 +165,7 @@ light-sensor@23 {
pinctrl-0 = <&light_int_default>;
vdd-supply = <&pm8916_l17>;
vio-supply = <&pm8916_l6>;
vddio-supply = <&pm8916_l6>;
};
gyroscope@68 {
......
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts
View file @ 6522fbd4
......@@ -68,7 +68,7 @@ led-0 {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
......
arch/arm64/boot/dts/qcom/msm8916-mtp.dts
View file @ 6522fbd4
......@@ -10,6 +10,7 @@
/ {
model = "Qualcomm Technologies, Inc. MSM 8916 MTP";
compatible = "qcom,msm8916-mtp", "qcom,msm8916-mtp/1", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp_uart2;
......
arch/arm64/boot/dts/qcom/msm8916-samsung-e2015-common.dtsi
View file @ 6522fbd4
......@@ -42,10 +42,27 @@ reg_touch_key: regulator-touch-key {
&blsp_i2c2 {
/* lis2hh12 accelerometer instead of BMC150 */
status = "disabled";
/delete-node/ accelerometer@10;
/delete-node/ magnetometer@12;
accelerometer@1d {
compatible = "st,lis2hh12";
reg = <0x1d>;
interrupt-parent = <&tlmm>;
interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
vdd-supply = <&pm8916_l5>;
vddio-supply = <&pm8916_l5>;
st,drdy-int-pin = <1>;
mount-matrix = "1", "0", "0",
"0", "-1", "0",
"0", "0", "1";
pinctrl-0 = <&accel_int_default>;
pinctrl-names = "default";
};
};
&reg_motor_vdd {
......
arch/arm64/boot/dts/qcom/msm8916-samsung-e5.dts
View file @ 6522fbd4
......@@ -22,3 +22,23 @@ / {
compatible = "samsung,e5", "qcom,msm8916";
chassis-type = "handset";
};
&blsp_i2c5 {
status = "okay";
touchscreen@48 {
compatible = "melfas,mms345l";
reg = <0x48>;
interrupts-extended = <&tlmm 13 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <720>;
touchscreen-size-y = <1280>;
avdd-supply = <&reg_vdd_tsp_a>;
vdd-supply = <&pm8916_l6>;
pinctrl-0 = <&ts_int_default>;
pinctrl-names = "default";
};
};
arch/arm64/boot/dts/qcom/msm8916-samsung-gt5-common.dtsi
View file @ 6522fbd4
......@@ -101,7 +101,6 @@ accelerometer@1d {
interrupt-parent = <&tlmm>;
interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "INT1";
st,drdy-int-pin = <1>;
mount-matrix = "0", "1", "0",
......
arch/arm64/boot/dts/qcom/msm8916-samsung-j5-common.dtsi
View file @ 6522fbd4
......@@ -86,6 +86,26 @@ muic: extcon@25 {
};
};
&blsp_i2c5 {
status = "okay";
touchscreen: touchscreen@50 {
compatible = "imagis,ist3038c";
reg = <0x50>;
interrupt-parent = <&tlmm>;
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <720>;
touchscreen-size-y = <1280>;
vddio-supply = <&pm8916_l6>;
pinctrl-0 = <&tsp_int_default>;
pinctrl-names = "default";
};
};
&blsp_uart2 {
status = "okay";
};
......@@ -162,6 +182,15 @@ muic_int_default: muic-int-default-state {
sdc2_cd_default: sdc2-cd-default-state {
pins = "gpio38";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tsp_int_default: tsp-int-default-state {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
......
arch/arm64/boot/dts/qcom/msm8916-samsung-j5.dts
View file @ 6522fbd4
......@@ -10,6 +10,14 @@ / {
chassis-type = "handset";
};
&blsp_i2c5 {
status = "disabled";
};
&touchscreen {
/* FIXME: Missing sm5703-mfd driver to power up vdd-supply */
};
&usb_hs_phy {
qcom,init-seq = /bits/ 8 <0x1 0x19 0x2 0x0b>;
};
arch/arm64/boot/dts/qcom/msm8916-samsung-j5x.dts
View file @ 6522fbd4
......@@ -8,12 +8,38 @@ / {
model = "Samsung Galaxy J5 (2016)";
compatible = "samsung,j5x", "qcom,msm8916";
chassis-type = "handset";
reg_vdd_tsp_a: regulator-vdd-tsp-a {
compatible = "regulator-fixed";
regulator-name = "vdd_tsp_a";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&tlmm 108 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-0 = <&tsp_ldo_en_default>;
pinctrl-names = "default";
};
};
&muic {
interrupts = <121 IRQ_TYPE_EDGE_FALLING>;
};
&touchscreen {
vdd-supply = <&reg_vdd_tsp_a>;
};
&tlmm {
tsp_ldo_en_default: tsp-ldo-en-default-state {
pins = "gpio108";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};
&muic_int_default {
pins = "gpio121";
};
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts
View file @ 6522fbd4
......@@ -142,6 +142,12 @@ muic: extcon@14 {
pinctrl-names = "default";
pinctrl-0 = <&muic_irq_default>;
usb_con: connector {
compatible = "usb-b-connector";
label = "micro-USB";
type = "micro";
};
};
};
......@@ -199,6 +205,15 @@ nfc@2b {
pinctrl-0 = <&nfc_default>;
};
};
battery: battery {
compatible = "simple-battery";
precharge-current-microamp = <450000>;
constant-charge-current-max-microamp = <1000000>;
charge-term-current-microamp = <150000>;
precharge-upper-limit-microvolt = <3500000>;
constant-charge-voltage-max-microvolt = <4350000>;
};
};
&blsp_i2c2 {
......@@ -219,16 +234,16 @@ magnetometer@2e {
compatible = "yamaha,yas537";
reg = <0x2e>;
mount-matrix = "0", "1", "0",
"1", "0", "0",
"0", "0", "-1";
mount-matrix = "0", "1", "0",
"1", "0", "0",
"0", "0", "-1";
};
};
&blsp_i2c4 {
status = "okay";
battery@35 {
fuel-gauge@35 {
compatible = "richtek,rt5033-battery";
reg = <0x35>;
......@@ -237,6 +252,8 @@ battery@35 {
pinctrl-names = "default";
pinctrl-0 = <&fg_alert_default>;
power-supplies = <&rt5033_charger>;
};
};
......@@ -261,6 +278,43 @@ touchscreen@20 {
};
};
&blsp_i2c6 {
status = "okay";
pmic@34 {
compatible = "richtek,rt5033";
reg = <0x34>;
interrupt-parent = <&tlmm>;
interrupts = <62 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_default>;
regulators {
rt5033_reg_safe_ldo: SAFE_LDO {
regulator-min-microvolt = <4900000>;
regulator-max-microvolt = <4900000>;
regulator-always-on;
};
rt5033_reg_ldo: LDO {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
rt5033_reg_buck: BUCK {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
};
rt5033_charger: charger {
compatible = "richtek,rt5033-charger";
monitored-battery = <&battery>;
richtek,usb-connector = <&usb_con>;
};
};
};
&blsp_uart2 {
status = "okay";
};
......@@ -387,6 +441,14 @@ nfc_i2c_default: nfc-i2c-default-state {
bias-disable;
};
pmic_int_default: pmic-int-default-state {
pins = "gpio62";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tkey_default: tkey-default-state {
pins = "gpio98";
function = "gpio";
......
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts
View file @ 6522fbd4
......@@ -56,7 +56,7 @@ button-volume-up {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
......
arch/arm64/boot/dts/qcom/msm8916.dtsi
View file @ 6522fbd4
......@@ -282,10 +282,10 @@ CLUSTER_PD: power-domain-cluster {
};
};
smd {
compatible = "qcom,smd";
rpm: remoteproc {
compatible = "qcom,msm8916-rpm-proc", "qcom,rpm-proc";
rpm {
smd-edge {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
......@@ -1712,6 +1712,14 @@ camss: camss@1b0ac00 {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
};
port@1 {
reg = <1>;
};
};
};
......
arch/arm64/boot/dts/qcom/msm8939-samsung-a7.dts 0 → 100644
View file @ 6522fbd4
This diff is collapsed.
arch/arm64/boot/dts/qcom/msm8939-sony-xperia-kanuti-tulip.dts
View file @ 6522fbd4
......@@ -16,6 +16,7 @@
/ {
model = "Sony Xperia M4 Aqua";
compatible = "sony,kanuti-tulip", "qcom,msm8939";
chassis-type = "handset";
qcom,board-id = <QCOM_BOARD_ID_MTP 0>;
qcom,msm-id = <QCOM_ID_MSM8939 0>, <QCOM_ID_MSM8939 0x30000>;
......@@ -32,7 +33,7 @@ chosen {
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 110 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&usb_id_default>;
pinctrl-names = "default";
};
......
arch/arm64/boot/dts/qcom/msm8939.dtsi
View file @ 6522fbd4
......@@ -55,6 +55,7 @@ CPU0: cpu@100 {
L2_1: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};
......@@ -111,6 +112,7 @@ CPU4: cpu@0 {
L2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
};
};
......@@ -155,7 +157,7 @@ CPU7: cpu@3 {
idle-states {
CPU_SLEEP_0: cpu-sleep-0 {
compatible ="qcom,idle-state-spc", "arm,idle-state";
compatible = "arm,idle-state";
entry-latency-us = <130>;
exit-latency-us = <150>;
min-residency-us = <2000>;
......@@ -240,6 +242,62 @@ pmu {
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
};
rpm: remoteproc {
compatible = "qcom,msm8936-rpm-proc", "qcom,rpm-proc";
smd-edge {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs1_mbox 8 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8936";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8936", "qcom,rpmcc";
#clock-cells = <1>;
clock-names = "xo";
clocks = <&xo_board>;
};
rpmpd: power-controller {
compatible = "qcom,msm8939-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <1>;
};
rpmpd_opp_svs_krait: opp2 {
opp-level = <2>;
};
rpmpd_opp_svs_soc: opp3 {
opp-level = <3>;
};
rpmpd_opp_nom: opp4 {
opp-level = <4>;
};
rpmpd_opp_turbo: opp5 {
opp-level = <5>;
};
rpmpd_opp_super_turbo: opp6 {
opp-level = <6>;
};
};
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
......@@ -308,62 +366,6 @@ mba_mem: mba@8cb00000 {
};
};
smd {
compatible = "qcom,smd";
rpm {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs1_mbox 8 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8936";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8936", "qcom,rpmcc";
#clock-cells = <1>;
clock-names = "xo";
clocks = <&xo_board>;
};
rpmpd: power-controller {
compatible = "qcom,msm8939-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <1>;
};
rpmpd_opp_svs_krait: opp2 {
opp-level = <2>;
};
rpmpd_opp_svs_soc: opp3 {
opp-level = <3>;
};
rpmpd_opp_nom: opp4 {
opp-level = <4>;
};
rpmpd_opp_turbo: opp5 {
opp-level = <5>;
};
rpmpd_opp_super_turbo: opp6 {
opp-level = <6>;
};
};
};
};
};
};
smp2p-hexagon {
compatible = "qcom,smp2p";
qcom,smem = <435>, <428>;
......@@ -386,8 +388,6 @@ hexagon_smp2p_in: slave-kernel {
interrupt-controller;
#interrupt-cells = <2>;
#address-cells = <0>;
#size-cells = <0>;
};
};
......@@ -1644,7 +1644,7 @@ sdhc_2: mmc@7864900 {
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";
clock-names = "iface", "core", "xo";
resets = <&gcc GCC_SDCC2_BCR>;
pinctrl-0 = <&sdc2_default>;
pinctrl-1 = <&sdc2_sleep>;
......@@ -1731,7 +1731,7 @@ blsp_i2c2: i2c@78b6000 {
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-names = "core", "iface";
dmas = <&blsp_dma 6>, <&blsp_dma 7>;
dma-names = "tx", "rx";
pinctrl-0 = <&blsp_i2c2_default>;
......@@ -1765,7 +1765,7 @@ blsp_i2c3: i2c@78b7000 {
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-names = "core", "iface";
dmas = <&blsp_dma 8>, <&blsp_dma 9>;
dma-names = "tx", "rx";
pinctrl-0 = <&blsp_i2c3_default>;
......@@ -1799,7 +1799,7 @@ blsp_i2c4: i2c@78b8000 {
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-names = "core", "iface";
dmas = <&blsp_dma 10>, <&blsp_dma 11>;
dma-names = "tx", "rx";
pinctrl-0 = <&blsp_i2c4_default>;
......@@ -1833,7 +1833,7 @@ blsp_i2c5: i2c@78b9000 {
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-names = "core", "iface";
dmas = <&blsp_dma 12>, <&blsp_dma 13>;
dma-names = "tx", "rx";
pinctrl-0 = <&blsp_i2c5_default>;
......@@ -1867,7 +1867,7 @@ blsp_i2c6: i2c@78ba000 {
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
clock-names = "core", "iface";
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
pinctrl-0 = <&blsp_i2c6_default>;
......@@ -1975,7 +1975,7 @@ wcnss_iris: iris {
};
smd-edge {
interrupts = <GIC_SPI 142 1>;
interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs1_mbox 8 17>;
qcom,smd-edge = <6>;
qcom,remote-pid = <4>;
......
arch/arm64/boot/dts/qcom/msm8953-xiaomi-daisy.dts
View file @ 6522fbd4
......@@ -17,7 +17,7 @@ / {
compatible = "xiaomi,daisy", "qcom,msm8953";
chassis-type = "handset";
qcom,msm-id = <293 0>;
qcom,board-id= <0x1000b 0x9>;
qcom,board-id = <0x1000b 0x9>;
chosen {
#address-cells = <2>;
......@@ -125,7 +125,7 @@ speaker_codec: audio-codec@3a {
vmon-slot-no = <1>;
imon-slot-no = <1>;
interleave_mode = <0>;
maxim,interleave-mode;
#sound-dai-cells = <0>;
};
......
arch/arm64/boot/dts/qcom/msm8953-xiaomi-tissot.dts
View file @ 6522fbd4
......@@ -96,7 +96,7 @@ max98927_codec: audio-codec@3a {
vmon-slot-no = <1>;
imon-slot-no = <1>;
#sound-dai-cells = <1>;
#sound-dai-cells = <0>;
};
led-controller@45 {
......
arch/arm64/boot/dts/qcom/msm8953-xiaomi-vince.dts
View file @ 6522fbd4
......@@ -20,7 +20,7 @@ / {
compatible = "xiaomi,vince", "qcom,msm8953";
chassis-type = "handset";
qcom,msm-id = <293 0>;
qcom,board-id= <0x1000b 0x08>;
qcom,board-id = <0x1000b 0x08>;
gpio-keys {
compatible = "gpio-keys";
......@@ -132,7 +132,6 @@ &i2c_3 {
touchscreen@20 {
reg = <0x20>;
compatible = "syna,rmi4-i2c";
interrupts-parent = <&tlmm>;
interrupts-extended = <&tlmm 65 IRQ_TYPE_EDGE_FALLING>;
#address-cells = <1>;
......
arch/arm64/boot/dts/qcom/msm8953.dtsi
View file @ 6522fbd4
......@@ -190,6 +190,74 @@ psci {
method = "smc";
};
rpm: remoteproc {
compatible = "qcom,msm8953-rpm-proc", "qcom,rpm-proc";
smd-edge {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8953";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8953", "qcom,rpmcc";
clocks = <&xo_board>;
clock-names = "xo";
#clock-cells = <1>;
};
rpmpd: power-controller {
compatible = "qcom,msm8953-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <RPM_SMD_LEVEL_RETENTION>;
};
rpmpd_opp_ret_plus: opp2 {
opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
};
rpmpd_opp_min_svs: opp3 {
opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
};
rpmpd_opp_low_svs: opp4 {
opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
};
rpmpd_opp_svs: opp5 {
opp-level = <RPM_SMD_LEVEL_SVS>;
};
rpmpd_opp_svs_plus: opp6 {
opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
};
rpmpd_opp_nom: opp7 {
opp-level = <RPM_SMD_LEVEL_NOM>;
};
rpmpd_opp_nom_plus: opp8 {
opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
};
rpmpd_opp_turbo: opp9 {
opp-level = <RPM_SMD_LEVEL_TURBO>;
};
};
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
......@@ -263,74 +331,6 @@ rmtfs@f2d00000 {
};
};
smd {
compatible = "qcom,smd";
rpm {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8953";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8953", "qcom,rpmcc";
clocks = <&xo_board>;
clock-names = "xo";
#clock-cells = <1>;
};
rpmpd: power-controller {
compatible = "qcom,msm8953-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <RPM_SMD_LEVEL_RETENTION>;
};
rpmpd_opp_ret_plus: opp2 {
opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
};
rpmpd_opp_min_svs: opp3 {
opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
};
rpmpd_opp_low_svs: opp4 {
opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
};
rpmpd_opp_svs: opp5 {
opp-level = <RPM_SMD_LEVEL_SVS>;
};
rpmpd_opp_svs_plus: opp6 {
opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
};
rpmpd_opp_nom: opp7 {
opp-level = <RPM_SMD_LEVEL_NOM>;
};
rpmpd_opp_nom_plus: opp8 {
opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
};
rpmpd_opp_turbo: opp9 {
opp-level = <RPM_SMD_LEVEL_TURBO>;
};
};
};
};
};
};
smp2p-adsp {
compatible = "qcom,smp2p";
qcom,smem = <443>, <429>;
......
arch/arm64/boot/dts/qcom/msm8976.dtsi
View file @ 6522fbd4
......@@ -232,6 +232,82 @@ psci {
method = "smc";
};
rpm: remoteproc {
compatible = "qcom,msm8976-rpm-proc", "qcom,rpm-proc";
smd-edge {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8976";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8976", "qcom,rpmcc";
clocks = <&xo_board>;
clock-names = "xo";
#clock-cells = <1>;
};
rpmpd: power-controller {
compatible = "qcom,msm8976-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <RPM_SMD_LEVEL_RETENTION>;
};
rpmpd_opp_ret_plus: opp2 {
opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
};
rpmpd_opp_min_svs: opp3 {
opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
};
rpmpd_opp_low_svs: opp4 {
opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
};
rpmpd_opp_svs: opp5 {
opp-level = <RPM_SMD_LEVEL_SVS>;
};
rpmpd_opp_svs_plus: opp6 {
opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
};
rpmpd_opp_nom: opp7 {
opp-level = <RPM_SMD_LEVEL_NOM>;
};
rpmpd_opp_nom_plus: opp8 {
opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
};
rpmpd_opp_turbo: opp9 {
opp-level = <RPM_SMD_LEVEL_TURBO>;
};
rpmpd_opp_turbo_no_cpr: opp10 {
opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
};
rpmpd_opp_turbo_high: opp111 {
opp-level = <RPM_SMD_LEVEL_TURBO_HIGH>;
};
};
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
......@@ -346,82 +422,6 @@ wcnss_smp2p_in: slave-kernel {
};
};
smd {
compatible = "qcom,smd";
rpm {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8976";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8976", "qcom,rpmcc";
clocks = <&xo_board>;
clock-names = "xo";
#clock-cells = <1>;
};
rpmpd: power-controller {
compatible = "qcom,msm8976-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <RPM_SMD_LEVEL_RETENTION>;
};
rpmpd_opp_ret_plus: opp2 {
opp-level = <RPM_SMD_LEVEL_RETENTION_PLUS>;
};
rpmpd_opp_min_svs: opp3 {
opp-level = <RPM_SMD_LEVEL_MIN_SVS>;
};
rpmpd_opp_low_svs: opp4 {
opp-level = <RPM_SMD_LEVEL_LOW_SVS>;
};
rpmpd_opp_svs: opp5 {
opp-level = <RPM_SMD_LEVEL_SVS>;
};
rpmpd_opp_svs_plus: opp6 {
opp-level = <RPM_SMD_LEVEL_SVS_PLUS>;
};
rpmpd_opp_nom: opp7 {
opp-level = <RPM_SMD_LEVEL_NOM>;
};
rpmpd_opp_nom_plus: opp8 {
opp-level = <RPM_SMD_LEVEL_NOM_PLUS>;
};
rpmpd_opp_turbo: opp9 {
opp-level = <RPM_SMD_LEVEL_TURBO>;
};
rpmpd_opp_turbo_no_cpr: opp10 {
opp-level = <RPM_SMD_LEVEL_TURBO_NO_CPR>;
};
rpmpd_opp_turbo_high: opp111 {
opp-level = <RPM_SMD_LEVEL_TURBO_HIGH>;
};
};
};
};
};
};
smsm {
compatible = "qcom,smsm";
......@@ -439,7 +439,7 @@ apps_smsm: apps@0 {
hexagon_smsm: hexagon@1 {
reg = <1>;
interrupts = <0 290 IRQ_TYPE_EDGE_RISING>;
interrupts = <GIC_SPI 290 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
......
arch/arm64/boot/dts/qcom/msm8994.dtsi
View file @ 6522fbd4
......@@ -178,6 +178,56 @@ psci {
method = "hvc";
};
rpm: remoteproc {
compatible = "qcom,msm8994-rpm-proc", "qcom,rpm-proc";
smd-edge {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
qcom,remote-pid = <6>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8994";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8994", "qcom,rpmcc";
#clock-cells = <1>;
};
rpmpd: power-controller {
compatible = "qcom,msm8994-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <1>;
};
rpmpd_opp_svs_krait: opp2 {
opp-level = <2>;
};
rpmpd_opp_svs_soc: opp3 {
opp-level = <3>;
};
rpmpd_opp_nom: opp4 {
opp-level = <4>;
};
rpmpd_opp_turbo: opp5 {
opp-level = <5>;
};
rpmpd_opp_super_turbo: opp6 {
opp-level = <6>;
};
};
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
......@@ -237,55 +287,6 @@ reserved@6c00000 {
};
};
smd {
compatible = "qcom,smd";
rpm {
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 0>;
qcom,smd-edge = <15>;
qcom,remote-pid = <6>;
rpm_requests: rpm-requests {
compatible = "qcom,rpm-msm8994";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8994", "qcom,rpmcc";
#clock-cells = <1>;
};
rpmpd: power-controller {
compatible = "qcom,msm8994-rpmpd";
#power-domain-cells = <1>;
operating-points-v2 = <&rpmpd_opp_table>;
rpmpd_opp_table: opp-table {
compatible = "operating-points-v2";
rpmpd_opp_ret: opp1 {
opp-level = <1>;
};
rpmpd_opp_svs_krait: opp2 {
opp-level = <2>;
};
rpmpd_opp_svs_soc: opp3 {
opp-level = <3>;
};
rpmpd_opp_nom: opp4 {
opp-level = <4>;
};
rpmpd_opp_turbo: opp5 {
opp-level = <5>;
};
rpmpd_opp_super_turbo: opp6 {
opp-level = <6>;
};
};
};
};
};
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;
......@@ -455,7 +456,7 @@ usb3: usb@f92f8800 {
usb@f9200000 {
compatible = "snps,dwc3";
reg = <0xf9200000 0xcc00>;
interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
maximum-speed = "high-speed";
......
arch/arm64/boot/dts/qcom/msm8996-mtp.dts
View file @ 6522fbd4
......@@ -10,6 +10,7 @@
/ {
model = "Qualcomm Technologies, Inc. MSM 8996 MTP";
compatible = "qcom,msm8996-mtp", "qcom,msm8996";
chassis-type = "handset";
aliases {
serial0 = &blsp2_uart2;
......
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dts
View file @ 6522fbd4
......@@ -24,5 +24,5 @@ &usb_detect {
};
&usb3_id {
id-gpio = <&tlmm 24 GPIO_ACTIVE_LOW>;
id-gpios = <&tlmm 24 GPIO_ACTIVE_LOW>;
};
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi
View file @ 6522fbd4
......@@ -71,7 +71,7 @@ panel_tvdd: tvdd-regulator {
usb3_id: usb3-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 25 GPIO_ACTIVE_LOW>;
id-gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usb_detect>;
};
......
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
View file @ 6522fbd4
......@@ -187,10 +187,9 @@ &adsp_pil {
&blsp2_i2c2 {
status = "okay";
label = "NFC_I2C";
clock-frequency = <400000>;
nfc: pn548@28 {
nfc: nfc@28 {
compatible = "nxp,nxp-nci-i2c";
reg = <0x28>;
......@@ -208,9 +207,8 @@ nfc: pn548@28 {
&blsp2_i2c3 {
status = "okay";
label = "TYPEC_I2C";
typec: tusb320l@47 {
typec: typec@47 {
compatible = "ti,tusb320l";
reg = <0x47>;
interrupt-parent = <&tlmm>;
......@@ -220,7 +218,7 @@ typec: tusb320l@47 {
&blsp2_i2c6 {
status = "okay";
label = "MSM_TS_I2C";
/* MSM_TS */
};
&blsp1_uart2 {
......
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
View file @ 6522fbd4
......@@ -82,7 +82,7 @@ synaptics@20 {
#size-cells = <0>;
interrupt-parent = <&tlmm>;
interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
vdda-supply = <&vreg_l6a_1p8>;
vio-supply = <&vreg_l6a_1p8>;
vdd-supply = <&vdd_3v2_tp>;
reset-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
......
arch/arm64/boot/dts/qcom/msm8996.dtsi
View file @ 6522fbd4
This diff is collapsed.
arch/arm64/boot/dts/qcom/msm8996pro-xiaomi-natrium.dts
View file @ 6522fbd4
......@@ -106,7 +106,7 @@ &slpi_pil {
&sound {
compatible = "qcom,apq8096-sndcard";
model = "natrium";
audio-routing = "RX_BIAS", "MCLK";
audio-routing = "RX_BIAS", "MCLK";
mm1-dai-link {
link-name = "MultiMedia1";
......
arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts
View file @ 6522fbd4
......@@ -31,7 +31,7 @@ aliases {
*/
extcon_usb: extcon-usb {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 38 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
};
gpio-hall-sensors {
......
arch/arm64/boot/dts/qcom/msm8998-mtp.dts
View file @ 6522fbd4
......@@ -11,6 +11,7 @@
/ {
model = "Qualcomm Technologies, Inc. MSM8998 v1 MTP";
compatible = "qcom,msm8998-mtp", "qcom,msm8998";
chassis-type = "handset";
qcom,board-id = <8 0>;
......
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino.dtsi
View file @ 6522fbd4
......@@ -89,8 +89,8 @@ vph_pwr: vph-pwr-regulator {
extcon_usb: extcon-usb {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 38 GPIO_ACTIVE_HIGH>;
vbus-gpio = <&tlmm 128 GPIO_ACTIVE_HIGH>;
id-gpios = <&tlmm 38 GPIO_ACTIVE_HIGH>;
vbus-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cc_dir_default &usb_detect_en>;
};
......
arch/arm64/boot/dts/qcom/msm8998-xiaomi-sagit.dts
View file @ 6522fbd4
......@@ -213,7 +213,6 @@ rmi4-f12@12 {
rmi4-f1a@1a {
reg = <0x1a>;
syna,codes = <KEY_BACK KEY_APPSELECT>;
};
};
};
......
arch/arm64/boot/dts/qcom/msm8998.dtsi
View file @ 6522fbd4
This diff is collapsed.
arch/arm64/boot/dts/qcom/pm6125.dtsi
View file @ 6522fbd4
......@@ -85,36 +85,42 @@ pm6125_adc: adc@3100 {
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
#io-channel-cells = <1>;
ref-gnd@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
vref-1p25@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
die-temp@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
};
vph-pwr@83 {
channel@83 {
reg = <ADC5_VPH_PWR>;
qcom,pre-scaling = <1 3>;
label = "vph_pwr";
};
vcoin@85 {
channel@85 {
reg = <ADC5_VCOIN>;
qcom,pre-scaling = <1 3>;
label = "vcoin";
};
xo-therm@4c {
channel@4c {
reg = <ADC5_XO_THERM_100K_PU>;
qcom,pre-scaling = <1 1>;
qcom,hw-settle-time = <200>;
qcom,ratiometric;
label = "xo_therm";
};
};
......
arch/arm64/boot/dts/qcom/pm6150.dtsi
View file @ 6522fbd4
......@@ -72,7 +72,7 @@ pm6150_adc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
label = "die_temp";
};
......
arch/arm64/boot/dts/qcom/pm6150l.dtsi
View file @ 6522fbd4
......@@ -60,25 +60,25 @@ pm6150l_adc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
adc-chan@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
adc-chan@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
};
adc-chan@83 {
channel@83 {
reg = <ADC5_VPH_PWR>;
qcom,pre-scaling = <1 3>;
label = "vph_pwr";
......@@ -121,8 +121,9 @@ pm6150l_flash: led-controller@d300 {
pm6150l_wled: leds@d800 {
compatible = "qcom,pm6150l-wled";
reg = <0xd800>, <0xd900>;
interrupts = <0x5 0xd8 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp";
interrupts = <0x5 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
<0x5 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp", "short";
label = "backlight";
status = "disabled";
......
arch/arm64/boot/dts/qcom/pm660.dtsi
View file @ 6522fbd4
......@@ -91,82 +91,93 @@ pm660_adc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
ref_gnd: ref_gnd@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,decimation = <1024>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
vref_1p25: vref_1p25@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,decimation = <1024>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
die_temp: die_temp@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,decimation = <1024>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
};
xo_therm: xo_therm@4c {
channel@4c {
reg = <ADC5_XO_THERM_100K_PU>;
qcom,pre-scaling = <1 1>;
qcom,decimation = <1024>;
qcom,hw-settle-time = <200>;
qcom,ratiometric;
label = "xo_therm";
};
msm_therm: msm_therm@4d {
channel@4d {
reg = <ADC5_AMUX_THM1_100K_PU>;
qcom,pre-scaling = <1 1>;
qcom,decimation = <1024>;
qcom,hw-settle-time = <200>;
qcom,ratiometric;
label = "msm_therm";
};
emmc_therm: emmc_therm@4e {
channel@4e {
reg = <ADC5_AMUX_THM2_100K_PU>;
qcom,pre-scaling = <1 1>;
qcom,decimation = <1024>;
qcom,hw-settle-time = <200>;
qcom,ratiometric;
label = "emmc_therm";
};
pa_therm0: thermistor0@4f {
channel@4f {
reg = <ADC5_AMUX_THM3_100K_PU>;
qcom,pre-scaling = <1 1>;
qcom,decimation = <1024>;
qcom,hw-settle-time = <200>;
qcom,ratiometric;
label = "pa_therm0";
};
pa_therm1: thermistor1@50 {
channel@50 {
reg = <ADC5_AMUX_THM4_100K_PU>;
qcom,pre-scaling = <1 1>;
qcom,decimation = <1024>;
qcom,hw-settle-time = <200>;
qcom,ratiometric;
label = "pa_therm1";
};
quiet_therm: quiet_therm@51 {
channel@51 {
reg = <ADC5_AMUX_THM5_100K_PU>;
qcom,pre-scaling = <1 1>;
qcom,decimation = <1024>;
qcom,hw-settle-time = <200>;
qcom,ratiometric;
label = "quiet_therm";
};
vadc_vph_pwr: vph_pwr@83 {
channel@83 {
reg = <ADC5_VPH_PWR>;
qcom,decimation = <1024>;
qcom,pre-scaling = <1 3>;
label = "vph_pwr";
};
vcoin: vcoin@85 {
channel@85 {
reg = <ADC5_VCOIN>;
qcom,decimation = <1024>;
qcom,pre-scaling = <1 3>;
label = "vcoin";
};
};
......
arch/arm64/boot/dts/qcom/pm660l.dtsi
View file @ 6522fbd4
......@@ -74,8 +74,9 @@ pm660l_lpg: pwm {
pm660l_wled: leds@d800 {
compatible = "qcom,pm660l-wled";
reg = <0xd800>, <0xd900>;
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp";
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
<0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp", "short";
label = "backlight";
status = "disabled";
......
arch/arm64/boot/dts/qcom/pm7250b.dtsi
View file @ 6522fbd4
......@@ -62,56 +62,56 @@ pm7250b_adc: adc@3100 {
#io-channel-cells = <1>;
interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
adc-chan@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
adc-chan@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
adc-chan@2 {
channel@2 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
};
adc-chan@7 {
channel@7 {
reg = <ADC5_USB_IN_I>;
qcom,pre-scaling = <1 1>;
label = "usb_in_i_uv";
};
adc-chan@8 {
channel@8 {
reg = <ADC5_USB_IN_V_16>;
qcom,pre-scaling = <1 16>;
label = "usb_in_v_div_16";
};
adc-chan@9 {
channel@9 {
reg = <ADC5_CHG_TEMP>;
qcom,pre-scaling = <1 1>;
label = "chg_temp";
};
adc-chan@e {
channel@e {
reg = <ADC5_AMUX_THM2>;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
label = "smb1390_therm";
};
adc-chan@1e {
channel@1e {
reg = <ADC5_MID_CHG_DIV6>;
qcom,pre-scaling = <1 6>;
label = "chg_mid";
};
adc-chan@4b {
channel@4b {
reg = <ADC5_BAT_ID_100K_PU>;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
......@@ -119,19 +119,19 @@ adc-chan@4b {
label = "bat_id";
};
adc-chan@83 {
channel@83 {
reg = <ADC5_VPH_PWR>;
qcom,pre-scaling = <1 3>;
label = "vph_pwr";
};
adc-chan@84 {
channel@84 {
reg = <ADC5_VBAT_SNS>;
qcom,pre-scaling = <1 3>;
label = "vbat_sns";
};
adc-chan@99 {
channel@99 {
reg = <ADC5_SBUx>;
qcom,pre-scaling = <1 3>;
label = "chg_sbux";
......@@ -147,6 +147,16 @@ pm7250b_adc_tm: adc-tm@3500 {
#size-cells = <0>;
status = "disabled";
};
pm7250b_gpios: pinctrl@c000 {
compatible = "qcom,pm7250b-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
gpio-controller;
gpio-ranges = <&pm7250b_gpios 0 0 12>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pmic@3 {
......
arch/arm64/boot/dts/qcom/pm7550ba.dtsi 0 → 100644
View file @ 6522fbd4
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm7550ba-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm7550ba_temp_alarm>;
trips {
trip0 {
temperature = <95000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <115000>;
hysteresis = <0>;
type = "hot";
};
trip2 {
temperature = <145000>;
hysteresis = <0>;
type = "critical";
};
};
};
};
};
&spmi_bus {
pm7550ba: pmic@7 {
compatible = "qcom,pm7550ba", "qcom,spmi-pmic";
reg = <7 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm7550ba_temp_alarm: temp-alarm@a00 {
compatible = "qcom,spmi-temp-alarm";
reg = <0xa00>;
interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
#thermal-sensor-cells = <0>;
};
pm7550ba_gpios: gpio@8800 {
compatible = "qcom,pm7550ba-gpio", "qcom,spmi-gpio";
reg = <0x8800>;
gpio-controller;
gpio-ranges = <&pm7550ba_gpios 0 0 8>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pm7550ba_eusb2_repeater: phy@fd00 {
compatible = "qcom,pm7550ba-eusb2-repeater", "qcom,pm8550b-eusb2-repeater";
reg = <0xfd00>;
#phy-cells = <0>;
};
};
};
arch/arm64/boot/dts/qcom/pm8150.dtsi
View file @ 6522fbd4
......@@ -90,19 +90,19 @@ pm8150_adc: adc@3100 {
#io-channel-cells = <1>;
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
ref-gnd@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
vref-1p25@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
die-temp@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
......
arch/arm64/boot/dts/qcom/pm8150b.dtsi
View file @ 6522fbd4
......@@ -76,25 +76,25 @@ pm8150b_adc: adc@3100 {
#io-channel-cells = <1>;
interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
ref-gnd@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
vref-1p25@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
die-temp@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
};
chg-temp@9 {
channel@9 {
reg = <ADC5_CHG_TEMP>;
qcom,pre-scaling = <1 1>;
label = "chg_temp";
......
arch/arm64/boot/dts/qcom/pm8150l.dtsi
View file @ 6522fbd4
......@@ -70,19 +70,19 @@ pm8150l_adc: adc@3100 {
#io-channel-cells = <1>;
interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
ref-gnd@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
vref-1p25@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
die-temp@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
......
arch/arm64/boot/dts/qcom/pm8350.dtsi
View file @ 6522fbd4
......@@ -8,7 +8,7 @@
/ {
thermal-zones {
pm8350_thermal: pm8350c-thermal {
pm8350_thermal: pm8350-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8350_temp_alarm>;
......
arch/arm64/boot/dts/qcom/pm8350b.dtsi
View file @ 6522fbd4
......@@ -8,7 +8,7 @@
/ {
thermal-zones {
pm8350b_thermal: pm8350c-thermal {
pm8350b_thermal: pm8350b-thermal {
polling-delay-passive = <100>;
polling-delay = <0>;
thermal-sensors = <&pm8350b_temp_alarm>;
......
arch/arm64/boot/dts/qcom/pm8916.dtsi
View file @ 6522fbd4
......@@ -66,27 +66,27 @@ pm8916_vadc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@0 {
channel@0 {
reg = <VADC_USBIN>;
qcom,pre-scaling = <1 10>;
};
adc-chan@7 {
channel@7 {
reg = <VADC_VSYS>;
qcom,pre-scaling = <1 3>;
};
adc-chan@8 {
channel@8 {
reg = <VADC_DIE_TEMP>;
};
adc-chan@9 {
channel@9 {
reg = <VADC_REF_625MV>;
};
adc-chan@a {
channel@a {
reg = <VADC_REF_1250MV>;
};
adc-chan@e {
channel@e {
reg = <VADC_GND_REF>;
};
adc-chan@f {
channel@f {
reg = <VADC_VDD_VADC>;
};
};
......
arch/arm64/boot/dts/qcom/pm8950.dtsi
View file @ 6522fbd4
......@@ -50,77 +50,90 @@ pm8950_vadc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
vcoin@5 {
channel@5 {
reg = <VADC_VCOIN>;
qcom,pre-scaling = <1 1>;
label = "vcoin";
};
vph-pwr@7 {
channel@7 {
reg = <VADC_VSYS>;
qcom,pre-scaling = <1 1>;
label = "vph_pwr";
};
die-temp@8 {
channel@8 {
reg = <VADC_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
};
ref-625mv@9 {
channel@9 {
reg = <VADC_REF_625MV>;
qcom,pre-scaling = <1 1>;
label = "ref_625mv";
};
ref-1250mv@a {
channel@a {
reg = <VADC_REF_1250MV>;
qcom,pre-scaling = <1 1>;
label = "ref_1250mv";
};
ref-buf-625mv@c {
channel@c {
reg = <VADC_SPARE1>;
qcom,pre-scaling = <1 1>;
label = "ref_buf_625mv";
};
ref-gnd@e {
channel@e {
reg = <VADC_GND_REF>;
label = "ref_gnd";
};
ref-vdd@f {
channel@f {
reg = <VADC_VDD_VADC>;
label = "ref_vdd";
};
pa-therm1@11 {
channel@11 {
reg = <VADC_P_MUX2_1_1>;
qcom,pre-scaling = <1 1>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
label = "pa_therm1";
};
case-therm@13 {
channel@13 {
reg = <VADC_P_MUX4_1_1>;
qcom,pre-scaling = <1 1>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
label = "case_therm";
};
xo-therm@32 {
channel@32 {
reg = <VADC_LR_MUX3_XO_THERM>;
qcom,pre-scaling = <1 1>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
label = "xo_therm";
};
pa-therm0@36 {
channel@36 {
reg = <VADC_LR_MUX7_HW_ID>;
qcom,pre-scaling = <1 1>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
label = "pa_therm0";
};
xo-therm-buf@3c {
channel@3c {
reg = <VADC_LR_MUX3_BUF_XO_THERM>;
qcom,pre-scaling = <1 1>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
label = "xo_therm_buf";
};
};
......
arch/arm64/boot/dts/qcom/pm8953.dtsi
View file @ 6522fbd4
......@@ -6,6 +6,37 @@
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/spmi/spmi.h>
/ {
thermal-zones {
pm8953-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm8953_temp>;
trips {
trip0 {
temperature = <105000>;
hysteresis = <0>;
type = "passive";
};
trip1 {
temperature = <125000>;
hysteresis = <0>;
type = "hot";
};
trip2 {
temperature = <145000>;
hysteresis = <0>;
type = "critical";
};
};
};
};
};
&spmi_bus {
pmic@0 {
compatible = "qcom,pm8953", "qcom,spmi-pmic";
......@@ -36,7 +67,7 @@ pm8953_resin: resin {
};
};
temp-alarm@2400 {
pm8953_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
......@@ -53,22 +84,22 @@ pm8953_vadc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@8 {
channel@8 {
reg = <VADC_DIE_TEMP>;
};
adc-chan@9 {
channel@9 {
reg = <VADC_REF_625MV>;
};
adc-chan@a {
channel@a {
reg = <VADC_REF_1250MV>;
};
adc-chan@c {
channel@c {
reg = <VADC_SPARE1>;
};
adc-chan@e {
channel@e {
reg = <VADC_GND_REF>;
};
adc-chan@f {
channel@f {
reg = <VADC_VDD_VADC>;
};
};
......
arch/arm64/boot/dts/qcom/pm8994.dtsi
View file @ 6522fbd4
......@@ -83,27 +83,27 @@ pm8994_vadc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@7 {
channel@7 {
reg = <VADC_VSYS>;
qcom,pre-scaling = <1 3>;
label = "vph_pwr";
};
adc-chan@8 {
channel@8 {
reg = <VADC_DIE_TEMP>;
label = "die_temp";
};
adc-chan@9 {
channel@9 {
reg = <VADC_REF_625MV>;
label = "ref_625mv";
};
adc-chan@a {
channel@a {
reg = <VADC_REF_1250MV>;
label = "ref_1250mv";
};
adc-chan@e {
channel@e {
reg = <VADC_GND_REF>;
};
adc-chan@f {
channel@f {
reg = <VADC_VDD_VADC>;
};
};
......
arch/arm64/boot/dts/qcom/pm8998.dtsi
View file @ 6522fbd4
......@@ -86,7 +86,7 @@ pm8998_adc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
label = "die_temp";
};
......
arch/arm64/boot/dts/qcom/pmi8950.dtsi
View file @ 6522fbd4
......@@ -20,37 +20,37 @@ pmi8950_vadc: adc@3100 {
#size-cells = <0>;
#io-channel-cells = <1>;
adc-chan@0 {
channel@0 {
reg = <VADC_USBIN>;
qcom,pre-scaling = <1 4>;
label = "usbin";
};
adc-chan@1 {
channel@1 {
reg = <VADC_DCIN>;
qcom,pre-scaling = <1 4>;
label = "dcin";
};
adc-chan@2 {
channel@2 {
reg = <VADC_VCHG_SNS>;
qcom,pre-scaling = <1 1>;
label = "vchg_sns";
};
adc-chan@9 {
channel@9 {
reg = <VADC_REF_625MV>;
qcom,pre-scaling = <1 1>;
label = "ref_625mv";
};
adc-chan@a {
channel@a {
reg = <VADC_REF_1250MV>;
qcom,pre-scaling = <1 1>;
label = "ref_1250mv";
};
adc-chan@d {
channel@d {
reg = <VADC_SPARE2>;
qcom,pre-scaling = <1 1>;
label = "chg_temp";
......@@ -87,8 +87,9 @@ pmic@3 {
pmi8950_wled: leds@d800 {
compatible = "qcom,pmi8950-wled";
reg = <0xd800>, <0xd900>;
interrupts = <0x3 0xd8 0x02 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "short";
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
<0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp", "short";
label = "backlight";
status = "disabled";
......
arch/arm64/boot/dts/qcom/pmi8994.dtsi
View file @ 6522fbd4
......@@ -54,8 +54,9 @@ pmi8994_spmi_regulators: regulators {
pmi8994_wled: wled@d800 {
compatible = "qcom,pmi8994-wled";
reg = <0xd800>, <0xd900>;
interrupts = <3 0xd8 0x02 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "short";
interrupts = <0x3 0xd8 0x1 IRQ_TYPE_EDGE_RISING>,
<0x3 0xd8 0x2 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ovp", "short";
qcom,cabc;
qcom,external-pfet;
status = "disabled";
......
arch/arm64/boot/dts/qcom/pmk8350.dtsi
View file @ 6522fbd4
......@@ -59,7 +59,7 @@ pmk8350_vadc: adc@3100 {
};
pmk8350_adc_tm: adc-tm@3400 {
compatible = "qcom,adc-tm7";
compatible = "qcom,spmi-adc-tm5-gen2";
reg = <0x3400>;
interrupts = <PMK8350_SID 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
......
arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi
View file @ 6522fbd4
......@@ -77,19 +77,19 @@ pmm8155au_1_adc: adc@3100 {
#io-channel-cells = <1>;
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
ref-gnd@0 {
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
vref-1p25@1 {
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
die-temp@6 {
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
......
arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi
View file @ 6522fbd4
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arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
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arch/arm64/boot/dts/qcom/sc7180-firmware-tfa.dtsi 0 → 100644
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arch/arm64/boot/dts/qcom/sc7180-idp.dts
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