Commit 6979c630 authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau/clk: switch to new-style timer macros

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 4f31c84e
...@@ -345,7 +345,10 @@ gf100_clk_prog_1(struct gf100_clk *clk, int idx) ...@@ -345,7 +345,10 @@ gf100_clk_prog_1(struct gf100_clk *clk, int idx)
{ {
struct nvkm_device *device = clk->base.subdev.device; struct nvkm_device *device = clk->base.subdev.device;
nvkm_mask(device, 0x137100, (1 << idx), 0x00000000); nvkm_mask(device, 0x137100, (1 << idx), 0x00000000);
nv_wait(clk, 0x137100, (1 << idx), 0x00000000); nvkm_msec(device, 2000,
if (!(nvkm_rd32(device, 0x137100) & (1 << idx)))
break;
);
} }
static void static void
...@@ -360,7 +363,10 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx) ...@@ -360,7 +363,10 @@ gf100_clk_prog_2(struct gf100_clk *clk, int idx)
if (info->coef) { if (info->coef) {
nvkm_wr32(device, addr + 0x04, info->coef); nvkm_wr32(device, addr + 0x04, info->coef);
nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001); nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001);
nv_wait(clk, addr + 0x00, 0x00020000, 0x00020000); nvkm_msec(device, 2000,
if (nvkm_rd32(device, addr + 0x00) & 0x00020000)
break;
);
nvkm_mask(device, addr + 0x00, 0x00020004, 0x00000004); nvkm_mask(device, addr + 0x00, 0x00020004, 0x00000004);
} }
} }
...@@ -373,7 +379,11 @@ gf100_clk_prog_3(struct gf100_clk *clk, int idx) ...@@ -373,7 +379,11 @@ gf100_clk_prog_3(struct gf100_clk *clk, int idx)
struct nvkm_device *device = clk->base.subdev.device; struct nvkm_device *device = clk->base.subdev.device;
if (info->ssel) { if (info->ssel) {
nvkm_mask(device, 0x137100, (1 << idx), info->ssel); nvkm_mask(device, 0x137100, (1 << idx), info->ssel);
nv_wait(clk, 0x137100, (1 << idx), info->ssel); nvkm_msec(device, 2000,
u32 tmp = nvkm_rd32(device, 0x137100) & (1 << idx);
if (tmp == info->ssel)
break;
);
} }
} }
......
...@@ -366,7 +366,10 @@ gk104_clk_prog_1_0(struct gk104_clk *clk, int idx) ...@@ -366,7 +366,10 @@ gk104_clk_prog_1_0(struct gk104_clk *clk, int idx)
{ {
struct nvkm_device *device = clk->base.subdev.device; struct nvkm_device *device = clk->base.subdev.device;
nvkm_mask(device, 0x137100, (1 << idx), 0x00000000); nvkm_mask(device, 0x137100, (1 << idx), 0x00000000);
nv_wait(clk, 0x137100, (1 << idx), 0x00000000); nvkm_msec(device, 2000,
if (!(nvkm_rd32(device, 0x137100) & (1 << idx)))
break;
);
} }
static void static void
...@@ -387,7 +390,10 @@ gk104_clk_prog_2(struct gk104_clk *clk, int idx) ...@@ -387,7 +390,10 @@ gk104_clk_prog_2(struct gk104_clk *clk, int idx)
if (info->coef) { if (info->coef) {
nvkm_wr32(device, addr + 0x04, info->coef); nvkm_wr32(device, addr + 0x04, info->coef);
nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001); nvkm_mask(device, addr + 0x00, 0x00000001, 0x00000001);
nv_wait(clk, addr + 0x00, 0x00020000, 0x00020000); nvkm_msec(device, 2000,
if (nvkm_rd32(device, addr + 0x00) & 0x00020000)
break;
);
nvkm_mask(device, addr + 0x00, 0x00020004, 0x00000004); nvkm_mask(device, addr + 0x00, 0x00020004, 0x00000004);
} }
} }
...@@ -410,7 +416,11 @@ gk104_clk_prog_4_0(struct gk104_clk *clk, int idx) ...@@ -410,7 +416,11 @@ gk104_clk_prog_4_0(struct gk104_clk *clk, int idx)
struct nvkm_device *device = clk->base.subdev.device; struct nvkm_device *device = clk->base.subdev.device;
if (info->ssel) { if (info->ssel) {
nvkm_mask(device, 0x137100, (1 << idx), info->ssel); nvkm_mask(device, 0x137100, (1 << idx), info->ssel);
nv_wait(clk, 0x137100, (1 << idx), info->ssel); nvkm_msec(device, 2000,
u32 tmp = nvkm_rd32(device, 0x137100) & (1 << idx);
if (tmp == info->ssel)
break;
);
} }
} }
......
...@@ -405,11 +405,11 @@ _gk20a_pllg_program_mnp(struct gk20a_clk *clk, bool allow_slide) ...@@ -405,11 +405,11 @@ _gk20a_pllg_program_mnp(struct gk20a_clk *clk, bool allow_slide)
nvkm_wr32(device, GPCPLL_CFG, val); nvkm_wr32(device, GPCPLL_CFG, val);
} }
if (!nvkm_timer_wait_eq(clk, 300000, GPCPLL_CFG, GPCPLL_CFG_LOCK, if (nvkm_usec(device, 300,
GPCPLL_CFG_LOCK)) { if (nvkm_rd32(device, GPCPLL_CFG) & GPCPLL_CFG_LOCK)
nv_error(clk, "%s: timeout waiting for pllg lock\n", __func__); break;
) < 0)
return -ETIMEDOUT; return -ETIMEDOUT;
}
/* switch to VCO mode */ /* switch to VCO mode */
nvkm_mask(device, SEL_VCO, 0, BIT(SEL_VCO_GPC2CLK_OUT_SHIFT)); nvkm_mask(device, SEL_VCO, 0, BIT(SEL_VCO_GPC2CLK_OUT_SHIFT));
......
...@@ -302,21 +302,32 @@ int ...@@ -302,21 +302,32 @@ int
gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags) gt215_clk_pre(struct nvkm_clk *clk, unsigned long *flags)
{ {
struct nvkm_device *device = clk->subdev.device; struct nvkm_device *device = clk->subdev.device;
struct nvkm_fifo *fifo = nvkm_fifo(clk); struct nvkm_fifo *fifo = device->fifo;
/* halt and idle execution engines */ /* halt and idle execution engines */
nvkm_mask(device, 0x020060, 0x00070000, 0x00000000); nvkm_mask(device, 0x020060, 0x00070000, 0x00000000);
nvkm_mask(device, 0x002504, 0x00000001, 0x00000001); nvkm_mask(device, 0x002504, 0x00000001, 0x00000001);
/* Wait until the interrupt handler is finished */ /* Wait until the interrupt handler is finished */
if (!nv_wait(clk, 0x000100, 0xffffffff, 0x00000000)) if (nvkm_msec(device, 2000,
if (!nvkm_rd32(device, 0x000100))
break;
) < 0)
return -EBUSY; return -EBUSY;
if (fifo) if (fifo)
fifo->pause(fifo, flags); fifo->pause(fifo, flags);
if (!nv_wait(clk, 0x002504, 0x00000010, 0x00000010)) if (nvkm_msec(device, 2000,
if (nvkm_rd32(device, 0x002504) & 0x00000010)
break;
) < 0)
return -EIO; return -EIO;
if (!nv_wait(clk, 0x00251c, 0x0000003f, 0x0000003f))
if (nvkm_msec(device, 2000,
u32 tmp = nvkm_rd32(device, 0x002504) & 0x0000003f;
if (tmp == 0x0000003f)
break;
) < 0)
return -EIO; return -EIO;
return 0; return 0;
...@@ -367,7 +378,10 @@ prog_pll(struct gt215_clk *clk, int idx, u32 pll, int dom) ...@@ -367,7 +378,10 @@ prog_pll(struct gt215_clk *clk, int idx, u32 pll, int dom)
nvkm_wr32(device, coef, info->pll); nvkm_wr32(device, coef, info->pll);
nvkm_mask(device, ctrl, 0x00000015, 0x00000015); nvkm_mask(device, ctrl, 0x00000015, 0x00000015);
nvkm_mask(device, ctrl, 0x00000010, 0x00000000); nvkm_mask(device, ctrl, 0x00000010, 0x00000000);
if (!nv_wait(clk, ctrl, 0x00020000, 0x00020000)) { if (nvkm_msec(device, 2000,
if (nvkm_rd32(device, ctrl) & 0x00020000)
break;
) < 0) {
nvkm_mask(device, ctrl, 0x00000010, 0x00000010); nvkm_mask(device, ctrl, 0x00000010, 0x00000010);
nvkm_mask(device, src0, 0x00000101, 0x00000000); nvkm_mask(device, src0, 0x00000101, 0x00000000);
return; return;
......
...@@ -349,10 +349,12 @@ mcp77_clk_prog(struct nvkm_clk *obj) ...@@ -349,10 +349,12 @@ mcp77_clk_prog(struct nvkm_clk *obj)
goto resume; goto resume;
} }
if (!nv_wait(clk, 0x004080, pllmask, pllmask)) { if (nvkm_msec(device, 2000,
nv_warn(clk,"Reclocking failed: unstable PLLs\n"); u32 tmp = nvkm_rd32(device, 0x004080) & pllmask;
if (tmp == pllmask)
break;
) < 0)
goto resume; goto resume;
}
switch (clk->vsrc) { switch (clk->vsrc) {
case nv_clk_src_cclk: case nv_clk_src_cclk:
......
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