Commit 6b6fc449 authored by David Mosberger's avatar David Mosberger

ia64: clean up to enable 64KB page size.

parent 0efa547e
...@@ -127,7 +127,7 @@ ENTRY(vhpt_miss) ...@@ -127,7 +127,7 @@ ENTRY(vhpt_miss)
;; ;;
(p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place
srlz.d // ensure "rsm psr.dt" has taken effect srlz.d // ensure "rsm psr.dt" has taken effect
(p6) movl r19=__pa(SWAPPER_PGD_ADDR) // region 5 is rooted at swapper_pg_dir (p6) movl r19=__pa(swapper_pg_dir) // region 5 is rooted at swapper_pg_dir
(p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT (p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT
(p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3 (p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3
;; ;;
...@@ -413,7 +413,7 @@ ENTRY(nested_dtlb_miss) ...@@ -413,7 +413,7 @@ ENTRY(nested_dtlb_miss)
;; ;;
(p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place (p7) dep r17=r17,r19,(PAGE_SHIFT-3),3 // put region number bits in place
srlz.d srlz.d
(p6) movl r19=__pa(SWAPPER_PGD_ADDR) // region 5 is rooted at swapper_pg_dir (p6) movl r19=__pa(swapper_pg_dir) // region 5 is rooted at swapper_pg_dir
(p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT (p6) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT
(p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3 (p7) shr.u r21=r21,PGDIR_SHIFT+PAGE_SHIFT-3
;; ;;
......
...@@ -123,7 +123,7 @@ GLOBAL_ENTRY(copy_page) ...@@ -123,7 +123,7 @@ GLOBAL_ENTRY(copy_page)
add src1 = 3*8, in1 // first t3 src add src1 = 3*8, in1 // first t3 src
add dst0 = 8, in0 // first t1 dst add dst0 = 8, in0 // first t1 dst
add dst1 = 3*8, in0 // first t3 dst add dst1 = 3*8, in0 // first t3 dst
nop.m 0 mov t1 = (PAGE_SIZE/128) - (2*PREFETCH_DIST) - 1
nop.m 0 nop.m 0
nop.i 0 nop.i 0
;; ;;
...@@ -134,7 +134,7 @@ GLOBAL_ENTRY(copy_page) ...@@ -134,7 +134,7 @@ GLOBAL_ENTRY(copy_page)
br.ctop.sptk .prefetch_loop br.ctop.sptk .prefetch_loop
;; ;;
cmp.eq p16, p0 = r0, r0 // reset p16 to 1 (br.ctop cleared it to zero) cmp.eq p16, p0 = r0, r0 // reset p16 to 1 (br.ctop cleared it to zero)
mov ar.lc = (PAGE_SIZE/128) - (2*PREFETCH_DIST) - 1 mov ar.lc = t1 // with 64KB pages, t1 is too big to fit in 8 bits!
mov ar.ec = N // # of stages in pipeline mov ar.ec = N // # of stages in pipeline
;; ;;
.line_copy: .line_copy:
......
...@@ -347,8 +347,6 @@ paging_init (void) ...@@ -347,8 +347,6 @@ paging_init (void)
{ {
unsigned long max_dma, zones_size[MAX_NR_ZONES]; unsigned long max_dma, zones_size[MAX_NR_ZONES];
clear_page((void *) ZERO_PAGE_ADDR);
/* initialize mem_map[] */ /* initialize mem_map[] */
memset(zones_size, 0, sizeof(zones_size)); memset(zones_size, 0, sizeof(zones_size));
......
...@@ -28,11 +28,6 @@ SECTIONS ...@@ -28,11 +28,6 @@ SECTIONS
.text : AT(ADDR(.text) - PAGE_OFFSET) .text : AT(ADDR(.text) - PAGE_OFFSET)
{ {
*(.text.ivt) *(.text.ivt)
/* these are not really text pages, but they need to be page aligned: */
*(__special_page_section)
__start_gate_section = .;
*(.text.gate)
__stop_gate_section = .;
*(.text) *(.text)
} }
.text2 : AT(ADDR(.text2) - PAGE_OFFSET) .text2 : AT(ADDR(.text2) - PAGE_OFFSET)
...@@ -120,6 +115,13 @@ SECTIONS ...@@ -120,6 +115,13 @@ SECTIONS
.data.init_task : AT(ADDR(.data.init_task) - PAGE_OFFSET) .data.init_task : AT(ADDR(.data.init_task) - PAGE_OFFSET)
{ *(.data.init_task) } { *(.data.init_task) }
.data.page_aligned : AT(ADDR(.data.page_aligned) - PAGE_OFFSET)
{ *(__special_page_section)
__start_gate_section = .;
*(.text.gate)
__stop_gate_section = .;
}
. = ALIGN(SMP_CACHE_BYTES); . = ALIGN(SMP_CACHE_BYTES);
.data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - PAGE_OFFSET) .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - PAGE_OFFSET)
{ *(.data.cacheline_aligned) } { *(.data.cacheline_aligned) }
......
...@@ -18,14 +18,6 @@ ...@@ -18,14 +18,6 @@
#define KERNEL_START (PAGE_OFFSET + 68*1024*1024) #define KERNEL_START (PAGE_OFFSET + 68*1024*1024)
/*
* The following #defines must match with vmlinux.lds.S:
*/
#define IVT_ADDR (KERNEL_START)
#define IVT_END_ADDR (KERNEL_START + 0x8000)
#define ZERO_PAGE_ADDR PAGE_ALIGN(IVT_END_ADDR)
#define SWAPPER_PGD_ADDR (ZERO_PAGE_ADDR + 1*PAGE_SIZE)
#define GATE_ADDR (0xa000000000000000 + PAGE_SIZE) #define GATE_ADDR (0xa000000000000000 + PAGE_SIZE)
#define PERCPU_ADDR (0xa000000000000000 + 2*PAGE_SIZE) #define PERCPU_ADDR (0xa000000000000000 + 2*PAGE_SIZE)
......
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