Commit 6b7fd830 authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher

drm/amd/display: fix a typo which causes an incorrect ODM combine setup

[why]
A recent change for ODM combine refactor contains a typo which causes ODM
combine mode programmed incorrectly.
Reviewed-by: default avatarGeorge Shen <george.shen@amd.com>
Acked-by: default avatarRoman Li <roman.li@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5745cb2d
......@@ -854,7 +854,7 @@ enum dc_status dcn20_enable_stream_timing(
opp_cnt = resource_get_opp_heads_for_otg_master(pipe_ctx, &context->res_ctx, opp_heads);
for (i = 0; i < opp_cnt; i++)
opp_inst[opp_cnt] = opp_heads[i]->stream_res.opp->inst;
opp_inst[i] = opp_heads[i]->stream_res.opp->inst;
odm_slice_width = resource_get_odm_slice_dst_width(pipe_ctx, false);
last_odm_slice_width = resource_get_odm_slice_dst_width(pipe_ctx, true);
......
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