Commit 6bfe30b2 authored by Maxime Ripard's avatar Maxime Ripard Committed by Stephen Boyd

ARM: sun7i: Add clock indices

The A20 gates have a non continuous set of clock IDs that are valid. Add
the clock-indices property to the DT to express this.
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
parent dbbb6922
......@@ -267,6 +267,19 @@ ahb_gates: clk@01c20060 {
compatible = "allwinner,sun7i-a20-ahb-gates-clk";
reg = <0x01c20060 0x8>;
clocks = <&ahb>;
clock-indices = <0>, <1>,
<2>, <3>, <4>,
<5>, <6>, <7>, <8>,
<9>, <10>, <11>, <12>,
<13>, <14>, <16>,
<17>, <18>, <20>, <21>,
<22>, <23>, <25>,
<28>, <32>, <33>, <34>,
<35>, <36>, <37>, <40>,
<41>, <42>, <43>,
<44>, <45>, <46>,
<47>, <49>, <50>,
<52>;
clock-output-names = "ahb_usb0", "ahb_ehci0",
"ahb_ohci0", "ahb_ehci1", "ahb_ohci1",
"ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
......@@ -295,6 +308,10 @@ apb0_gates: clk@01c20068 {
compatible = "allwinner,sun7i-a20-apb0-gates-clk";
reg = <0x01c20068 0x4>;
clocks = <&apb0>;
clock-indices = <0>, <1>,
<2>, <3>, <4>,
<5>, <6>, <7>,
<8>, <10>;
clock-output-names = "apb0_codec", "apb0_spdif",
"apb0_ac97", "apb0_iis0", "apb0_iis1",
"apb0_pio", "apb0_ir0", "apb0_ir1",
......@@ -314,6 +331,12 @@ apb1_gates: clk@01c2006c {
compatible = "allwinner,sun7i-a20-apb1-gates-clk";
reg = <0x01c2006c 0x4>;
clocks = <&apb1>;
clock-indices = <0>, <1>,
<2>, <3>, <4>,
<5>, <6>, <7>,
<15>, <16>, <17>,
<18>, <19>, <20>,
<21>, <22>, <23>;
clock-output-names = "apb1_i2c0", "apb1_i2c1",
"apb1_i2c2", "apb1_i2c3", "apb1_can",
"apb1_scr", "apb1_ps20", "apb1_ps21",
......
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