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Kirill Smelkov
linux
Commits
6c17e8bc
Commit
6c17e8bc
authored
Oct 13, 2002
by
Russell King
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Plain Diff
[ARM] Update ARM cache type decoding.
parent
9e1f670c
Changes
1
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1 changed file
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13 additions
and
14 deletions
+13
-14
arch/arm/kernel/setup.c
arch/arm/kernel/setup.c
+13
-14
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arch/arm/kernel/setup.c
View file @
6c17e8bc
...
...
@@ -193,26 +193,25 @@ static inline void dump_cache(const char *prefix, unsigned int cache)
CACHE_LINE
(
cache
)));
}
static
inline
void
dump_cpu_cache_id
(
void
)
static
void
__init
dump_cpu_info
(
void
)
{
unsigned
int
cache_
info
;
unsigned
int
info
;
asm
(
"mrc p15, 0, %0, c0, c0, 1"
:
"=r"
(
cache_
info
));
asm
(
"mrc p15, 0, %0, c0, c0, 1"
:
"=r"
(
info
));
if
(
cache_info
==
processor_id
)
return
;
printk
(
"CPU: D %s cache
\n
"
,
cache_types
[
CACHE_TYPE
(
cache_info
)]);
if
(
CACHE_S
(
cache_info
))
{
dump_cache
(
"CPU: I cache"
,
CACHE_ISIZE
(
cache_info
));
dump_cache
(
"CPU: D cache"
,
CACHE_DSIZE
(
cache_info
));
}
else
{
dump_cache
(
"CPU: cache"
,
CACHE_ISIZE
(
cache_info
));
if
(
info
!=
processor_id
)
{
printk
(
"CPU: D %s cache
\n
"
,
cache_types
[
CACHE_TYPE
(
info
)]);
if
(
CACHE_S
(
info
))
{
dump_cache
(
"CPU: I cache"
,
CACHE_ISIZE
(
info
));
dump_cache
(
"CPU: D cache"
,
CACHE_DSIZE
(
info
));
}
else
{
dump_cache
(
"CPU: cache"
,
CACHE_ISIZE
(
info
));
}
}
}
#else
#define dump_cpu_
cache_id
() do { } while (0)
#define dump_cpu_
info
() do { } while (0)
#endif
static
void
__init
setup_processor
(
void
)
...
...
@@ -255,7 +254,7 @@ static void __init setup_processor(void)
proc_info
.
manufacturer
,
proc_info
.
cpu_name
,
(
int
)
processor_id
&
15
);
dump_cpu_
cache_id
();
dump_cpu_
info
();
sprintf
(
system_utsname
.
machine
,
"%s%c"
,
list
->
arch_name
,
ENDIANNESS
);
sprintf
(
elf_platform
,
"%s%c"
,
list
->
elf_name
,
ENDIANNESS
);
...
...
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