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Commit 721afaa2 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC device tree updates from Olof Johansson:
 "As always, a large number of DT updates. Too many to enumerate them
  all, but at a glance:

  New SoCs introduced in this release:

   - Amlogic:
      + Meson 8M2 SoC, a.k.a. S812. A quad Cortex-A9 SoC used in some
        set top boxes and other products.

   - Mediatek:
      + MT7623A, which is a flavor of the MT7623 family with other
        on-chip ethernet options.

   - Qualcomm:
      + SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845
        (Cortex-A75/A55 derivative) SoC that's one of the current
        high-end mobile SoCs.

        It's great to see mainline support for it. So far, you can't do
        much with it, since a lot of peripherals are not yet in the DTs
        but driver support for USB, GPU and other pieces are starting to
        trickle in. This might end up being a well-supported SoC
        upstream if the momentum keeps up.

   - Renesas:
      + R8A77990, a.k.a R-Car E3, a new automotive
        entertainment-targeted SoC. Currently only one Cortex-A53 CPU is
        enabled, we are eagerly awaiting more. So far, basic drivers
        such as serial, gpios, PMU and ethernet are enabled.
      + R8A77470, a.k.a. RZ/G1C, a new dual Cortex-A7 SoC with PowerVR
        GPU. Same here, basic set of drivers such as serial, gpios and
        ethernet enabled, and SMP support is also forthcoming.

   - STMicroelectronics:
      + STM32F469, very similar tih STM32F429 but with display support

  Enhancements to SoCs/platforms (DTS contents, some driver portions
  might not be in yet):
   - Allwinner sun8i (h3/a33/a83t) SMP, DVFS tweaks, misc
   - Amlogic Meson: I2C, UFS, TDM, GPIO external interrupts, MMC resets
   - Hisilicon hi3660: Thermal cooling, CPU frequency scaling, mailbox interfaces
   - Marvell Berlin2CD: SMP support, thermal sensors
   - Mediatek MT7623: Highspeed DMA, audio support
   - Qualcomm IPQ8074 PCIe support, MSM8996 UFS support
   - Renesas: Watchdog and PMU support across many platforms
   - Rockchip RK3399: USB3 OTG support
   - Samsung Exynos: Audio-over-HDMI on Odroid X/X2/U3
   - STMicro STM32: Lots of peripherals added to STM32MP175C
   - Uniphier: Ethernet support

  New boards:
   - Allwinner A20: Olimex A20-SOM-EVB-eMMC variant
   - Allwinner H2+: Libre Computer ALL-H3-CC (h2+ version)
   - Allwinner A33: Nintendo NES/SuperNES Classic Edition
   - Aspeed: S2600WF, Inventec Lanyang BMC, Portwell Neptune
   - Berlin2CD: Valve Steam Link
   - Broadcom BCM5301X: Luxul XAP-1610 and XWR-3150 V1
   - Broadcom: Raspberry Pi 3 B+
   - Mediatek MT7623N and MT7623A: reference boards
   - Meson 8M2: Tronsmart MXIII Plus
   - NXP i.MX: Engicam i.CoreM6, DHCOM iMX6 SOM, BTicino i.MX6DL Mamoj
   - Qualcomm MSM8974: Sony Xperia Z1 Compact support
   - Qualcomm SDM845: MTP development board
   - Renesas: Ebisu R8A77990 board
   - Renesas RZ/G1C: iwg23s: iWave G235-SDB
   - TI am335x: Pocketbeagle support"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (448 commits)
  ARM: dts: aspeed: Fix hwrng register address
  arm64: dts: sprd: whale2: Add the rtc enable clock for watchdog
  arm64: dts: sprd: Add GPIO and GPIO keys device nodes
  arm64: dts: sprd: fix typo in 'remote-endpoint'
  arm64: dts: apq8096-db820c: Removed bt-en-1-8v regulator
  arm64: dts: fix regulator property name for wlan pcie endpoint
  arm64: dts: qcom: msm8996: Use UFS_GDSC for UFS
  ARM: dts: pxa3xx: fix MMC clocks
  ARM: pxa: dts: add pin definitions for extended GPIOs
  ARM: pxa: dts: add gpio-ranges to gpio controller
  ARM: dts: ipq8074: Enable few peripherals for hk01 board
  ARM: dts: ipq8074: Add pcie nodes
  ARM: dts: ipq8074: Add peripheral nodes
  ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c2 board file
  ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk07.1-c1 board file
  ARM: dts: ipq4019: Add ipq4019-ap.dk07.1 common data
  ARM: dts: ipq4019: Add qcom-ipq4019-ap.dk04.1-c3 board file
  ARM: dts: ipq4019: Add ipq4019-ap.dk04.1-c1 board file
  ARM: dts: ipq4019: Add ipq4019-ap.dk04.dtsi
  ARM: dts: ipq4019: Change the max opp frequency
  ...
parents 7c00e8ae 87815dda
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Showing with 16879 additions and 6130 deletions
Documentation/arm/OMAP/README
View file @ 721afaa2
......@@ -5,3 +5,7 @@ KERNEL NEW DEPENDENCIES
v4.3+ Update is needed for custom .config files to make sure
CONFIG_REGULATOR_PBIAS is enabled for MMC1 to work
properly.
v4.18+ Update is needed for custom .config files to make sure
CONFIG_MMC_SDHCI_OMAP is enabled for all MMC instances
to work in DRA7 and K2G based boards.
Documentation/devicetree/bindings/arm/amlogic.txt
View file @ 721afaa2
......@@ -25,6 +25,10 @@ Boards with the Amlogic Meson8b SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson8b";
Boards with the Amlogic Meson8m2 SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson8m2";
Boards with the Amlogic Meson GXBaby SoC shall have the following properties:
Required root node property:
compatible: "amlogic,meson-gxbb";
......@@ -54,6 +58,8 @@ Board compatible values (alphabetically, grouped by SoC):
- "hardkernel,odroid-c1" (Meson8b)
- "tronfy,mxq" (Meson8b)
- "tronsmart,mxiii-plus" (Meson8m2)
- "amlogic,p200" (Meson gxbb)
- "amlogic,p201" (Meson gxbb)
- "friendlyarm,nanopi-k2" (Meson gxbb)
......
Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt
View file @ 721afaa2
......@@ -34,6 +34,10 @@ Raspberry Pi 3 Model B
Required root node properties:
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
Raspberry Pi 3 Model B+
Required root node properties:
compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
Raspberry Pi Compute Module
Required root node properties:
compatible = "raspberrypi,compute-module", "brcm,bcm2835";
......
Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
View file @ 721afaa2
......@@ -21,8 +21,6 @@ Required root node properties:
- "samsung,smdk5420" - for Exynos5420-based Samsung SMDK5420 eval board.
- "samsung,tm2" - for Exynos5433-based Samsung TM2 board.
- "samsung,tm2e" - for Exynos5433-based Samsung TM2E board.
- "samsung,sd5v1" - for Exynos5440-based Samsung board.
- "samsung,ssdk5440" - for Exynos5440-based Samsung board.
* Other companies Exynos SoC based
* FriendlyARM
......
Documentation/devicetree/bindings/arm/shmobile.txt
View file @ 721afaa2
......@@ -47,6 +47,8 @@ SoCs:
compatible = "renesas,r8a77970"
- R-Car V3H (R8A77980)
compatible = "renesas,r8a77980"
- R-Car E3 (R8A77990)
compatible = "renesas,r8a77990"
- R-Car D3 (R8A77995)
compatible = "renesas,r8a77995"
......@@ -69,6 +71,8 @@ Boards:
compatible = "renesas,draak", "renesas,r8a77995"
- Eagle (RTP0RC77970SEB0010S)
compatible = "renesas,eagle", "renesas,r8a77970"
- Ebisu (RTP0RC77990SEB0010S)
compatible = "renesas,ebisu", "renesas,r8a77990"
- Genmai (RTK772100BC00000BR)
compatible = "renesas,genmai", "renesas,r7s72100"
- GR-Peach (X28A-M01-E/F)
......@@ -80,6 +84,8 @@ Boards:
compatible = "renesas,h3ulcb", "renesas,r8a7795"
- Henninger
compatible = "renesas,henninger", "renesas,r8a7791"
- iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)
compatible = "iwave,g23s", "renesas,r8a77470"
- iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"
- iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
......@@ -110,7 +116,7 @@ Boards:
compatible = "renesas,salvator-x", "renesas,r8a7795"
- Salvator-X (RTP0RC7796SIPB0011S)
compatible = "renesas,salvator-x", "renesas,r8a7796"
- Salvator-X (RTP0RC7796SIPB0011S (M3N))
- Salvator-X (RTP0RC7796SIPB0011S (M3-N))
compatible = "renesas,salvator-x", "renesas,r8a77965"
- Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
compatible = "renesas,salvator-xs", "renesas,r8a7795"
......@@ -126,6 +132,8 @@ Boards:
compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
- Stout (ADAS Starterkit, Y-R-CAR-ADAS-SKH2-BOARD)
compatible = "renesas,stout", "renesas,r8a7790"
- V3HSK (Y-ASK-RCAR-V3H-WS10)
compatible = "renesas,v3hsk", "renesas,r8a77980"
- V3MSK (Y-ASK-RCAR-V3M-WS10)
compatible = "renesas,v3msk", "renesas,r8a77970"
- Wheat (RTP0RC7792ASKB0000JE)
......
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt deleted 100644 → 0
View file @ 7c00e8ae
NVIDIA Tegra30 MC(Memory Controller)
Required properties:
- compatible : "nvidia,tegra30-mc"
- reg : Should contain 4 register ranges(address and length); see the
example below. Note that the MC registers are interleaved with the
SMMU registers, and hence must be represented as multiple ranges.
- interrupts : Should contain MC General interrupt.
Example:
memory-controller {
compatible = "nvidia,tegra30-mc";
reg = <0x7000f000 0x010
0x7000f03c 0x1b4
0x7000f200 0x028
0x7000f284 0x17c>;
interrupts = <0 77 0x04>;
};
Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
View file @ 721afaa2
......@@ -10,9 +10,6 @@ Required Properties:
"amlogic,gxl-clkc" for GXL and GXM SoC,
"amlogic,axg-clkc" for AXG SoC.
- reg: physical base address of the clock controller and length of memory
mapped region.
- #clock-cells: should be 1.
Each clock is assigned an identifier and client nodes can use this identifier
......@@ -20,13 +17,22 @@ to specify the clock which they consume. All available clocks are defined as
preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
used in device tree sources.
Parent node should have the following properties :
- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
"amlogic,meson-axg-hhi-sysctrl"
- reg: base address and size of the HHI system control register space.
Example: Clock controller node:
clkc: clock-controller@c883c000 {
sysctrl: system-controller@0 {
compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
reg = <0 0 0 0x400>;
clkc: clock-controller {
#clock-cells = <1>;
compatible = "amlogic,gxbb-clkc";
reg = <0x0 0xc883c000 0x0 0x3db>;
};
};
Example: UART controller node that consumes the clock generated by the clock
controller:
......
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt
View file @ 721afaa2
......@@ -6,11 +6,21 @@ Required properties:
example below. Note that the MC registers are interleaved with the
GART registers, and hence must be represented as multiple ranges.
- interrupts : Should contain MC General interrupt.
- #reset-cells : Should be 1. This cell represents memory client module ID.
The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>
or in the TRM documentation.
Example:
memory-controller@7000f000 {
mc: memory-controller@7000f000 {
compatible = "nvidia,tegra20-mc";
reg = <0x7000f000 0x024
0x7000f03c 0x3c4>;
interrupts = <0 77 0x04>;
#reset-cells = <1>;
};
video-codec@6001a000 {
compatible = "nvidia,tegra20-vde";
...
resets = <&mc TEGRA20_MC_RESET_VDE>;
};
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.txt
View file @ 721afaa2
......@@ -12,6 +12,9 @@ Required properties:
- clock-names: Must include the following entries:
- mc: the module's clock input
- interrupts: The interrupt outputs from the controller.
- #reset-cells : Should be 1. This cell represents memory client module ID.
The assignments may be found in header file <dt-bindings/memory/tegra30-mc.h>
or in the TRM documentation.
Required properties for Tegra30, Tegra114, Tegra124, Tegra132 and Tegra210:
- #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines
......@@ -72,12 +75,14 @@ Example SoC include file:
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
#reset-cells = <1>;
};
sdhci@700b0000 {
compatible = "nvidia,tegra124-sdhci";
...
iommus = <&mc TEGRA_SWGROUP_SDMMC1A>;
resets = <&mc TEGRA124_MC_RESET_SDMMC1>;
};
};
......
Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
View file @ 721afaa2
......@@ -4,6 +4,7 @@ Required properties:
- compatible: Should be one of the following:
"allwinner,sun4i-a10-sid"
"allwinner,sun7i-a20-sid"
"allwinner,sun8i-a83t-sid"
"allwinner,sun8i-h3-sid"
"allwinner,sun50i-a64-sid"
......
Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.txt 0 → 100644
View file @ 721afaa2
Command DB
---------
Command DB is a database that provides a mapping between resource key and the
resource address for a system resource managed by a remote processor. The data
is stored in a shared memory region and is loaded by the remote processor.
Some of the Qualcomm Technologies Inc SoC's have hardware accelerators for
controlling shared resources. Depending on the board configuration the shared
resource properties may change. These properties are dynamically probed by the
remote processor and made available in the shared memory.
The bindings for Command DB is specified in the reserved-memory section in
devicetree. The devicetree representation of the command DB driver should be:
Properties:
- compatible:
Usage: required
Value type: <string>
Definition: Should be "qcom,cmd-db"
- reg:
Usage: required
Value type: <prop encoded array>
Definition: The register address that points to the actual location of
the Command DB in memory.
Example:
reserved-memory {
[...]
reserved-memory@85fe0000 {
reg = <0x0 0x85fe0000 0x0 0x20000>;
compatible = "qcom,cmd-db";
no-map;
};
};
Documentation/devicetree/bindings/rng/brcm,bcm2835.txt
View file @ 721afaa2
......@@ -14,11 +14,16 @@ Optional properties:
- clocks : phandle to clock-controller plus clock-specifier pair
- clock-names : "ipsec" as a clock name
Optional properties:
- interrupts: specify the interrupt for the RNG block
Example:
rng {
compatible = "brcm,bcm2835-rng";
reg = <0x7e104000 0x10>;
compatible = "brcm,bcm2835-rng";
reg = <0x7e104000 0x10>;
interrupts = <2 29>;
};
rng@18033000 {
......
Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt 0 → 100644
View file @ 721afaa2
Qualcomm Technologies, Inc. GENI Serial Engine QUP Wrapper Controller
Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
is a programmable module for supporting a wide range of serial interfaces
like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP
Wrapper controller is modeled as a node with zero or more child nodes each
representing a serial engine.
Required properties:
- compatible: Must be "qcom,geni-se-qup".
- reg: Must contain QUP register address and length.
- clock-names: Must contain "m-ahb" and "s-ahb".
- clocks: AHB clocks needed by the device.
Required properties if child node exists:
- #address-cells: Must be <1> for Serial Engine Address
- #size-cells: Must be <1> for Serial Engine Address Size
- ranges: Must be present
Properties for children:
A GENI based QUP wrapper controller node can contain 0 or more child nodes
representing serial devices. These serial devices can be a QCOM UART, I2C
controller, SPI controller, or some combination of aforementioned devices.
Please refer below the child node definitions for the supported serial
interface protocols.
Qualcomm Technologies Inc. GENI Serial Engine based I2C Controller
Required properties:
- compatible: Must be "qcom,geni-i2c".
- reg: Must contain QUP register address and length.
- interrupts: Must contain I2C interrupt.
- clock-names: Must contain "se".
- clocks: Serial engine core clock needed by the device.
- #address-cells: Must be <1> for I2C device address.
- #size-cells: Must be <0> as I2C addresses have no size component.
Optional property:
- clock-frequency: Desired I2C bus clock frequency in Hz.
When missing default to 400000Hz.
Child nodes should conform to I2C bus binding as described in i2c.txt.
Qualcomm Technologies Inc. GENI Serial Engine based UART Controller
Required properties:
- compatible: Must be "qcom,geni-debug-uart".
- reg: Must contain UART register location and length.
- interrupts: Must contain UART core interrupts.
- clock-names: Must contain "se".
- clocks: Serial engine core clock needed by the device.
Qualcomm Technologies Inc. GENI Serial Engine based SPI Controller
Required properties:
- compatible: Must contain "qcom,geni-spi".
- reg: Must contain SPI register location and length.
- interrupts: Must contain SPI controller interrupts.
- clock-names: Must contain "se".
- clocks: Serial engine core clock needed by the device.
- spi-max-frequency: Specifies maximum SPI clock frequency, units - Hz.
- #address-cells: Must be <1> to define a chip select address on
the SPI bus.
- #size-cells: Must be <0>.
SPI slave nodes must be children of the SPI master node and conform to SPI bus
binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt.
Example:
geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
reg = <0x8c0000 0x6000>;
clock-names = "m-ahb", "s-ahb";
clocks = <&clock_gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<&clock_gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
i2c0: i2c@a94000 {
compatible = "qcom,geni-i2c";
reg = <0xa94000 0x4000>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se";
clocks = <&clock_gcc GCC_QUPV3_WRAP0_S5_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qup_1_i2c_5_active>;
pinctrl-1 = <&qup_1_i2c_5_sleep>;
#address-cells = <1>;
#size-cells = <0>;
};
uart0: serial@a88000 {
compatible = "qcom,geni-debug-uart";
reg = <0xa88000 0x7000>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se";
clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qup_1_uart_3_active>;
pinctrl-1 = <&qup_1_uart_3_sleep>;
};
spi0: spi@a84000 {
compatible = "qcom,geni-spi";
reg = <0xa84000 0x4000>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se";
clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qup_1_spi_2_active>;
pinctrl-1 = <&qup_1_spi_2_sleep>;
spi-max-frequency = <19200000>;
#address-cells = <1>;
#size-cells = <0>;
};
}
Documentation/devicetree/bindings/timer/renesas,cmt.txt
View file @ 721afaa2
......@@ -22,6 +22,10 @@ Required Properties:
- "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.
- "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
- "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.
- "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.
- "renesas,r8a7745-cmt0" for the 32-bit CMT0 device included in r8a7745.
- "renesas,r8a7745-cmt1" for the 48-bit CMT1 device included in r8a7745.
- "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.
- "renesas,r8a7790-cmt1" for the 48-bit CMT1 device included in r8a7790.
- "renesas,r8a7791-cmt0" for the 32-bit CMT0 device included in r8a7791.
......@@ -31,10 +35,12 @@ Required Properties:
- "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
- "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
- "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2.
- "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2.
These are fallbacks for r8a73a4 and all the R-Car Gen2
entries listed above.
- "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2
and RZ/G1.
- "renesas,rcar-gen2-cmt1" for 48-bit CMT1 devices included in R-Car Gen2
and RZ/G1.
These are fallbacks for r8a73a4, R-Car Gen2 and RZ/G1 entries
listed above.
- reg: base address and length of the registers block for the timer module.
- interrupts: interrupt-specifier for the timer, one per channel.
......
Documentation/devicetree/bindings/vendor-prefixes.txt
View file @ 721afaa2
......@@ -58,6 +58,7 @@ bosch Bosch Sensortec GmbH
boundary Boundary Devices Inc.
brcm Broadcom Corporation
buffalo Buffalo, Inc.
bticino Bticino International
calxeda Calxeda
capella Capella Microsystems, Inc
cascoda Cascoda, Ltd.
......@@ -285,6 +286,7 @@ pine64 Pine64
pixcir PIXCIR MICROELECTRONICS Co., Ltd
plathome Plat'Home Co., Ltd.
plda PLDA
portwell Portwell Inc.
poslab Poslab Technology Co., Ltd.
powervr PowerVR (deprecated, use img)
probox2 PROBOX2 (by W2COMP Co., Ltd.)
......
arch/arm/boot/dts/Makefile
View file @ 721afaa2
......@@ -75,6 +75,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
bcm2835-rpi-a-plus.dtb \
bcm2836-rpi-2-b.dtb \
bcm2837-rpi-3-b.dtb \
bcm2837-rpi-3-b-plus.dtb \
bcm2835-rpi-zero.dtb \
bcm2835-rpi-zero-w.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += \
......@@ -102,8 +103,10 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm47094-dlink-dir-885l.dtb \
bcm47094-linksys-panamera.dtb \
bcm47094-luxul-abr-4500.dtb \
bcm47094-luxul-xap-1610.dtb \
bcm47094-luxul-xbr-4500.dtb \
bcm47094-luxul-xwr-3100.dtb \
bcm47094-luxul-xwr-3150-v1.dtb \
bcm47094-netgear-r8500.dtb \
bcm94708.dtb \
bcm94709.dtb \
......@@ -140,6 +143,7 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
dtb-$(CONFIG_ARCH_BERLIN) += \
berlin2-sony-nsz-gs7.dtb \
berlin2cd-google-chromecast.dtb \
berlin2cd-valve-steamlink.dtb \
berlin2q-marvell-dmp.dtb
dtb-$(CONFIG_ARCH_BRCMSTB) += \
bcm7445-bcm97445svmb.dtb
......@@ -190,8 +194,6 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \
exynos5422-odroidxu4.dtb \
exynos5440-sd5v1.dtb \
exynos5440-ssdk5440.dtb \
exynos5800-peach-pi.dtb
dtb-$(CONFIG_ARCH_GEMINI) += \
gemini-dlink-dir-685.dtb \
......@@ -312,14 +314,14 @@ dtb-$(CONFIG_ARCH_NPCM7XX) += \
dtb-$(CONFIG_MACH_MESON6) += \
meson6-atv1200.dtb
dtb-$(CONFIG_MACH_MESON8) += \
meson8-minix-neo-x8.dtb
meson8-minix-neo-x8.dtb \
meson8b-mxq.dtb \
meson8b-odroidc1.dtb \
meson8m2-mxiii-plus.dtb
dtb-$(CONFIG_ARCH_MMP) += \
pxa168-aspenite.dtb \
pxa910-dkb.dtb \
mmp2-brownstone.dtb
dtb-$(CONFIG_MACH_MESON8B) += \
meson8b-mxq.dtb \
meson8b-odroidc1.dtb
dtb-$(CONFIG_ARCH_MPS2) += \
mps2-an385.dtb \
mps2-an399.dtb
......@@ -399,6 +401,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-hummingboard2-som-v15.dtb \
imx6dl-icore.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \
imx6dl-nit6xlite.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-mira-rdk-nand.dtb \
......@@ -439,6 +442,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-cubox-i-emmc-som-v15.dtb \
imx6q-cubox-i-som-v15.dtb \
imx6q-dfi-fs700-m60.dtb \
imx6q-dhcom-pdk2.dtb \
imx6q-display5-tianma-tm070-1280x768.dtb \
imx6q-dmo-edmqmx6.dtb \
imx6q-dms-ba16.dtb \
......@@ -463,9 +467,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-hummingboard2-emmc-som-v15.dtb \
imx6q-hummingboard2-som-v15.dtb \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
imx6q-icore-ofcap10.dtb \
imx6q-icore-ofcap12.dtb \
imx6q-icore-rqs.dtb \
imx6q-kp-tpc.dtb \
imx6q-marsboard.dtb \
imx6q-mccmon6.dtb \
imx6q-nitrogen6x.dtb \
......@@ -688,6 +694,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-pdu001.dtb \
am335x-pepper.dtb \
am335x-phycore-rdk.dtb \
am335x-pocketbeagle.dtb \
am335x-shc.dtb \
am335x-sbc-t335.dtb \
am335x-sl50.dtb \
......@@ -760,12 +767,17 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8084-ifc6540.dtb \
qcom-apq8084-mtp.dtb \
qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
qcom-msm8974-fairphone-fp2.dtb \
qcom-msm8974-lge-nexus5-hammerhead.dtb \
qcom-msm8974-samsung-klte.dtb \
qcom-msm8974-sony-xperia-amami.dtb \
qcom-msm8974-sony-xperia-castor.dtb \
qcom-msm8974-sony-xperia-honami.dtb \
qcom-mdm9615-wp8548-mangoh-green.dtb
......@@ -959,6 +971,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-m3.dtb \
sun7i-a20-mk808c.dtb \
sun7i-a20-olimex-som-evb.dtb \
sun7i-a20-olimex-som-evb-emmc.dtb \
sun7i-a20-olimex-som204-evb.dtb \
sun7i-a20-olimex-som204-evb-emmc.dtb \
sun7i-a20-olinuxino-lime.dtb \
......@@ -992,8 +1005,9 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-a83t-bananapi-m3.dtb \
sun8i-a83t-cubietruck-plus.dtb \
sun8i-a83t-tbs-a711.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-bananapi-m2-zero.dtb \
sun8i-h2-plus-libretech-all-h3-cc.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-beelink-x2.dtb \
......@@ -1010,6 +1024,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-orangepi-plus.dtb \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-r16-bananapi-m2m.dtb \
sun8i-r16-nintendo-nes-classic.dtb \
sun8i-r16-nintendo-super-nes-classic.dtb \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-v3s-licheepi-zero.dtb \
......@@ -1054,9 +1070,7 @@ dtb-$(CONFIG_ARCH_U8500) += \
ste-hrefprev60-stuib.dtb \
ste-hrefprev60-tvk.dtb \
ste-hrefv60plus-stuib.dtb \
ste-hrefv60plus-tvk.dtb \
ste-ccu8540.dtb \
ste-ccu9540.dtb
ste-hrefv60plus-tvk.dtb
dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ld4-ref.dtb \
uniphier-ld6b-ref.dtb \
......@@ -1150,6 +1164,9 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt6580-evbp1.dtb \
mt6589-aquaris5.dtb \
mt6592-evb.dtb \
mt7623a-rfb-emmc.dtb \
mt7623a-rfb-nand.dtb \
mt7623n-rfb-emmc.dtb \
mt7623n-rfb-nand.dtb \
mt7623n-bananapi-bpi-r2.dtb \
mt8127-moose.dtb \
......@@ -1158,8 +1175,11 @@ dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb
dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-ast2500-evb.dtb \
aspeed-bmc-arm-centriq2400-rep.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
aspeed-bmc-quanta-q71l.dtb
arch/arm/boot/dts/am335x-baltos-ir3220.dts
View file @ 721afaa2
......@@ -85,7 +85,7 @@ tca6416: gpio@20 {
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio0>;
interrupts = <20 GPIO_ACTIVE_LOW>;
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
};
......
arch/arm/boot/dts/am335x-baltos-ir5221.dts
View file @ 721afaa2
......@@ -94,7 +94,7 @@ tca6416: gpio@20 {
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio0>;
interrupts = <20 GPIO_ACTIVE_LOW>;
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tca6416_pins>;
};
......
arch/arm/boot/dts/am335x-baltos.dtsi
View file @ 721afaa2
......@@ -249,7 +249,7 @@ tps: tps@2d {
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <28 GPIO_ACTIVE_LOW>;
interrupts = <28 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&tps65910_pins>;
};
......
arch/arm/boot/dts/am335x-bone-common.dtsi
View file @ 721afaa2
......@@ -161,7 +161,14 @@ AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spio0_cs1.gpio0_6 */
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
>;
};
......
arch/arm/boot/dts/am335x-boneblue.dts
View file @ 721afaa2
......@@ -364,7 +364,7 @@ mpu9250@68 {
compatible = "invensense,mpu9250";
reg = <0x68>;
interrupt-parent = <&gpio3>;
interrupts = <21 GPIO_ACTIVE_LOW>;
interrupts = <21 IRQ_TYPE_EDGE_RISING>;
i2c-gate {
#address-cells = <1>;
#size-cells = <0>;
......
arch/arm/boot/dts/am335x-evm.dts
View file @ 721afaa2
......@@ -303,7 +303,14 @@ AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
>;
};
......
arch/arm/boot/dts/am335x-evmsk.dts
View file @ 721afaa2
......@@ -137,7 +137,7 @@ switch4 {
};
};
backlight {
lcd_bl: backlight {
compatible = "pwm-backlight";
pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 58 61 66 75 90 125 170 255>;
......@@ -172,6 +172,7 @@ panel {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcd_pins_default>;
pinctrl-1 = <&lcd_pins_sleep>;
backlight = <&lcd_bl>;
status = "okay";
panel-info {
ac-bias = <255>;
......@@ -399,7 +400,14 @@ AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
>;
};
......
arch/arm/boot/dts/am335x-osd335x-common.dtsi 0 → 100644
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* Author: Robert Nelson <robertcnelson@gmail.com>
*/
/ {
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
};
&cpu0_opp_table {
/*
* Octavo Systems:
* The EFUSE_SMA register is not programmed for any of the AM335x wafers
* we get and we are not programming them during our production test.
* Therefore, from a DEVICE_ID revision point of view, the silicon looks
* like it is Revision 2.1. However, from an EFUSE_SMA point of view for
* the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
* EFUSE_SMA register reads as all zeros).
*/
oppnitro-1000000000 {
opp-supported-hw = <0x06 0x0100>;
};
};
&am33xx_pinmux {
i2c0_pins: pinmux-i2c0-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
>;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
};
/include/ "tps65217.dtsi"
&tps {
interrupts = <7>; /* NMI */
interrupt-parent = <&intc>;
ti,pmic-shutdown-controller;
pwrbutton {
interrupts = <2>;
status = "okay";
};
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
regulator-always-on;
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-name = "vio,vrtc,vdds";
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-name = "vdd_3v3aux";
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-name = "vdd_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: regulator@6 {
regulator-name = "vdd_3v3a";
regulator-always-on;
};
};
};
&aes {
status = "okay";
};
&sham {
status = "okay";
};
arch/arm/boot/dts/am335x-pocketbeagle.dts 0 → 100644
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* Author: Robert Nelson <robertcnelson@gmail.com>
*/
/dts-v1/;
#include "am33xx.dtsi"
#include "am335x-osd335x-common.dtsi"
/ {
model = "TI AM335x PocketBeagle";
compatible = "ti,am335x-pocketbeagle", "ti,am335x-bone", "ti,am33xx";
chosen {
stdout-path = &uart0;
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&usr_leds_pins>;
compatible = "gpio-leds";
usr0 {
label = "beaglebone:green:usr0";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
usr1 {
label = "beaglebone:green:usr1";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
usr2 {
label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
usr3 {
label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
vmmcsd_fixed: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&am33xx_pinmux {
i2c2_pins: pinmux-i2c2-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
>;
};
ehrpwm0_pins: pinmux-ehrpwm0-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
>;
};
ehrpwm1_pins: pinmux-ehrpwm1-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
>;
};
mmc0_pins: pinmux-mmc0-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
>;
};
spi0_pins: pinmux-spi0-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
>;
};
spi1_pins: pinmux-spi1-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x964, PIN_INPUT_PULLUP | MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
AM33XX_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
>;
};
usr_leds_pins: pinmux-usr-leds-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
>;
};
uart0_pins: pinmux-uart0-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (E16) uart0_txd.uart0_txd */
>;
};
uart4_pins: pinmux-uart4-pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
>;
};
};
&epwmss0 {
status = "okay";
};
&ehrpwm0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ehrpwm0_pins>;
};
&epwmss1 {
status = "okay";
};
&ehrpwm1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ehrpwm1_pins>;
};
&i2c0 {
eeprom: eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <400000>;
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
&rtc {
system-power-controller;
};
&tscadc {
status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
ti,chan-step-avg = <16 16 16 16 16 16 16 16>;
ti,chan-step-opendelay = <0x98 0x98 0x98 0x98 0x98 0x98 0x98 0x98>;
ti,chan-step-sampledelay = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>;
status = "okay";
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "otg";
};
&usb1_phy {
status = "okay";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
arch/arm/boot/dts/am3517-evm.dts
View file @ 721afaa2
......@@ -8,11 +8,17 @@
/dts-v1/;
#include "am3517.dtsi"
#include "am3517-som.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
aliases {
display0 = &lcd0;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
......@@ -24,6 +30,144 @@ vmmc_fixed: vmmc {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
gpio-keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
user_pb {
label = "User Push Button";
linux,code = <BTN_0>;
gpios = <&tca6416 5 GPIO_ACTIVE_LOW>;
};
user_sw_1 {
label = "User Switch 1";
linux,code = <BTN_1>;
gpios = <&tca6416 8 GPIO_ACTIVE_LOW>;
};
user_sw_2 {
label = "User Switch 2";
linux,code = <BTN_2>;
gpios = <&tca6416 9 GPIO_ACTIVE_LOW>;
};
user_sw_3 {
label = "User Switch 3";
linux,code = <BTN_3>;
gpios = <&tca6416 10 GPIO_ACTIVE_LOW>;
};
user_sw_4 {
label = "User Switch 4";
linux,code = <BTN_4>;
gpios = <&tca6416 11 GPIO_ACTIVE_LOW>;
};
user_sw_5 {
label = "User Switch 5";
linux,code = <BTN_5>;
gpios = <&tca6416 12 GPIO_ACTIVE_LOW>;
};
user_sw_6 {
label = "User Switch 6";
linux,code = <BTN_6>;
gpios = <&tca6416 13 GPIO_ACTIVE_LOW>;
};
user_sw_7 {
label = "User Switch 7";
linux,code = <BTN_7>;
gpios = <&tca6416 14 GPIO_ACTIVE_LOW>;
};
user_sw_8 {
label = "User Switch 8";
linux,code = <BTN_8>;
gpios = <&tca6416 15 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_pins>;
user_led_1 {
label = "am3517evm:green:user_led_1";
gpios = <&tca6416 7 GPIO_ACTIVE_LOW>;
default-state = "on";
};
user_led_2 {
label = "am3517evm:green:user_led_2";
gpios = <&tca6416 6 GPIO_ACTIVE_LOW>;
default-state = "on";
};
user_led_3 {
label = "am3517evm:green:user_led_3";
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0"; /* SD/MMC card activity */
};
user_led_4 {
label = "am3517evm:green:user_led_4";
gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
lcd0: display@0 {
compatible = "panel-dpi";
label = "15";
status = "okay";
pinctrl-names = "default";
enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; /* gpio176, lcd INI */
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
panel-timing {
clock-frequency = <9000000>;
hactive = <480>;
vactive = <272>;
hfront-porch = <3>;
hback-porch = <2>;
hsync-len = <42>;
vback-porch = <3>;
vfront-porch = <4>;
vsync-len = <11>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
};
bl: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&backlight_pins>;
pwms = <&pwm11 0 5000000 0>;
brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
default-brightness-level = <7>;
enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */
};
pwm11: dmtimer-pwm@11 {
compatible = "ti,omap-dmtimer-pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
ti,timers = <&timer11>;
#pwm-cells = <3>;
};
};
&davinci_emac {
......@@ -34,12 +178,32 @@ &davinci_mdio {
status = "okay";
};
&i2c1 {
clock-frequency = <400000>;
&dss {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&dss_dpi_pins>;
vdds_dsi-supply = <&vdd_io_reg>;
vdda_video-supply = <&vdd_io_reg>;
port {
dpi_out: endpoint {
remote-endpoint = <&lcd_in>;
data-lines = <16>;
};
};
};
&i2c2 {
clock-frequency = <400000>;
/* User DIP swithes [1:8] / User LEDS [1:2] */
tca6416: gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
};
&i2c3 {
......@@ -47,8 +211,13 @@ &i2c3 {
};
&mmc1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vmmc_fixed>;
bus-width = <4>;
wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */
};
&mmc2 {
......@@ -59,3 +228,63 @@ &mmc3 {
status = "disabled";
};
&omap3_pmx_core {
leds_pins: pinmux_leds_pins {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */
OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat4.gpio_126 */
OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat5.gpio_127 */
>;
};
pwm_pins: pinmux_pwm_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE1) /* mcspi2_cs0.gpt11_pwm */
>;
};
backlight_pins: pinmux_backlight_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT | MUX_MODE4) /* mcspi2_cs1.gpio_182 */
>;
};
dss_dpi_pins: pinmux_dss_dpi_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d2, PIN_OUTPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
>;
};
};
arch/arm/boot/dts/am3517-som.dtsi 0 → 100644
View file @ 721afaa2
/*
* Copyright (C) 2016 Derald D. Woods <woods.technical@gmail.com>
*
* Based on am3517-evm.dts
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/ {
cpus {
cpu@0 {
cpu0-supply = <&vdd_core_reg>;
};
};
};
&gpmc {
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
compatible = "ti,omap2-nand";
linux,mtd-name = "micron,mt29f4g16abchch";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-off-ns = <40>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
gpmc,device-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
};
};
&i2c1 {
clock-frequency = <400000>;
s35390a: s35390a@30 {
compatible = "sii,s35390a";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_pins>;
interrupts-extended = <&gpio2 23 IRQ_TYPE_EDGE_FALLING>; /* gpio_55 */
};
tps: tps65023@48 {
compatible = "ti,tps65023";
reg = <0x48>;
regulators {
vdd_core_reg: VDCDC1 {
regulator-name = "vdd_core";
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vdd_io_reg: VDCDC2 {
regulator-name = "vdd_io";
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_1v8_reg: VDCDC3 {
regulator-name = "vdd_1v8";
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vdd_usb18_reg: LDO1 {
regulator-name = "vdd_usb18";
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vdd_usb33_reg: LDO2 {
regulator-name = "vdd_usb33";
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
};
touchscreen: tsc2004@4b {
compatible = "ti,tsc2004";
reg = <0x4b>;
vio-supply = <&vdd_io_reg>;
pinctrl-names = "default";
pinctrl-0 = <&tsc2004_pins>;
interrupts-extended = <&gpio3 1 IRQ_TYPE_EDGE_RISING>; /* gpio_65 */
touchscreen-fuzz-x = <4>;
touchscreen-fuzz-y = <7>;
touchscreen-fuzz-pressure = <2>;
touchscreen-size-x = <480>;
touchscreen-size-y = <272>;
touchscreen-max-pressure = <2048>;
ti,x-plate-ohms = <280>;
ti,esd-recovery-timeout-ms = <8000>;
};
};
&omap3_pmx_core {
rtc_pins: pinmux_rtc_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
>;
};
tsc2004_pins: pinmux_tsc2004_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
>;
};
};
arch/arm/boot/dts/am437x-cm-t43.dts
View file @ 721afaa2
......@@ -203,7 +203,7 @@ &i2c0 {
tps65218: tps65218@24 {
compatible = "ti,tps65218";
reg = <0x24>;
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
......
arch/arm/boot/dts/am437x-gp-evm.dts
View file @ 721afaa2
......@@ -543,7 +543,7 @@ &i2c0 {
tps65218: tps65218@24 {
reg = <0x24>;
compatible = "ti,tps65218";
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
interrupt-controller;
#interrupt-cells = <2>;
......
arch/arm/boot/dts/am437x-sk-evm.dts
View file @ 721afaa2
......@@ -15,6 +15,7 @@
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "TI AM437x SK EVM";
......@@ -158,6 +159,22 @@ lcd_in: endpoint {
};
};
};
vmmcwl_fixed: fixedregulator-mmcwl {
/*
* WL_EN is not SDIO standard compliant. It is an out of band
* signal and hard to be dealt with in a standard way by the
* SDIO core driver.
* So modelling the WL_EN line as a regulator was a natural
* choice as the MMC core already deals with MMC supplies.
*/
compatible = "regulator-fixed";
regulator-name = "vmmcwl_fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&am43xx_pinmux {
......@@ -418,6 +435,62 @@ usb2_pins: usb2_pins {
AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
>;
};
mmc3_pins_default: pinmux_mmc3_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */
AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */
AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */
>;
};
mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */
AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */
AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */
>;
};
wlan_pins_default: pinmux_wlan_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
>;
};
wlan_pins_sleep: pinmux_wlan_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
>;
};
uart1_bt_pins_default: pinmux_uart1_bt_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */
AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
>;
};
uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */
AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */
AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
>;
};
};
&i2c0 {
......@@ -581,6 +654,10 @@ &gpio1 {
status = "okay";
};
&gpio4 {
status = "okay";
};
&gpio5 {
status = "okay";
};
......@@ -595,6 +672,44 @@ &mmc1 {
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
&uart1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_bt_pins_default>;
pinctrl-1 = <&uart1_bt_pins_sleep>;
};
&mmc3 {
status = "okay";
/*
* these are on the crossbar and are outlined in the
* xbar-event-map element
*/
dmas = <&edma_xbar 30 0 1>,
<&edma_xbar 31 0 2>;
dma-names = "tx", "rx";
vmmc-supply = <&vmmcwl_fixed>;
bus-width = <4>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mmc3_pins_default>;
pinctrl-1 = <&mmc3_pins_sleep>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@2 {
compatible = "ti,wl1835";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&wlan_pins_default>;
pinctrl-1 = <&wlan_pins_sleep>;
reg = <2>;
interrupt-parent = <&gpio4>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
};
};
&usb2_phy1 {
status = "okay";
};
......
arch/arm/boot/dts/am43x-epos-evm.dts
View file @ 721afaa2
......@@ -595,7 +595,7 @@ &i2c0 {
tps65218: tps65218@24 {
reg = <0x24>;
compatible = "ti,tps65218";
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
interrupt-controller;
#interrupt-cells = <2>;
......
arch/arm/boot/dts/am571x-idk.dts
View file @ 721afaa2
......@@ -10,6 +10,7 @@
#include "dra72x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "dra7-mmc-iodelay.dtsi"
#include "dra72x-mmc-iodelay.dtsi"
#include "am57xx-idk-common.dtsi"
......@@ -102,7 +103,7 @@ &pcie1_ep {
&mmc1 {
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
pinctrl-1 = <&mmc1_pins_hs>;
pinctrl-2 = <&mmc1_pins_sdr12>;
pinctrl-3 = <&mmc1_pins_sdr25>;
......@@ -112,7 +113,7 @@ &mmc1 {
};
&mmc2 {
pinctrl-names = "default", "hs", "ddr_1_8v";
pinctrl-names = "default", "hs", "ddr_3_3v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
......
arch/arm/boot/dts/am572x-idk.dts
View file @ 721afaa2
......@@ -9,6 +9,7 @@
/dts-v1/;
#include "dra74x.dtsi"
#include "dra7-mmc-iodelay.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
#include "am572x-idk-common.dtsi"
......@@ -20,7 +21,7 @@ / {
&mmc1 {
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
pinctrl-1 = <&mmc1_pins_hs>;
pinctrl-2 = <&mmc1_pins_sdr12>;
pinctrl-3 = <&mmc1_pins_sdr25>;
......@@ -30,7 +31,7 @@ &mmc1 {
};
&mmc2 {
pinctrl-names = "default", "hs", "ddr_1_8v";
pinctrl-names = "default", "hs", "ddr_3_3v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20>;
......
arch/arm/boot/dts/am574x-idk.dts
View file @ 721afaa2
......@@ -7,6 +7,8 @@
/dts-v1/;
#include "dra76x.dtsi"
#include "dra7-mmc-iodelay.dtsi"
#include "dra76x-mmc-iodelay.dtsi"
#include "am572x-idk-common.dtsi"
/ {
......@@ -20,3 +22,21 @@ m25p80@0 {
spi-max-frequency = <96000000>;
};
};
&mmc1 {
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
pinctrl-1 = <&mmc1_pins_hs>;
pinctrl-2 = <&mmc1_pins_default>;
pinctrl-3 = <&mmc1_pins_hs>;
pinctrl-4 = <&mmc1_pins_sdr50>;
pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_conf>;
pinctrl-6 = <&mmc1_pins_ddr50 &mmc1_iodelay_sdr104_conf>;
};
&mmc2 {
pinctrl-names = "default", "hs", "ddr_3_3v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_default>;
pinctrl-2 = <&mmc2_pins_default>;
};
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
View file @ 721afaa2
......@@ -444,8 +444,8 @@ &mmc2 {
vmmc-supply = <&vdd_3v3>;
vqmmc-supply = <&vdd_3v3>;
bus-width = <8>;
ti,non-removable;
cap-mmc-dual-data-rate;
non-removable;
no-1-8-v;
};
&sata {
......
arch/arm/boot/dts/am57xx-beagle-x15.dts
View file @ 721afaa2
......@@ -25,10 +25,11 @@ &mmc1 {
pinctrl-1 = <&mmc1_pins_hs>;
vmmc-supply = <&ldo1_reg>;
no-1-8-v;
};
&mmc2 {
pinctrl-names = "default", "hs", "ddr_1_8v";
pinctrl-names = "default", "hs", "ddr_3_3v";
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
......
arch/arm/boot/dts/am57xx-idk-common.dtsi
View file @ 721afaa2
......@@ -115,17 +115,6 @@ DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
>;
};
mmc1_pins_default: mmc1_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
>;
};
};
&i2c1 {
......@@ -423,8 +412,9 @@ &mmc2 {
vmmc-supply = <&v3_3d>;
vqmmc-supply = <&v3_3d>;
bus-width = <8>;
ti,non-removable;
non-removable;
max-frequency = <96000000>;
no-1-8-v;
};
&dcan1 {
......
arch/arm/boot/dts/armada-370-db.dts
View file @ 721afaa2
......@@ -105,33 +105,6 @@ usb@50000 {
usb@51000 {
status = "okay";
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
};
......@@ -239,3 +212,33 @@ spi-flash@0 {
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
arch/arm/boot/dts/armada-370-dlink-dns327l.dts
View file @ 721afaa2
......@@ -44,61 +44,6 @@ sata@a0000 {
usb@50000 {
status = "okay";
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
/* 1.0 MiB */
reg = <0x0000000 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
/* 128 KiB */
reg = <0x100000 0x20000>;
read-only;
};
partition@120000 {
label = "uImage";
/* 7 MiB */
reg = <0x120000 0x700000>;
};
partition@820000 {
label = "ubifs";
/* ~ 84 MiB */
reg = <0x820000 0x54e0000>;
};
/* Hardcoded into stock bootloader */
partition@5d00000 {
label = "failsafe-uImage";
/* 5 MiB */
reg = <0x5d00000 0x500000>;
};
partition@6200000 {
label = "failsafe-fs";
/* 29 MiB */
reg = <0x6200000 0x1d00000>;
};
partition@7f00000 {
label = "bbt";
/* 1 MiB for BBT */
reg = <0x7f00000 0x100000>;
};
};
};
};
......@@ -319,3 +264,68 @@ &i2c0 {
clock-frequency = <100000>;
status = "okay";
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
/* 1.0 MiB */
reg = <0x0000000 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
/* 128 KiB */
reg = <0x100000 0x20000>;
read-only;
};
partition@120000 {
label = "uImage";
/* 7 MiB */
reg = <0x120000 0x700000>;
};
partition@820000 {
label = "ubifs";
/* ~ 84 MiB */
reg = <0x820000 0x54e0000>;
};
/* Hardcoded into stock bootloader */
partition@5d00000 {
label = "failsafe-uImage";
/* 5 MiB */
reg = <0x5d00000 0x500000>;
};
partition@6200000 {
label = "failsafe-fs";
/* 29 MiB */
reg = <0x6200000 0x1d00000>;
};
partition@7f00000 {
label = "bbt";
/* 1 MiB for BBT */
reg = <0x7f00000 0x100000>;
};
};
};
};
arch/arm/boot/dts/armada-370-mirabox.dts
View file @ 721afaa2
......@@ -108,27 +108,6 @@ pca9505: pca9505@25 {
reg = <0x25>;
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partition@0 {
label = "U-Boot";
reg = <0 0x400000>;
};
partition@400000 {
label = "Linux";
reg = <0x400000 0x400000>;
};
partition@800000 {
label = "Filesystem";
reg = <0x800000 0x3f800000>;
};
};
};
};
};
......@@ -173,3 +152,33 @@ stat_led_pins: stat-led-pins {
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x400000>;
};
partition@400000 {
label = "Linux";
reg = <0x400000 0x400000>;
};
partition@800000 {
label = "Filesystem";
reg = <0x800000 0x3f800000>;
};
};
};
};
arch/arm/boot/dts/armada-370-netgear-rn102.dts
View file @ 721afaa2
......@@ -81,46 +81,6 @@ g762: g762@3e {
pwm_polarity = <0>;
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
/* Use Hardware BCH ECC */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x180000>; /* 1.5MB */
read-only;
};
partition@180000 {
label = "u-boot-env";
reg = <0x180000 0x20000>; /* 128KB */
read-only;
};
partition@200000 {
label = "uImage";
reg = <0x0200000 0x600000>; /* 6MB */
};
partition@800000 {
label = "minirootfs";
reg = <0x0800000 0x400000>; /* 4MB */
};
/* Last MB is for the BBT, i.e. not writable */
partition@c00000 {
label = "ubifs";
reg = <0x0c00000 0x7400000>; /* 116MB */
};
};
};
};
......@@ -264,3 +224,53 @@ poweroff: poweroff {
marvell,function = "gpio";
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
/* Use Hardware BCH ECC */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x180000>; /* 1.5MB */
read-only;
};
partition@180000 {
label = "u-boot-env";
reg = <0x180000 0x20000>; /* 128KB */
read-only;
};
partition@200000 {
label = "uImage";
reg = <0x0200000 0x600000>; /* 6MB */
};
partition@800000 {
label = "minirootfs";
reg = <0x0800000 0x400000>; /* 4MB */
};
/* Last MB is for the BBT, i.e. not writable */
partition@c00000 {
label = "ubifs";
reg = <0x0c00000 0x7400000>; /* 116MB */
};
};
};
};
arch/arm/boot/dts/armada-370-netgear-rn104.dts
View file @ 721afaa2
......@@ -90,46 +90,6 @@ pca9554: pca9554@23 {
reg = <0x23>;
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
/* Use Hardware BCH ECC */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x180000>; /* 1.5MB */
read-only;
};
partition@180000 {
label = "u-boot-env";
reg = <0x180000 0x20000>; /* 128KB */
read-only;
};
partition@200000 {
label = "uImage";
reg = <0x0200000 0x600000>; /* 6MB */
};
partition@800000 {
label = "minirootfs";
reg = <0x0800000 0x400000>; /* 4MB */
};
/* Last MB is for the BBT, i.e. not writable */
partition@c00000 {
label = "ubifs";
reg = <0x0c00000 0x7400000>; /* 116MB */
};
};
};
};
......@@ -276,3 +236,53 @@ reset_button_pin: reset-button-pin {
marvell,function = "gpio";
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
/* Use Hardware BCH ECC */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x180000>; /* 1.5MB */
read-only;
};
partition@180000 {
label = "u-boot-env";
reg = <0x180000 0x20000>; /* 128KB */
read-only;
};
partition@200000 {
label = "uImage";
reg = <0x0200000 0x600000>; /* 6MB */
};
partition@800000 {
label = "minirootfs";
reg = <0x0800000 0x400000>; /* 4MB */
};
/* Last MB is for the BBT, i.e. not writable */
partition@c00000 {
label = "ubifs";
reg = <0x0c00000 0x7400000>; /* 116MB */
};
};
};
};
arch/arm/boot/dts/armada-370-rd.dts
View file @ 721afaa2
......@@ -112,27 +112,6 @@ sw_led {
default-state = "keep";
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
......@@ -288,3 +267,34 @@ led_pins: led-pins {
marvell,function = "gpio";
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
View file @ 721afaa2
......@@ -66,33 +66,6 @@ rtc@6f {
interrupts = <110>;
};
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
reg = <0x0 0x300000>;
};
partition@300000 {
label = "device-tree";
reg = <0x300000 0x20000>;
};
partition@320000 {
label = "linux";
reg = <0x320000 0x2000000>;
};
partition@2320000 {
label = "rootfs";
reg = <0x2320000 0xdce0000>;
};
};
};
};
......@@ -227,3 +200,40 @@ hdd1_led_gpio_pin: hdd1-led-gpio-pin {
marvell,function = "gpio";
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x300000>;
};
partition@300000 {
label = "device-tree";
reg = <0x300000 0x20000>;
};
partition@320000 {
label = "linux";
reg = <0x320000 0x2000000>;
};
partition@2320000 {
label = "rootfs";
reg = <0x2320000 0xdce0000>;
};
};
};
};
arch/arm/boot/dts/armada-370-xp.dtsi
View file @ 721afaa2
......@@ -244,11 +244,11 @@ sata: sata@a0000 {
status = "disabled";
};
nand: nand@d0000 {
compatible = "marvell,armada370-nand";
nand_controller: nand-controller@d0000 {
compatible = "marvell,armada370-nand-controller";
reg = <0xd0000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
interrupts = <113>;
clocks = <&coredivclk 0>;
status = "disabled";
......
arch/arm/boot/dts/armada-375-db.dts
View file @ 721afaa2
......@@ -103,28 +103,38 @@ &sata {
nr-ports = <2>;
};
&nand {
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
......
arch/arm/boot/dts/armada-375.dtsi
View file @ 721afaa2
......@@ -502,11 +502,11 @@ sata: sata@a0000 {
status = "disabled";
};
nand: nand@d0000 {
compatible = "marvell,armada370-nand";
nand_controller: nand-controller@d0000 {
compatible = "marvell,armada370-nand-controller";
reg = <0xd0000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gateclk 11>;
status = "disabled";
......
arch/arm/boot/dts/armada-385-db-ap.dts
View file @ 721afaa2
......@@ -135,39 +135,6 @@ bm@c8000 {
status = "okay";
};
nfc: flash@d0000 {
status = "okay";
num-cs = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0x00000000 0x00800000>;
read-only;
};
partition@800000 {
label = "uImage";
reg = <0x00800000 0x00400000>;
read-only;
};
partition@c00000 {
label = "Root";
reg = <0x00c00000 0x3f400000>;
};
};
};
usb3@f0000 {
status = "okay";
usb-phy = <&usb3_phy>;
......@@ -233,3 +200,39 @@ spi-flash@0 {
spi-max-frequency = <54000000>;
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0x00000000 0x00800000>;
read-only;
};
partition@800000 {
label = "uImage";
reg = <0x00800000 0x00400000>;
read-only;
};
partition@c00000 {
label = "Root";
reg = <0x00c00000 0x3f400000>;
};
};
};
};
arch/arm/boot/dts/armada-385-linksys-caiman.dts
View file @ 721afaa2
......@@ -73,67 +73,72 @@ sata {
&nand {
/* 128MiB */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
};
};
};
arch/arm/boot/dts/armada-385-linksys-cobra.dts
View file @ 721afaa2
......@@ -73,67 +73,72 @@ sata {
&nand {
/* 128MiB */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
};
};
};
arch/arm/boot/dts/armada-385-linksys-rango.dts
View file @ 721afaa2
......@@ -81,74 +81,79 @@ &gpio_leds_pins {
&nand {
/* AMD/Spansion S34ML02G2 256MiB, OEM Layout */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@200000 {
label = "u_env";
reg = <0x200000 0x20000>; /* 128KiB */
};
partition@220000 {
label = "s_env";
reg = <0x220000 0x40000>; /* 256KiB */
};
partition@7e0000 {
label = "devinfo";
reg = <0x7e0000 0x40000>; /* 256KiB */
read-only;
};
partition@820000 {
label = "sysdiag";
reg = <0x820000 0x1e0000>; /* 1920KiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x5000000>; /* 80MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x4a00000>; /* 74MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@5a00000 {
label = "kernel2";
reg = <0x5a00000 0x5000000>; /* 80MiB */
};
partition@6000000 {
label = "rootfs2";
reg = <0x6000000 0x4a00000>; /* 74MiB */
};
/*
* 86MiB, last MiB is for the BBT, not writable
*/
partition@aa00000 {
label = "syscfg";
reg = <0xaa00000 0x5600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x260000 0x5c0000>; /* 5.75MiB */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@200000 {
label = "u_env";
reg = <0x200000 0x20000>; /* 128KiB */
};
partition@220000 {
label = "s_env";
reg = <0x220000 0x40000>; /* 256KiB */
};
partition@7e0000 {
label = "devinfo";
reg = <0x7e0000 0x40000>; /* 256KiB */
read-only;
};
partition@820000 {
label = "sysdiag";
reg = <0x820000 0x1e0000>; /* 1920KiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x5000000>; /* 80MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x4a00000>; /* 74MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@5a00000 {
label = "kernel2";
reg = <0x5a00000 0x5000000>; /* 80MiB */
};
partition@6000000 {
label = "rootfs2";
reg = <0x6000000 0x4a00000>; /* 74MiB */
};
/*
* 86MiB, last MiB is for the BBT, not writable
*/
partition@aa00000 {
label = "syscfg";
reg = <0xaa00000 0x5600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x260000 0x5c0000>; /* 5.75MiB */
};
};
};
......
arch/arm/boot/dts/armada-385-linksys-shelby.dts
View file @ 721afaa2
......@@ -73,67 +73,72 @@ sata {
&nand {
/* 128MiB */
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MiB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x200000 0x40000>; /* 256KiB */
};
partition@140000 {
label = "s_env";
reg = <0x240000 0x40000>; /* 256KiB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MiB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MiB */
};
partition@1000000 {
label = "rootfs1";
reg = <0x1000000 0x2200000>; /* 34MiB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MiB */
};
partition@3800000 {
label = "rootfs2";
reg = <0x3800000 0x2200000>; /* 34MiB */
};
/*
* 38MiB, last MiB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x280000 0x680000>; /* 6.5MiB */
};
};
};
arch/arm/boot/dts/armada-385-linksys.dtsi
View file @ 721afaa2
......@@ -138,13 +138,19 @@ expander0: pca9635@68 {
};
};
&nand {
&nand_controller {
/* 128MiB or 256MiB */
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <0>;
nand: nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
};
};
&mdio {
......
arch/arm/boot/dts/armada-388-db.dts
View file @ 721afaa2
......@@ -91,29 +91,6 @@ bm@c8000 {
status = "okay";
};
flash@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
sdhci@d8000 {
broken-cd;
wp-inverted;
......@@ -165,3 +142,35 @@ spi-flash@0 {
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
arch/arm/boot/dts/armada-38x.dtsi
View file @ 721afaa2
......@@ -551,11 +551,11 @@ thermal: thermal@e8078 {
status = "okay";
};
nand: flash@d0000 {
compatible = "marvell,armada370-nand";
nand_controller: nand-controller@d0000 {
compatible = "marvell,armada370-nand-controller";
reg = <0xd0000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&coredivclk 0>;
status = "disabled";
......
arch/arm/boot/dts/armada-390-db.dts
View file @ 721afaa2
......@@ -49,37 +49,6 @@ usb@58000 {
status = "okay";
};
flash@d0000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
/* CON98 */
usb3@f8000 {
status = "okay";
......@@ -136,3 +105,38 @@ partition@400000 {
};
};
};
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
arch/arm/boot/dts/armada-395-gp.dts
View file @ 721afaa2
......@@ -57,41 +57,6 @@ sata@a8000 {
status = "okay";
};
flash@d0000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0x00000000 0x00600000>;
read-only;
};
partition@800000 {
label = "uImage";
reg = <0x00600000 0x00400000>;
read-only;
};
partition@1000000 {
label = "Root";
reg = <0x00a00000 0x3f600000>;
};
};
};
/* CON18 */
sdhci@d8000 {
clock-frequency = <200000000>;
......@@ -130,3 +95,42 @@ pcie@4,0 {
};
};
};
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0x00000000 0x00600000>;
read-only;
};
partition@800000 {
label = "uImage";
reg = <0x00600000 0x00400000>;
read-only;
};
partition@1000000 {
label = "Root";
reg = <0x00a00000 0x3f600000>;
};
};
};
};
arch/arm/boot/dts/armada-398-db.dts
View file @ 721afaa2
......@@ -51,31 +51,6 @@ usb@58000 {
status = "okay";
};
flash@d0000 {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
usb3@f8000 {
status = "okay";
};
......@@ -122,3 +97,38 @@ partition@400000 {
};
};
};
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0 0x800000>;
};
partition@800000 {
label = "Linux";
reg = <0x800000 0x800000>;
};
partition@1000000 {
label = "Filesystem";
reg = <0x1000000 0x3f000000>;
};
};
};
};
arch/arm/boot/dts/armada-39x.dtsi
View file @ 721afaa2
......@@ -367,11 +367,11 @@ rtc@a3800 {
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
};
flash@d0000 {
compatible = "marvell,armada370-nand";
nand_controller: nand-controller@d0000 {
compatible = "marvell,armada370-nand-controller";
reg = <0xd0000 0x54>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&coredivclk 0>;
status = "disabled";
......
arch/arm/boot/dts/armada-xp-98dx3236.dtsi
View file @ 721afaa2
......@@ -306,6 +306,19 @@ &usb1 {
&pinctrl {
compatible = "marvell,98dx3236-pinctrl";
nand_pins: nand-pins {
marvell,pins = "mpp20", "mpp21", "mpp22",
"mpp23", "mpp24", "mpp25",
"mpp26", "mpp27", "mpp28",
"mpp29", "mpp30";
marvell,function = "dev";
};
nand_rb: nand-rb {
marvell,pins = "mpp19";
marvell,function = "nand";
};
spi0_pins: spi0-pins {
marvell,pins = "mpp0", "mpp1",
"mpp2", "mpp3";
......
arch/arm/boot/dts/armada-xp-db-dxbc2.dts
View file @ 721afaa2
......@@ -70,9 +70,9 @@ &uart1 {
&nand {
status = "okay";
label = "pxa3xx_nand-0";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
......
arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
View file @ 721afaa2
......@@ -69,9 +69,9 @@ &i2c0 {
&nand {
status = "okay";
label = "pxa3xx_nand-0";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
......
arch/arm/boot/dts/armada-xp-db.dts
View file @ 721afaa2
......@@ -146,9 +146,9 @@ usb@52000 {
nand@d0000 {
status = "okay";
label = "pxa3xx_nand-0";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partitions {
......
arch/arm/boot/dts/armada-xp-gp.dts
View file @ 721afaa2
......@@ -162,9 +162,9 @@ bm@c0000 {
nand@d0000 {
status = "okay";
label = "pxa3xx_nand-0";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
};
};
......
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
View file @ 721afaa2
......@@ -83,9 +83,9 @@ pcf8563@51 {
nand@d0000 {
status = "okay";
label = "pxa3xx_nand-0";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
partitions {
......
arch/arm/boot/dts/armada-xp-linksys-mamba.dts
View file @ 721afaa2
......@@ -165,79 +165,6 @@ wps_amber@9 {
bm@c8000 {
status = "okay";
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>; /* 1MB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x100000 0x40000>; /* 256KB */
};
partition@140000 {
label = "s_env";
reg = <0x140000 0x40000>; /* 256KB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MB */
};
partition@d00000 {
label = "rootfs1";
reg = <0xd00000 0x2500000>; /* 37MB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MB */
};
partition@3500000 {
label = "rootfs2";
reg = <0x3500000 0x2500000>; /* 37MB */
};
/*
* 38MB, last MB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x180000 0x780000>; /* 7.5MB */
};
};
};
bm-bppi {
......@@ -434,3 +361,86 @@ fixed-link {
};
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>; /* 1MB */
read-only;
};
partition@100000 {
label = "u_env";
reg = <0x100000 0x40000>; /* 256KB */
};
partition@140000 {
label = "s_env";
reg = <0x140000 0x40000>; /* 256KB */
};
partition@900000 {
label = "devinfo";
reg = <0x900000 0x100000>; /* 1MB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@a00000 {
label = "kernel1";
reg = <0xa00000 0x2800000>; /* 40MB */
};
partition@d00000 {
label = "rootfs1";
reg = <0xd00000 0x2500000>; /* 37MB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@3200000 {
label = "kernel2";
reg = <0x3200000 0x2800000>; /* 40MB */
};
partition@3500000 {
label = "rootfs2";
reg = <0x3500000 0x2500000>; /* 37MB */
};
/*
* 38MB, last MB is for the BBT, not writable
*/
partition@5a00000 {
label = "syscfg";
reg = <0x5a00000 0x2600000>;
};
/*
* Unused area between "s_env" and "devinfo".
* Moved here because otherwise the renumbered
* partitions would break the bootloader
* supplied bootargs
*/
partition@180000 {
label = "unused_area";
reg = <0x180000 0x780000>; /* 7.5MB */
};
};
};
};
arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
View file @ 721afaa2
......@@ -117,46 +117,6 @@ sata@a0000 {
nr-ports = <2>;
status = "okay";
};
nand@d0000 {
status = "okay";
num-cs = <1>;
marvell,nand-keep-config;
marvell,nand-enable-arbiter;
nand-on-flash-bbt;
/* Use Hardware BCH ECC */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x180000>; /* 1.5MB */
read-only;
};
partition@180000 {
label = "u-boot-env";
reg = <0x180000 0x20000>; /* 128KB */
read-only;
};
partition@200000 {
label = "uImage";
reg = <0x0200000 0x600000>; /* 6MB */
};
partition@800000 {
label = "minirootfs";
reg = <0x0800000 0x400000>; /* 4MB */
};
/* Last MB is for the BBT, i.e. not writable */
partition@c00000 {
label = "ubifs";
reg = <0x0c00000 0x7400000>; /* 116MB */
};
};
};
};
......@@ -345,3 +305,53 @@ err_led_pin: err-led-pin {
marvell,function = "gpio";
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
/* Use Hardware BCH ECC */
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x180000>; /* 1.5MB */
read-only;
};
partition@180000 {
label = "u-boot-env";
reg = <0x180000 0x20000>; /* 128KB */
read-only;
};
partition@200000 {
label = "uImage";
reg = <0x0200000 0x600000>; /* 6MB */
};
partition@800000 {
label = "minirootfs";
reg = <0x0800000 0x400000>; /* 4MB */
};
/* Last MB is for the BBT, i.e. not writable */
partition@c00000 {
label = "ubifs";
reg = <0x0c00000 0x7400000>; /* 116MB */
};
};
};
};
arch/arm/boot/dts/aspeed-ast2500-evb.dts
View file @ 721afaa2
......@@ -79,3 +79,21 @@ lm75@4d {
reg = <0x4d>;
};
};
&ehci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2ah_default>;
};
&ehci1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2bh_default>;
};
&uhci {
status = "okay";
/* No pinctrl, this follows the above EHCI settings */
};
arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts 0 → 100644
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2017 Intel Corporation
/dts-v1/;
#include "aspeed-g5.dtsi"
/ {
model = "S2600WF BMC";
compatible = "intel,s2600wf-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "earlyprintk";
};
memory {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@7f000000 {
no-map;
reg = <0x7f000000 0x01000000>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&gfx {
status = "okay";
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
};
arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts 0 → 100644
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Inventec Corporation
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Lanyang BMC";
compatible = "inventec,lanyang-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory {
reg = <0x80000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
};
leds {
compatible = "gpio-leds";
sys_boot_status {
label = "System_boot_status";
gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_LOW>;
};
attention {
label = "Attention_locator";
gpios = <&gpio ASPEED_GPIO(B, 7) GPIO_ACTIVE_HIGH>;
};
plt_fault {
label = "Platform_fault";
gpios = <&gpio ASPEED_GPIO(B, 1) GPIO_ACTIVE_HIGH>;
};
hdd_fault {
label = "Onboard_drive_fault";
gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_HIGH>;
};
bmc_err {
lable = "BMC_fault";
gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>;
};
sys_err {
lable = "Sys_fault";
gpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
};
};
fsi: gpio-fsi {
compatible = "fsi-master-gpio", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
clock-gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(D, 5) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
<&adc 13>, <&adc 14>, <&adc 15>;
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 12>;
};
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
};
};
&spi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2ck_default
&pinctrl_spi2cs0_default
&pinctrl_spi2cs1_default
&pinctrl_spi2miso_default
&pinctrl_spi2mosi_default>;
flash@0 {
status = "okay";
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&lpc_snoop {
status = "okay";
snoop-ports = <0x80>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
status = "okay";
eeprom@55 {
compatible = "atmel,24c64";
reg = <0x55>;
pagesize = <32>;
};
rtc@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
};
tmp75@48 {
compatible = "ti,tmp75";
reg = <0x48>;
};
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&gpio {
pin_gpio_b0 {
gpio-hog;
gpios = <ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_HDD1_PWR_EN";
};
pin_gpio_b5 {
gpio-hog;
gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
input;
line-name = "BMC_USB1_OCI2";
};
pin_gpio_h5 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_CP0_PERST_ENABLE_R";
};
pin_gpio_z2 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RST_PCA9546_U177_N";
};
pin_gpio_aa6 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 6) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_CP0_RESET_N";
};
pin_gpio_aa7 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 7) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_TPM_RESET_N";
};
pin_gpio_ab0 {
gpio-hog;
gpios = <ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
output-high;
line-name = "BMC_USB_PWRON_N";
};
};
&ibt {
status = "okay";
};
&adc {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
View file @ 721afaa2
......@@ -68,6 +68,12 @@ checkstop {
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
id-button {
label = "id-button";
gpios = <&gpio ASPEED_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(Q, 7)>;
};
};
};
......
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
View file @ 721afaa2
......@@ -28,6 +28,34 @@ flash_memory: region@98000000 {
};
};
gpio-keys {
compatible = "gpio-keys";
air-water {
label = "air-water";
gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 5)>;
};
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(P, 7)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(N, 0)>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
......@@ -547,6 +575,10 @@ &wdt1 {
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&wdt2 {
aspeed,alt-boot;
};
&ibt {
status = "okay";
};
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
View file @ 721afaa2
......@@ -55,6 +55,12 @@ checkstop {
gpios = <&gpio ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 7)>;
};
pcie-e2b-present{
label = "pcie-e2b-present";
gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(E, 7)>;
};
};
leds {
......
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts 0 → 100644
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2017 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Portwell Neptune BMC";
compatible = "portwell,neptune-bmc", "aspeed,ast2500";
aliases {
serial0 = &uart1;
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory {
reg = <0x80000000 0x20000000>;
};
leds {
compatible = "gpio-leds";
postcode0 {
label="BMC_UP";
gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
default-state = "on";
};
postcode1 {
label="BMC_HB";
gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
postcode2 {
label="FAULT";
gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
};
// postcode3-7 are GPIOH3-H7
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart1 {
// Host Console
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart5 {
// BMC Console
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default
&pinctrl_mdio1_default>;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii2_default>;
use-ncsi;
};
&i2c1 {
status = "okay";
// To PCIe slot SMBUS
};
&i2c2 {
status = "okay";
// To LAN I210
};
&i2c3 {
status = "okay";
// SMBus to COMe AB
};
&i2c4 {
status = "okay";
// I2C to COMe AB
};
&i2c5 {
status = "okay";
// USB Debug card
pca9555@27 {
compatible = "nxp,pca9555";
reg = <0x27>;
};
};
&i2c6 {
status = "okay";
tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
};
tmp421@4e {
compatible = "ti,tmp421";
reg = <0x4e>;
};
tmp421@4f {
compatible = "ti,tmp421";
reg = <0x4f>;
};
};
&i2c8 {
status = "okay";
eeprom@51 {
compatible = "atmel,24c128";
reg = <0x51>;
pagesize = <32>;
};
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
};
arch/arm/boot/dts/aspeed-g4.dtsi
View file @ 721afaa2
......@@ -108,6 +108,23 @@ mac1: ethernet@1e680000 {
status = "disabled";
};
ehci0: usb@1e6a1000 {
compatible = "aspeed,ast2400-ehci", "generic-ehci";
reg = <0x1e6a1000 0x100>;
interrupts = <5>;
clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
status = "disabled";
};
uhci: usb@1e6b0000 {
compatible = "aspeed,ast2400-uhci", "generic-uhci";
reg = <0x1e6b0000 0x100>;
interrupts = <14>;
#ports = <3>;
clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
status = "disabled";
};
apb {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -125,6 +142,14 @@ syscon: syscon@1e6e2000 {
pinctrl: pinctrl {
compatible = "aspeed,g4-pinctrl";
};
};
rng: hwrng@1e6e2078 {
compatible = "timeriomem_rng";
reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};
adc: adc@1e6e9000 {
......@@ -1250,6 +1275,16 @@ pinctrl_usbcki_default: usbcki_default {
groups = "USBCKI";
};
pinctrl_usb2h_default: usb2h_default {
function = "USB2H1";
groups = "USB2H1";
};
pinctrl_usb2d_default: usb2d_default {
function = "USB2D1";
groups = "USB2D1";
};
pinctrl_vgabios_rom_default: vgabios_rom_default {
function = "VGABIOS_ROM";
groups = "VGABIOS_ROM";
......
arch/arm/boot/dts/aspeed-g5.dtsi
View file @ 721afaa2
......@@ -143,6 +143,31 @@ mac1: ethernet@1e680000 {
status = "disabled";
};
ehci0: usb@1e6a1000 {
compatible = "aspeed,ast2500-ehci", "generic-ehci";
reg = <0x1e6a1000 0x100>;
interrupts = <5>;
clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
status = "disabled";
};
ehci1: usb@1e6a3000 {
compatible = "aspeed,ast2500-ehci", "generic-ehci";
reg = <0x1e6a3000 0x100>;
interrupts = <13>;
clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
status = "disabled";
};
uhci: usb@1e6b0000 {
compatible = "aspeed,ast2500-uhci", "generic-uhci";
reg = <0x1e6b0000 0x100>;
interrupts = <14>;
#ports = <2>;
clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
status = "disabled";
};
apb {
compatible = "simple-bus";
#address-cells = <1>;
......@@ -164,6 +189,13 @@ pinctrl: pinctrl {
};
};
rng: hwrng@1e6e2078 {
compatible = "timeriomem_rng";
reg = <0x1e6e2078 0x4>;
period = <1>;
quality = <100>;
};
gfx: display@1e6e6000 {
compatible = "aspeed,ast2500-gfx", "syscon";
reg = <0x1e6e6000 0x1000>;
......@@ -1380,6 +1412,21 @@ pinctrl_usbcki_default: usbcki_default {
groups = "USBCKI";
};
pinctrl_usb2ah_default: usb2ah_default {
function = "USB2AH";
groups = "USB2AH";
};
pinctrl_usb11bhid_default: usb11bhid_default {
function = "USB11BHID";
groups = "USB11BHID";
};
pinctrl_usb2bh_default: usb2bh_default {
function = "USB2BH";
groups = "USB2BH";
};
pinctrl_vgabiosrom_default: vgabiosrom_default {
function = "VGABIOSROM";
groups = "VGABIOSROM";
......
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View file @ 721afaa2
......@@ -232,7 +232,7 @@ charger {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
interrupt-parent = <&pioA>;
interrupts = <PIN_PB13 GPIO_ACTIVE_LOW>;
interrupts = <PIN_PB13 IRQ_TYPE_EDGE_RISING>;
active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>;
active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>;
......
arch/arm/boot/dts/at91-sama5d4ek.dts
View file @ 721afaa2
......@@ -129,8 +129,8 @@ qt1070:keyboard@1b {
wakeup-source;
};
atmel_mxt_ts@4c {
compatible = "atmel,atmel_mxt_ts";
touchscreen@4c {
compatible = "atmel,maxtouch";
reg = <0x4c>;
interrupt-parent = <&pioE>;
interrupts = <24 0x0>;
......
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
View file @ 721afaa2
......@@ -101,6 +101,12 @@ &hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
......
arch/arm/boot/dts/bcm2835-rpi-a.dts
View file @ 721afaa2
......@@ -96,6 +96,12 @@ &hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
......
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
View file @ 721afaa2
......@@ -103,6 +103,12 @@ &hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
......
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
View file @ 721afaa2
......@@ -96,6 +96,12 @@ &hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
......
arch/arm/boot/dts/bcm2835-rpi-b.dts
View file @ 721afaa2
......@@ -91,6 +91,12 @@ &hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
......
arch/arm/boot/dts/bcm2835-rpi.dtsi
View file @ 721afaa2
......@@ -83,12 +83,6 @@ &sdhost {
bus-width = <4>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
&usb {
power-domains = <&power RPI_POWER_DOMAIN_USB>;
};
......
arch/arm/boot/dts/bcm2836-rpi-2-b.dts
View file @ 721afaa2
......@@ -41,6 +41,12 @@ &hdmi {
hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio14>;
......
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts 0 → 100644
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2837.dtsi"
#include "bcm2835-rpi.dtsi"
#include "bcm283x-rpi-lan7515.dtsi"
#include "bcm283x-rpi-usb-host.dtsi"
/ {
compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
model = "Raspberry Pi 3 Model B+";
chosen {
/* 8250 auxiliary UART instead of pl011 */
stdout-path = "serial1:115200n8";
};
memory {
reg = <0 0x40000000>;
};
leds {
act {
gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
};
pwr {
label = "PWR";
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
};
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>;
};
};
&firmware {
expgpio: gpio {
compatible = "raspberrypi,firmware-gpio";
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "BT_ON",
"WL_ON",
"STATUS_LED",
"LAN_RUN",
"",
"CAM_GPIO0",
"CAM_GPIO1",
"";
status = "okay";
};
};
&hdmi {
hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
status = "okay";
};
/* SDHCI is used to control the SDIO for wireless */
&sdhci {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_gpio34>;
status = "okay";
bus-width = <4>;
non-removable;
mmc-pwrseq = <&wifi_pwrseq>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* SDHOST is used to drive the SD card */
&sdhost {
pinctrl-names = "default";
pinctrl-0 = <&sdhost_gpio48>;
status = "okay";
bus-width = <4>;
};
/* uart0 communicates with the BT module */
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <2000000>;
shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
};
};
/* uart1 is mapped to the pin header */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_gpio14>;
status = "okay";
};
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
View file @ 721afaa2
......@@ -20,9 +20,14 @@ memory {
leds {
act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>;
};
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>;
};
};
&firmware {
......@@ -42,6 +47,16 @@ expgpio: gpio {
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>;
status = "okay";
};
&hdmi {
hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
};
/* uart0 communicates with the BT module */
&uart0 {
pinctrl-names = "default";
......@@ -51,6 +66,7 @@ &uart0 {
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <2000000>;
shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
};
};
......@@ -63,11 +79,19 @@ &uart1 {
/* SDHCI is used to control the SDIO for wireless */
&sdhci {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_gpio34>;
status = "okay";
bus-width = <4>;
non-removable;
mmc-pwrseq = <&wifi_pwrseq>;
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* SDHOST is used to drive the SD card */
......
arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi 0 → 100644
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0
/ {
aliases {
ethernet0 = &ethernet;
};
};
&usb {
usb-port@1 {
compatible = "usb424,2514";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
usb-port@1 {
compatible = "usb424,2514";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
ethernet: ethernet@1 {
compatible = "usb424,7800";
reg = <1>;
};
};
};
};
arch/arm/boot/dts/bcm283x.dtsi
View file @ 721afaa2
......@@ -136,6 +136,7 @@ clocks: cprman@7e101000 {
rng@7e104000 {
compatible = "brcm,bcm2835-rng";
reg = <0x7e104000 0x10>;
interrupts = <2 29>;
};
mailbox: mailbox@7e00b880 {
......
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Asus RT-AC56U
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Asus RT-AC68U
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Buffalo WZR-1750DHP
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2016 Luxul Inc.
*
* Licensed under the ISC license.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Luxul XWC-1000
*
* Copyright 2014 Luxul Inc.
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
......@@ -26,9 +25,15 @@ memory {
nand: nand@18028000 {
nandcs@0 {
partition@0 {
label = "ubi";
reg = <0x00000000 0x08000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "ubi";
reg = <0x00000000 0x08000000>;
};
};
};
};
......
arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Netgear R6300 V2
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X arm platform code.
* DTS for SmartRG SR400ac
*
* Copyright (C) 2015 Rafał Miłecki <zajec5@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Asus RT-N18U
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
......
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
View file @ 721afaa2
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for Buffalo WZR-600DHP2
*
* Copyright (C) 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
/dts-v1/;
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