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Kirill Smelkov
linux
Commits
73d089ce
Commit
73d089ce
authored
Mar 30, 2004
by
Sam Ravnborg
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Merge mars.ravnborg.org:/home/sam/bk/linux-2.6
into mars.ravnborg.org:/home/sam/bk/kbuild
parents
8e764e0d
bfb2cc51
Changes
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4 changed files
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20 additions
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9 deletions
+20
-9
Documentation/kbuild/makefiles.txt
Documentation/kbuild/makefiles.txt
+6
-6
Makefile
Makefile
+12
-1
scripts/Makefile.modpost
scripts/Makefile.modpost
+1
-1
scripts/basic/fixdep.c
scripts/basic/fixdep.c
+1
-1
No files found.
Documentation/kbuild/makefiles.txt
View file @
73d089ce
...
...
@@ -119,7 +119,7 @@ more details, with real examples.
obj-y += foo.o
This tell kbuild that there is one object in that directory named
foo.o. foo.o will be buil
d
from foo.c or foo.S.
foo.o. foo.o will be buil
t
from foo.c or foo.S.
If foo.o shall be built as a module, the variable obj-m is used.
Therefore the following pattern is often used:
...
...
@@ -334,7 +334,7 @@ more details, with real examples.
--- 3.9 Dependency tracking
Kbuild track dependencies on the following:
Kbuild track
s
dependencies on the following:
1) All prerequisite files (both *.c and *.h)
2) CONFIG_ options used in all prerequisite files
3) Command-line used to compile target
...
...
@@ -411,7 +411,7 @@ Both possibilities are described in the following.
--- 4.2 Composite Host Programs
Host programs can be made up based on composite objects.
The syntax used to define composite obje
tc
s for host programs is
The syntax used to define composite obje
ct
s for host programs is
similar to the syntax used for kernel objects.
$(<executeable>-objs) list all objects used to link the final
executable.
...
...
@@ -811,7 +811,7 @@ When kbuild executes the following steps are followed (roughly):
extra-y
extra-y specify additional targets created in current
extra-y specify additional targets created in
the
current
directory, in addition to any targets specified by obj-*.
Listing all targets in extra-y is required for two purposes:
...
...
@@ -829,7 +829,7 @@ When kbuild executes the following steps are followed (roughly):
--- 6.6 Commands useful for building a boot image
Kbuild provide a few macros that are useful when building a
Kbuild provide
s
a few macros that are useful when building a
boot image.
if_changed
...
...
@@ -872,7 +872,7 @@ When kbuild executes the following steps are followed (roughly):
$(obj)/setup $(obj)/bootsect: %: %.o FORCE
$(call if_changed,ld)
In this example there
is
two possible targets, requiring different
In this example there
are
two possible targets, requiring different
options to the linker. the linker options are specified using the
LDFLAGS_$@ syntax - one for each potential target.
$(targets) are assinged all potential targets, herby kbuild knows
...
...
Makefile
View file @
73d089ce
...
...
@@ -107,6 +107,16 @@ endif # ifeq ($(KBUILD_SRC),)
# We process the rest of the Makefile if this is the final invocation of make
ifeq
($(skip-makefile),)
# Make sure we're not wasting cpu-cycles doing locale handling, yet do make
# sure error messages appear in the user-desired language
ifdef
LC_ALL
LANG
:=
$(LC_ALL)
LC_ALL
:=
endif
LC_COLLATE
:=
C
LC_CTYPE
:=
C
export
LANG
LC_ALL
LC_COLLATE
LC_CTYPE
srctree
:=
$(
if
$(KBUILD_SRC)
,
$(KBUILD_SRC)
,
$(CURDIR)
)
TOPDIR
:=
$(srctree)
# FIXME - TOPDIR is obsolete, use srctree/objtree
...
...
@@ -652,7 +662,7 @@ include/config/MARKER: include/linux/autoconf.h
uts_len
:=
64
define
filechk_version.h
if
expr
length
"$(KERNELRELEASE)"
\>
$(uts_len)
>/dev/null
;
then
\
if
((`echo
-n
"$(KERNELRELEASE)"
|
wc
-c
`
>
$(uts_len)))
;
then
\
echo
'"$(KERNELRELEASE)" exceeds $(uts_len) characters'
>&2;
\
exit
1;
\
fi;
\
...
...
@@ -911,6 +921,7 @@ help:
@
echo
' dir/file.[ois] - Build specified target only'
@
echo
' rpm - Build a kernel as an RPM package'
@
echo
' tags/TAGS - Generate tags file for editors'
@
echo
' cscope - Generate cscope index'
@
echo
''
@
echo
'Documentation targets:'
@
$(MAKE)
-f
$(srctree)
/Documentation/DocBook/Makefile dochelp
...
...
scripts/Makefile.modpost
View file @
73d089ce
...
...
@@ -14,7 +14,7 @@ __modules := $(shell head -q -n1 /dev/null $(wildcard $(MODVERDIR)/*.mod))
modules
:=
$(
patsubst
%.o,%.ko,
$(
wildcard
$(__modules:.ko=.o)
))
ifneq
($(filter-out $(modules),$(__modules)),)
$(warning Trouble
:
$(
__modules)
)
$(warning Trouble
:
$(
filter-out $(modules)
,
$(__modules))
)
$(warning
***
Uh-oh,
you
have
stale
module
entries.
You
messed
with
SUBDIRS,)
$(warning
do
not
complain
if
something
goes
wrong.)
endif
...
...
scripts/basic/fixdep.c
View file @
73d089ce
...
...
@@ -38,7 +38,7 @@
*
* The idea above dates, by the way, back to Michael E Chastain, AFAIK.
*
* So to get dependencies right, there two issues:
* So to get dependencies right, there
are
two issues:
* o if any of the files the compiler read changed, we need to rebuild
* o if the command line given to the compile the file changed, we
* better rebuild as well.
...
...
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