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Commit 744284fa authored by Shawn Guo's avatar Shawn Guo
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Merge tag 'imx-dt64-4.21' into imx/qspi-dt 

Freescale arm64 device tree update for 4.21:
 - Add device tree for LS1028A SoC and NXP FRWY & QDS boards support
   based on this SoC.
 - Add device tree for LX2160A SoC and NXP QDS & RDB boards support
   based on this SoC.
 - Add qdma devices for LS1043A and LS1046A SoC.
 - Disable PCIe device by default in SoC device tree and let board level
   device tree to enable as needed.
 - Drop compatible string "snps,dw-pcie" from LayerScape PCIe devices to
   avoid incorrect matching.
 - Move fsl-mc device as a child node of soc node, and add missing
   dma-ranges property for LS1088A SoC.
 - Update LayerScape SoCs' cooling maps to include all devices affected
   by individual trip points.
parents 79da07de 58f5fa68
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Showing with 1703 additions and 126 deletions
arch/arm64/boot/dts/freescale/Makefile
View file @ 744284fa
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
......@@ -13,3 +16,5 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts 0 → 100644
View file @ 744284fa
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Freescale LS1012A FRWY Board.
*
* Copyright 2018 NXP
*
* Pramod Kumar <pramod.kumar_1@nxp.com>
*
*/
/dts-v1/;
#include "fsl-ls1012a.dtsi"
/ {
model = "LS1012A FRWY Board";
compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
};
&duart0 {
status = "okay";
};
&i2c0 {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
View file @ 744284fa
......@@ -475,7 +475,7 @@ msi: msi-controller1@1572000 {
};
pcie@3400000 {
compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1012a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -496,6 +496,7 @@ pcie@3400000 {
<0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
......
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts 0 → 100644
View file @ 744284fa
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for NXP LS1028A QDS Board.
*
* Copyright 2018 NXP
*
* Harninder Rai <harninder.rai@nxp.com>
*
*/
/dts-v1/;
#include "fsl-ls1028a.dtsi"
/ {
model = "LS1028A QDS Board";
compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
aliases {
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
serial0 = &duart0;
serial1 = &duart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x00000000>;
};
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&i2c0 {
status = "okay";
i2c-mux@77 {
compatible = "nxp,pca9847";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
current-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
shunt-resistor = <1000>;
};
current-monitor@41 {
compatible = "ti,ina220";
reg = <0x41>;
shunt-resistor = <1000>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
};
eeprom@56 {
compatible = "atmel,24c512";
reg = <0x56>;
};
eeprom@57 {
compatible = "atmel,24c512";
reg = <0x57>;
};
};
};
};
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts 0 → 100644
View file @ 744284fa
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for NXP LS1028A RDB Board.
*
* Copyright 2018 NXP
*
* Harninder Rai <harninder.rai@nxp.com>
*
*/
/dts-v1/;
#include "fsl-ls1028a.dtsi"
/ {
model = "LS1028A RDB Board";
compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
aliases {
serial0 = &duart0;
serial1 = &duart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0000000>;
};
};
&i2c0 {
status = "okay";
i2c-mux@77 {
compatible = "nxp,pca9847";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x02>;
current-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
shunt-resistor = <500>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
};
};
};
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi 0 → 100644
View file @ 744284fa
This diff is collapsed.
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
View file @ 744284fa
......@@ -171,8 +171,10 @@ cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
......@@ -661,7 +663,7 @@ msi3: msi-controller3@1573000 {
};
pcie@3400000 {
compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -683,10 +685,11 @@ pcie@3400000 {
<0000 0 0 2 &gic 0 111 0x4>,
<0000 0 0 3 &gic 0 112 0x4>,
<0000 0 0 4 &gic 0 113 0x4>;
status = "disabled";
};
pcie@3500000 {
compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -708,10 +711,11 @@ pcie@3500000 {
<0000 0 0 2 &gic 0 121 0x4>,
<0000 0 0 3 &gic 0 122 0x4>,
<0000 0 0 4 &gic 0 123 0x4>;
status = "disabled";
};
pcie@3600000 {
compatible = "fsl,ls1043a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1043a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -733,7 +737,30 @@ pcie@3600000 {
<0000 0 0 2 &gic 0 155 0x4>,
<0000 0 0 3 &gic 0 156 0x4>,
<0000 0 0 4 &gic 0 157 0x4>;
status = "disabled";
};
qdma: dma-controller@8380000 {
compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
<0x0 0x8390000 0x0 0x10000>, /* Status regs */
<0x0 0x83a0000 0x0 0x40000>; /* Block regs */
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "qdma-error", "qdma-queue0",
"qdma-queue1", "qdma-queue2", "qdma-queue3";
dma-channels = <8>;
block-number = <1>;
block-offset = <0x10000>;
fsl,dma-queues = <2>;
status-sizes = <64>;
queue-sizes = <64 64>;
big-endian;
};
};
firmware {
......
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
View file @ 744284fa
......@@ -140,8 +140,10 @@ cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
......@@ -630,7 +632,7 @@ msi3: msi-controller@15a0000 {
};
pcie@3400000 {
compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1046a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -652,10 +654,11 @@ pcie@3400000 {
<0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie@3500000 {
compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1046a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
0x48 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -677,10 +680,11 @@ pcie@3500000 {
<0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie@3600000 {
compatible = "fsl,ls1046a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1046a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
0x50 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -702,6 +706,28 @@ pcie@3600000 {
<0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
qdma: dma-controller@8380000 {
compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
<0x0 0x8390000 0x0 0x10000>, /* Status regs */
<0x0 0x83a0000 0x0 0x40000>; /* Block regs */
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "qdma-error", "qdma-queue0",
"qdma-queue1", "qdma-queue2", "qdma-queue3";
dma-channels = <8>;
block-number = <1>;
block-offset = <0x10000>;
fsl,dma-queues = <2>;
status-sizes = <64>;
queue-sizes = <64 64>;
big-endian;
};
};
......
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
View file @ 744284fa
......@@ -152,15 +152,14 @@ cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
......@@ -174,77 +173,6 @@ timer {
<1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
};
fsl_mc: fsl-mc@80c000000 {
compatible = "fsl,qoriq-mc";
reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
msi-parent = <&its>;
#address-cells = <3>;
#size-cells = <1>;
/*
* Region type 0x0 - MC portals
* Region type 0x1 - QBMAN portals
*/
ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
dpmacs {
#address-cells = <1>;
#size-cells = <0>;
dpmac1: dpmac@1 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <1>;
};
dpmac2: dpmac@2 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <2>;
};
dpmac3: dpmac@3 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <3>;
};
dpmac4: dpmac@4 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <4>;
};
dpmac5: dpmac@5 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <5>;
};
dpmac6: dpmac@6 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <6>;
};
dpmac7: dpmac@7 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <7>;
};
dpmac8: dpmac@8 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <8>;
};
dpmac9: dpmac@9 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <9>;
};
dpmac10: dpmac@a {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xa>;
};
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
......@@ -262,6 +190,7 @@ soc {
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
clockgen: clocking@1300000 {
compatible = "fsl,ls1088a-clockgen";
......@@ -512,7 +441,7 @@ sec_jr3: jr@40000 {
};
pcie@3400000 {
compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x20 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -533,10 +462,11 @@ pcie@3400000 {
<0000 0 0 2 &gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie@3500000 {
compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
0x28 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -557,10 +487,11 @@ pcie@3500000 {
<0000 0 0 2 &gic 0 0 0 115 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic 0 0 0 116 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic 0 0 0 117 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pcie@3600000 {
compatible = "fsl,ls1088a-pcie", "snps,dw-pcie";
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
0x30 0x00000000 0x0 0x00002000>; /* configuration space */
reg-names = "regs", "config";
......@@ -581,6 +512,7 @@ pcie@3600000 {
<0000 0 0 2 &gic 0 0 0 120 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic 0 0 0 121 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic 0 0 0 122 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
cluster1_core0_watchdog: wdt@c000000 {
......@@ -638,6 +570,77 @@ cluster2_core3_watchdog: wdt@c130000 {
clocks = <&clockgen 4 3>, <&clockgen 4 3>;
clock-names = "apb_pclk", "wdog_clk";
};
fsl_mc: fsl-mc@80c000000 {
compatible = "fsl,qoriq-mc";
reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
msi-parent = <&its>;
#address-cells = <3>;
#size-cells = <1>;
/*
* Region type 0x0 - MC portals
* Region type 0x1 - QBMAN portals
*/
ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
dpmacs {
#address-cells = <1>;
#size-cells = <0>;
dpmac1: dpmac@1 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <1>;
};
dpmac2: dpmac@2 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <2>;
};
dpmac3: dpmac@3 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <3>;
};
dpmac4: dpmac@4 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <4>;
};
dpmac5: dpmac@5 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <5>;
};
dpmac6: dpmac@6 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <6>;
};
dpmac7: dpmac@7 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <7>;
};
dpmac8: dpmac@8 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <8>;
};
dpmac9: dpmac@9 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <9>;
};
dpmac10: dpmac@a {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xa>;
};
};
};
};
firmware {
......
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
View file @ 744284fa
......@@ -119,7 +119,7 @@ CPU_PW20: cpu-pw20 {
};
&pcie1 {
compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x20 0x00000000 0x0 0x00002000>; /* configuration space */
......@@ -128,7 +128,7 @@ &pcie1 {
};
&pcie2 {
compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
0x28 0x00000000 0x0 0x00002000>; /* configuration space */
......@@ -137,7 +137,7 @@ &pcie2 {
};
&pcie3 {
compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
0x30 0x00000000 0x0 0x00002000>; /* configuration space */
......@@ -146,7 +146,7 @@ &pcie3 {
};
&pcie4 {
compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
compatible = "fsl,ls2088a-pcie";
reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
0x38 0x00000000 0x0 0x00002000>; /* configuration space */
......
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View file @ 744284fa
......@@ -101,26 +101,14 @@ cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu2 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map2 {
trip = <&cpu_alert>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu_alert>;
cooling-device =
<&cpu6 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
......@@ -630,8 +618,7 @@ qspi: spi@20c0000 {
};
pcie1: pcie@3400000 {
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
"snps,dw-pcie";
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
reg-names = "regs", "config";
interrupts = <0 108 0x4>; /* Level high type */
interrupt-names = "intr";
......@@ -648,11 +635,11 @@ pcie1: pcie@3400000 {
<0000 0 0 2 &gic 0 0 0 110 4>,
<0000 0 0 3 &gic 0 0 0 111 4>,
<0000 0 0 4 &gic 0 0 0 112 4>;
status = "disabled";
};
pcie2: pcie@3500000 {
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
"snps,dw-pcie";
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
reg-names = "regs", "config";
interrupts = <0 113 0x4>; /* Level high type */
interrupt-names = "intr";
......@@ -669,11 +656,11 @@ pcie2: pcie@3500000 {
<0000 0 0 2 &gic 0 0 0 115 4>,
<0000 0 0 3 &gic 0 0 0 116 4>,
<0000 0 0 4 &gic 0 0 0 117 4>;
status = "disabled";
};
pcie3: pcie@3600000 {
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
"snps,dw-pcie";
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
reg-names = "regs", "config";
interrupts = <0 118 0x4>; /* Level high type */
interrupt-names = "intr";
......@@ -690,11 +677,11 @@ pcie3: pcie@3600000 {
<0000 0 0 2 &gic 0 0 0 120 4>,
<0000 0 0 3 &gic 0 0 0 121 4>,
<0000 0 0 4 &gic 0 0 0 122 4>;
status = "disabled";
};
pcie4: pcie@3700000 {
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
"snps,dw-pcie";
compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie";
reg-names = "regs", "config";
interrupts = <0 123 0x4>; /* Level high type */
interrupt-names = "intr";
......@@ -711,6 +698,7 @@ pcie4: pcie@3700000 {
<0000 0 0 2 &gic 0 0 0 125 4>,
<0000 0 0 3 &gic 0 0 0 126 4>,
<0000 0 0 4 &gic 0 0 0 127 4>;
status = "disabled";
};
sata0: sata@3200000 {
......
arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts 0 → 100644
View file @ 744284fa
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Device Tree file for LX2160AQDS
//
// Copyright 2018 NXP
/dts-v1/;
#include "fsl-lx2160a.dtsi"
/ {
model = "NXP Layerscape LX2160AQDS";
compatible = "fsl,lx2160a-qds", "fsl,lx2160a";
aliases {
crypto = &crypto;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
sb_3v3: regulator-sb3v3 {
compatible = "regulator-fixed";
regulator-name = "MC34717-3.3VSB";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&crypto {
status = "okay";
};
&esdhc0 {
status = "okay";
};
&esdhc1 {
status = "okay";
};
&i2c0 {
status = "okay";
i2c-mux@77 {
compatible = "nxp,pca9547";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
power-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
shunt-resistor = <500>;
};
power-monitor@41 {
compatible = "ti,ina220";
reg = <0x41>;
shunt-resistor = <1000>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
vcc-supply = <&sb_3v3>;
};
temperature-sensor@4d {
compatible = "nxp,sa56004";
reg = <0x4d>;
vcc-supply = <&sb_3v3>;
};
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
};
};
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts 0 → 100644
View file @ 744284fa
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Device Tree file for LX2160ARDB
//
// Copyright 2018 NXP
/dts-v1/;
#include "fsl-lx2160a.dtsi"
/ {
model = "NXP Layerscape LX2160ARDB";
compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
aliases {
crypto = &crypto;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
sb_3v3: regulator-sb3v3 {
compatible = "regulator-fixed";
regulator-name = "MC34717-3.3VSB";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
&crypto {
status = "okay";
};
&esdhc0 {
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
status = "okay";
};
&esdhc1 {
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;
status = "okay";
};
&i2c0 {
status = "okay";
i2c-mux@77 {
compatible = "nxp,pca9547";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2>;
power-monitor@40 {
compatible = "ti,ina220";
reg = <0x40>;
shunt-resistor = <1000>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3>;
temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
vcc-supply = <&sb_3v3>;
};
temperature-sensor@4d {
compatible = "nxp,sa56004";
reg = <0x4d>;
vcc-supply = <&sb_3v3>;
};
};
};
};
&i2c4 {
status = "okay";
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
// IRQ10_B
interrupts = <0 150 0x4>;
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi 0 → 100644
View file @ 744284fa
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