Commit 749f3cbe authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: Use a definition for the userspace cmpxchg emulation syscall
  [ARM] Fix test for unimplemented ARM syscalls
  ARM: 5784/1: fix early boot machine ID mismatch error display
  [ARM] orion5x: update defconfig
  [ARM] Kirkwood: update defconfig
  [ARM] Kirkwood: clarify PCIe MEM bus/physical address distinction
  [ARM] kirkwood: fix PCI I/O port assignment
  [ARM] kirkwood: fix section mismatch
  [ARM] OpenRD base: Initialize PCI express and i2c
  [ARM] properly report mv78100 stepping A1
  ARM: 5780/1: KS8695: Fix macro definition bug in regs-switch.c
  ARM: 5779/1: ep93xx/micro9.c: fix implicit declaration of function __raw_readl and IOMEM
  RealView: Add sparsemem support for the RealView PBX platform
  RealView: Remove duplicated #define REALVIEW_SYS_FLAGS* statements
  RealView: Add default memory configuration
  Check whether the SCU was already initialised
  ARMv7: Check whether the SMP/nAMP mode was already enabled
  [ARM] pxa: fix resume failure by saving/restoring IPRx registers
  [ARM] pxa/palm: fix incorrect initialization of Palm Tungsten C keyboard
  [ARM] pxa/zaurus: fix NAND flash OOB layout for Borzoi
parents 6b46362c 65f69e5c
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...@@ -402,6 +402,15 @@ ...@@ -402,6 +402,15 @@
#define __ARM_NR_usr32 (__ARM_NR_BASE+4) #define __ARM_NR_usr32 (__ARM_NR_BASE+4)
#define __ARM_NR_set_tls (__ARM_NR_BASE+5) #define __ARM_NR_set_tls (__ARM_NR_BASE+5)
/*
* *NOTE*: This is a ghost syscall private to the kernel. Only the
* __kuser_cmpxchg code in entry-armv.S should be aware of its
* existence. Don't ever use this from user code.
*/
#ifdef __KERNEL__
#define __ARM_NR_cmpxchg (__ARM_NR_BASE+0x00fff0)
#endif
/* /*
* The following syscalls are obsolete and no longer available for EABI. * The following syscalls are obsolete and no longer available for EABI.
*/ */
......
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#include <mach/entry-macro.S> #include <mach/entry-macro.S>
#include <asm/thread_notify.h> #include <asm/thread_notify.h>
#include <asm/unwind.h> #include <asm/unwind.h>
#include <asm/unistd.h>
#include "entry-header.S" #include "entry-header.S"
...@@ -908,10 +909,10 @@ __kuser_cmpxchg: @ 0xffff0fc0 ...@@ -908,10 +909,10 @@ __kuser_cmpxchg: @ 0xffff0fc0
* A special ghost syscall is used for that (see traps.c). * A special ghost syscall is used for that (see traps.c).
*/ */
stmfd sp!, {r7, lr} stmfd sp!, {r7, lr}
mov r7, #0xff00 @ 0xfff0 into r7 for EABI ldr r7, =1f @ it's 20 bits
orr r7, r7, #0xf0 swi __ARM_NR_cmpxchg
swi #0x9ffff0
ldmfd sp!, {r7, pc} ldmfd sp!, {r7, pc}
1: .word __ARM_NR_cmpxchg
#elif __LINUX_ARM_ARCH__ < 6 #elif __LINUX_ARM_ARCH__ < 6
......
...@@ -97,7 +97,7 @@ __error_a: ...@@ -97,7 +97,7 @@ __error_a:
bl printhex8 bl printhex8
adr r0, str_a2 adr r0, str_a2
bl printascii bl printascii
adr r3, 3f adr r3, 4f
ldmia r3, {r4, r5, r6} @ get machine desc list ldmia r3, {r4, r5, r6} @ get machine desc list
sub r4, r3, r4 @ get offset between virt&phys sub r4, r3, r4 @ get offset between virt&phys
add r5, r5, r4 @ convert virt addresses to add r5, r5, r4 @ convert virt addresses to
......
...@@ -37,6 +37,10 @@ void __init scu_enable(void __iomem *scu_base) ...@@ -37,6 +37,10 @@ void __init scu_enable(void __iomem *scu_base)
u32 scu_ctrl; u32 scu_ctrl;
scu_ctrl = __raw_readl(scu_base + SCU_CTRL); scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
/* already enabled? */
if (scu_ctrl & 1)
return;
scu_ctrl |= 1; scu_ctrl |= 1;
__raw_writel(scu_ctrl, scu_base + SCU_CTRL); __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
......
...@@ -528,7 +528,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs) ...@@ -528,7 +528,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
* __kuser_cmpxchg code in entry-armv.S should be aware of its * __kuser_cmpxchg code in entry-armv.S should be aware of its
* existence. Don't ever use this from user code. * existence. Don't ever use this from user code.
*/ */
case 0xfff0: case NR(cmpxchg):
for (;;) { for (;;) {
extern void do_DataAbort(unsigned long addr, unsigned int fsr, extern void do_DataAbort(unsigned long addr, unsigned int fsr,
struct pt_regs *regs); struct pt_regs *regs);
...@@ -573,7 +573,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs) ...@@ -573,7 +573,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
if not implemented, rather than raising SIGILL. This if not implemented, rather than raising SIGILL. This
way the calling program can gracefully determine whether way the calling program can gracefully determine whether
a feature is supported. */ a feature is supported. */
if (no <= 0x7ff) if ((no & 0xffff) <= 0x7ff)
return -ENOSYS; return -ENOSYS;
break; break;
} }
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <linux/init.h> #include <linux/init.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/mtd/physmap.h> #include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <mach/hardware.h> #include <mach/hardware.h>
......
...@@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void) ...@@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void)
setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE, setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE); TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE, setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
TARGET_PCIE, ATTR_PCIE_MEM, -1); TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
/* /*
* Setup window for NAND controller. * Setup window for NAND controller.
......
...@@ -845,7 +845,7 @@ int __init kirkwood_find_tclk(void) ...@@ -845,7 +845,7 @@ int __init kirkwood_find_tclk(void)
return 166666667; return 166666667;
} }
static void kirkwood_timer_init(void) static void __init kirkwood_timer_init(void)
{ {
kirkwood_tclk = kirkwood_find_tclk(); kirkwood_tclk = kirkwood_find_tclk();
orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
......
...@@ -15,7 +15,7 @@ ...@@ -15,7 +15,7 @@
static inline void __iomem *__io(unsigned long addr) static inline void __iomem *__io(unsigned long addr)
{ {
return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE) return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)
+ KIRKWOOD_PCIE_IO_VIRT_BASE); + KIRKWOOD_PCIE_IO_VIRT_BASE);
} }
......
...@@ -43,6 +43,7 @@ ...@@ -43,6 +43,7 @@
#define KIRKWOOD_REGS_SIZE SZ_1M #define KIRKWOOD_REGS_SIZE SZ_1M
#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 #define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000
#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000
#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M #define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
/* /*
......
...@@ -70,8 +70,20 @@ static void __init openrd_base_init(void) ...@@ -70,8 +70,20 @@ static void __init openrd_base_init(void)
kirkwood_ge00_init(&openrd_base_ge00_data); kirkwood_ge00_init(&openrd_base_ge00_data);
kirkwood_sata_init(&openrd_base_sata_data); kirkwood_sata_init(&openrd_base_sata_data);
kirkwood_sdio_init(&openrd_base_mvsdio_data); kirkwood_sdio_init(&openrd_base_mvsdio_data);
kirkwood_i2c_init();
} }
static int __init openrd_base_pci_init(void)
{
if (machine_is_openrd_base())
kirkwood_pcie_init();
return 0;
}
subsys_initcall(openrd_base_pci_init);
MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
/* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */
.phys_io = KIRKWOOD_REGS_PHYS_BASE, .phys_io = KIRKWOOD_REGS_PHYS_BASE,
......
...@@ -93,7 +93,7 @@ static struct pci_ops pcie_ops = { ...@@ -93,7 +93,7 @@ static struct pci_ops pcie_ops = {
}; };
static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
{ {
struct resource *res; struct resource *res;
extern unsigned int kirkwood_clk_ctrl; extern unsigned int kirkwood_clk_ctrl;
...@@ -115,7 +115,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) ...@@ -115,7 +115,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
*/ */
res[0].name = "PCIe I/O Space"; res[0].name = "PCIe I/O Space";
res[0].flags = IORESOURCE_IO; res[0].flags = IORESOURCE_IO;
res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE; res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;
res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1; res[0].end = res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
if (request_resource(&ioport_resource, &res[0])) if (request_resource(&ioport_resource, &res[0]))
panic("Request PCIe IO resource failed\n"); panic("Request PCIe IO resource failed\n");
...@@ -126,7 +126,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) ...@@ -126,7 +126,7 @@ static int kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
*/ */
res[1].name = "PCIe Memory Space"; res[1].name = "PCIe Memory Space";
res[1].flags = IORESOURCE_MEM; res[1].flags = IORESOURCE_MEM;
res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE; res[1].start = KIRKWOOD_PCIE_MEM_BUS_BASE;
res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1; res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;
if (request_resource(&iomem_resource, &res[1])) if (request_resource(&iomem_resource, &res[1]))
panic("Request PCIe Memory resource failed\n"); panic("Request PCIe Memory resource failed\n");
......
...@@ -25,7 +25,7 @@ ...@@ -25,7 +25,7 @@
#define KS8695_SEC1 (0x04) /* Switch Engine Control 1 */ #define KS8695_SEC1 (0x04) /* Switch Engine Control 1 */
#define KS8695_SEC2 (0x08) /* Switch Engine Control 2 */ #define KS8695_SEC2 (0x08) /* Switch Engine Control 2 */
#define KS8695_P(x)_C(z) (0xc0 + (((x)-1)*3 + ((z)-1))*4) /* Port Configuration Registers */ #define KS8695_SEPXCZ(x,z) (0x0c + (((x)-1)*3 + ((z)-1))*4) /* Port Configuration Registers */
#define KS8695_SEP12AN (0x48) /* Port 1 & 2 Auto-Negotiation */ #define KS8695_SEP12AN (0x48) /* Port 1 & 2 Auto-Negotiation */
#define KS8695_SEP34AN (0x4c) /* Port 3 & 4 Auto-Negotiation */ #define KS8695_SEP34AN (0x4c) /* Port 3 & 4 Auto-Negotiation */
......
...@@ -845,6 +845,8 @@ static char * __init mv78xx0_id(void) ...@@ -845,6 +845,8 @@ static char * __init mv78xx0_id(void)
} else if (dev == MV78100_DEV_ID) { } else if (dev == MV78100_DEV_ID) {
if (rev == MV78100_REV_A0) if (rev == MV78100_REV_A0)
return "MV78100-A0"; return "MV78100-A0";
else if (rev == MV78100_REV_A1)
return "MV78100-A1";
else else
return "MV78100-Rev-Unsupported"; return "MV78100-Rev-Unsupported";
} else if (dev == MV78200_DEV_ID) { } else if (dev == MV78200_DEV_ID) {
......
...@@ -112,6 +112,7 @@ ...@@ -112,6 +112,7 @@
#define MV78100_DEV_ID 0x7810 #define MV78100_DEV_ID 0x7810
#define MV78100_REV_A0 1 #define MV78100_REV_A0 1
#define MV78100_REV_A1 2
#define MV78200_DEV_ID 0x7820 #define MV78200_DEV_ID 0x7820
#define MV78200_REV_A0 1 #define MV78200_REV_A0 1
......
...@@ -25,6 +25,8 @@ ...@@ -25,6 +25,8 @@
#include "generic.h" #include "generic.h"
#define MAX_INTERNAL_IRQS 128
#define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f)
#define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR)) #define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR))
#define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR)) #define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR))
...@@ -122,6 +124,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) ...@@ -122,6 +124,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
{ {
int irq, i; int irq, i;
BUG_ON(irq_nr > MAX_INTERNAL_IRQS);
pxa_internal_irq_nr = irq_nr; pxa_internal_irq_nr = irq_nr;
for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) { for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) {
...@@ -149,7 +153,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) ...@@ -149,7 +153,8 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
} }
#ifdef CONFIG_PM #ifdef CONFIG_PM
static unsigned long saved_icmr[2]; static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32];
static unsigned long saved_ipr[MAX_INTERNAL_IRQS];
static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
{ {
...@@ -159,6 +164,8 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) ...@@ -159,6 +164,8 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
saved_icmr[i] = _ICMR(irq); saved_icmr[i] = _ICMR(irq);
_ICMR(irq) = 0; _ICMR(irq) = 0;
} }
for (i = 0; i < pxa_internal_irq_nr; i++)
saved_ipr[i] = IPR(i);
return 0; return 0;
} }
...@@ -171,6 +178,8 @@ static int pxa_irq_resume(struct sys_device *dev) ...@@ -171,6 +178,8 @@ static int pxa_irq_resume(struct sys_device *dev)
_ICMR(irq) = saved_icmr[i]; _ICMR(irq) = saved_icmr[i];
_ICLR(irq) = 0; _ICLR(irq) = 0;
} }
for (i = 0; i < pxa_internal_irq_nr; i++)
IPR(i) = saved_ipr[i];
ICCR = 1; ICCR = 1;
return 0; return 0;
......
...@@ -292,10 +292,10 @@ const static unsigned int palmtc_keypad_col_gpios[] = { ...@@ -292,10 +292,10 @@ const static unsigned int palmtc_keypad_col_gpios[] = {
static struct matrix_keypad_platform_data palmtc_keypad_platform_data = { static struct matrix_keypad_platform_data palmtc_keypad_platform_data = {
.keymap_data = &palmtc_keymap_data, .keymap_data = &palmtc_keymap_data,
.col_gpios = palmtc_keypad_row_gpios, .row_gpios = palmtc_keypad_row_gpios,
.num_col_gpios = 12, .num_row_gpios = ARRAY_SIZE(palmtc_keypad_row_gpios),
.row_gpios = palmtc_keypad_col_gpios, .col_gpios = palmtc_keypad_col_gpios,
.num_row_gpios = 4, .num_col_gpios = ARRAY_SIZE(palmtc_keypad_col_gpios),
.active_low = 1, .active_low = 1,
.debounce_ms = 20, .debounce_ms = 20,
......
...@@ -779,11 +779,34 @@ static void __init common_init(void) ...@@ -779,11 +779,34 @@ static void __init common_init(void)
pxa_set_i2c_info(NULL); pxa_set_i2c_info(NULL);
} }
#if defined(CONFIG_MACH_AKITA) || defined(CONFIG_MACH_BORZOI)
static struct nand_bbt_descr sharpsl_akita_bbt = {
.options = 0,
.offs = 4,
.len = 1,
.pattern = scan_ff_pattern
};
static struct nand_ecclayout akita_oobinfo = {
.eccbytes = 24,
.eccpos = {
0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
.oobfree = {{0x08, 0x09}}
};
#endif
#if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI)
static void __init spitz_init(void) static void __init spitz_init(void)
{ {
spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON; spitz_ficp_platform_data.gpio_pwdown = SPITZ_GPIO_IR_ON;
if (machine_is_borzoi()) {
sharpsl_nand_platform_data.badblock_pattern = &sharpsl_akita_bbt;
sharpsl_nand_platform_data.ecc_layout = &akita_oobinfo;
}
platform_scoop_config = &spitz_pcmcia_config; platform_scoop_config = &spitz_pcmcia_config;
common_init(); common_init();
...@@ -808,22 +831,6 @@ static struct i2c_board_info akita_i2c_board_info[] = { ...@@ -808,22 +831,6 @@ static struct i2c_board_info akita_i2c_board_info[] = {
}, },
}; };
static struct nand_bbt_descr sharpsl_akita_bbt = {
.options = 0,
.offs = 4,
.len = 1,
.pattern = scan_ff_pattern
};
static struct nand_ecclayout akita_oobinfo = {
.eccbytes = 24,
.eccpos = {
0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
.oobfree = {{0x08, 0x09}}
};
static void __init akita_init(void) static void __init akita_init(void)
{ {
spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON; spitz_ficp_platform_data.gpio_pwdown = AKITA_GPIO_IR_ON;
......
...@@ -70,6 +70,8 @@ config MACH_REALVIEW_PBX ...@@ -70,6 +70,8 @@ config MACH_REALVIEW_PBX
bool "Support RealView/PBX platform" bool "Support RealView/PBX platform"
select ARM_GIC select ARM_GIC
select HAVE_PATA_PLATFORM select HAVE_PATA_PLATFORM
select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !HIGH_PHYS_OFFSET
select ZONE_DMA if SPARSEMEM
help help
Include support for the ARM(R) RealView PBX platform. Include support for the ARM(R) RealView PBX platform.
...@@ -82,6 +84,7 @@ config REALVIEW_HIGH_PHYS_OFFSET ...@@ -82,6 +84,7 @@ config REALVIEW_HIGH_PHYS_OFFSET
0x70000000, 256MB of which being mirrored at 0x00000000. If 0x70000000, 256MB of which being mirrored at 0x00000000. If
the board supports 512MB of RAM, this option allows the the board supports 512MB of RAM, this option allows the
memory to be accessed contiguously at the high physical memory to be accessed contiguously at the high physical
offset. offset. On the PBX board, disabling this option allows 1GB of
RAM to be used with SPARSEMEM.
endmenu endmenu
...@@ -59,6 +59,25 @@ ...@@ -59,6 +59,25 @@
/* used by entry-macro.S and platsmp.c */ /* used by entry-macro.S and platsmp.c */
void __iomem *gic_cpu_base_addr; void __iomem *gic_cpu_base_addr;
#ifdef CONFIG_ZONE_DMA
/*
* Adjust the zones if there are restrictions for DMA access.
*/
void __init realview_adjust_zones(int node, unsigned long *size,
unsigned long *hole)
{
unsigned long dma_size = SZ_256M >> PAGE_SHIFT;
if (!machine_is_realview_pbx() || node || (size[0] <= dma_size))
return;
size[ZONE_NORMAL] = size[0] - dma_size;
size[ZONE_DMA] = dma_size;
hole[ZONE_NORMAL] = hole[0];
hole[ZONE_DMA] = 0;
}
#endif
/* /*
* This is the RealView sched_clock implementation. This has * This is the RealView sched_clock implementation. This has
* a resolution of 41.7ns, and a maximum value of about 179s. * a resolution of 41.7ns, and a maximum value of about 179s.
...@@ -543,7 +562,7 @@ static int realview_clcd_setup(struct clcd_fb *fb) ...@@ -543,7 +562,7 @@ static int realview_clcd_setup(struct clcd_fb *fb)
fb->panel = realview_clcd_panel(); fb->panel = realview_clcd_panel();
fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
&dma, GFP_KERNEL); &dma, GFP_KERNEL | GFP_DMA);
if (!fb->fb.screen_base) { if (!fb->fb.screen_base) {
printk(KERN_ERR "CLCD: unable to map framebuffer\n"); printk(KERN_ERR "CLCD: unable to map framebuffer\n");
return -ENOMEM; return -ENOMEM;
...@@ -788,3 +807,24 @@ void __init realview_timer_init(unsigned int timer_irq) ...@@ -788,3 +807,24 @@ void __init realview_timer_init(unsigned int timer_irq)
realview_clocksource_init(); realview_clocksource_init();
realview_clockevents_init(timer_irq); realview_clockevents_init(timer_irq);
} }
/*
* Setup the memory banks.
*/
void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
struct meminfo *meminfo)
{
/*
* Most RealView platforms have 512MB contiguous RAM at 0x70000000.
* Half of this is mirrored at 0.
*/
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
meminfo->bank[0].start = 0x70000000;
meminfo->bank[0].size = SZ_512M;
meminfo->nr_banks = 1;
#else
meminfo->bank[0].start = 0;
meminfo->bank[0].size = SZ_256M;
meminfo->nr_banks = 1;
#endif
}
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
#include <linux/amba/bus.h> #include <linux/amba/bus.h>
#include <linux/io.h> #include <linux/io.h>
#include <asm/setup.h>
#include <asm/leds.h> #include <asm/leds.h>
#define AMBA_DEVICE(name,busid,base,plat) \ #define AMBA_DEVICE(name,busid,base,plat) \
...@@ -44,6 +45,8 @@ static struct amba_device name##_device = { \ ...@@ -44,6 +45,8 @@ static struct amba_device name##_device = { \
/* .dma = base##_DMA,*/ \ /* .dma = base##_DMA,*/ \
} }
struct machine_desc;
extern struct platform_device realview_flash_device; extern struct platform_device realview_flash_device;
extern struct platform_device realview_cf_device; extern struct platform_device realview_cf_device;
extern struct platform_device realview_i2c_device; extern struct platform_device realview_i2c_device;
...@@ -61,5 +64,8 @@ extern void realview_timer_init(unsigned int timer_irq); ...@@ -61,5 +64,8 @@ extern void realview_timer_init(unsigned int timer_irq);
extern int realview_flash_register(struct resource *res, u32 num); extern int realview_flash_register(struct resource *res, u32 num);
extern int realview_eth_register(const char *name, struct resource *res); extern int realview_eth_register(const char *name, struct resource *res);
extern int realview_usb_register(struct resource *res); extern int realview_usb_register(struct resource *res);
extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags,
char **from, struct meminfo *meminfo);
extern void (*realview_reset)(char); extern void (*realview_reset)(char);
#endif #endif
...@@ -29,4 +29,53 @@ ...@@ -29,4 +29,53 @@
#define PHYS_OFFSET UL(0x00000000) #define PHYS_OFFSET UL(0x00000000)
#endif #endif
#if !defined(__ASSEMBLY__) && defined(CONFIG_ZONE_DMA)
extern void realview_adjust_zones(int node, unsigned long *size,
unsigned long *hole);
#define arch_adjust_zones(node, size, hole) \
realview_adjust_zones(node, size, hole)
#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_256M - 1)
#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_256M)
#endif
#ifdef CONFIG_SPARSEMEM
/*
* Sparsemem definitions for RealView PBX.
*
* The RealView PBX board has another block of 512MB of RAM at 0x20000000,
* however only the block at 0x70000000 (or the 256MB mirror at 0x00000000)
* may be used for DMA.
*
* The macros below define a section size of 256MB and a non-linear virtual to
* physical mapping:
*
* 256MB @ 0x00000000 -> PAGE_OFFSET
* 512MB @ 0x20000000 -> PAGE_OFFSET + 0x10000000
* 256MB @ 0x80000000 -> PAGE_OFFSET + 0x30000000
*/
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
#error "SPARSEMEM not available with REALVIEW_HIGH_PHYS_OFFSET"
#endif
#define MAX_PHYSMEM_BITS 32
#define SECTION_SIZE_BITS 28
/* bank page offsets */
#define PAGE_OFFSET1 (PAGE_OFFSET + 0x10000000)
#define PAGE_OFFSET2 (PAGE_OFFSET + 0x30000000)
#define __phys_to_virt(phys) \
((phys) >= 0x80000000 ? (phys) - 0x80000000 + PAGE_OFFSET2 : \
(phys) >= 0x20000000 ? (phys) - 0x20000000 + PAGE_OFFSET1 : \
(phys) + PAGE_OFFSET)
#define __virt_to_phys(virt) \
((virt) >= PAGE_OFFSET2 ? (virt) - PAGE_OFFSET2 + 0x80000000 : \
(virt) >= PAGE_OFFSET1 ? (virt) - PAGE_OFFSET1 + 0x20000000 : \
(virt) - PAGE_OFFSET)
#endif /* CONFIG_SPARSEMEM */
#endif #endif
...@@ -146,11 +146,8 @@ static void __init poke_milo(void) ...@@ -146,11 +146,8 @@ static void __init poke_milo(void)
* register. The BootMonitor waits for this register to become * register. The BootMonitor waits for this register to become
* non-zero. * non-zero.
*/ */
#define REALVIEW_SYS_FLAGSS_OFFSET 0x30
#define REALVIEW_SYS_FLAGSC_OFFSET 0x34
__raw_writel(BSYM(virt_to_phys(realview_secondary_startup)), __raw_writel(BSYM(virt_to_phys(realview_secondary_startup)),
__io_address(REALVIEW_SYS_BASE) + __io_address(REALVIEW_SYS_FLAGSSET));
REALVIEW_SYS_FLAGSS_OFFSET);
mb(); mb();
} }
......
...@@ -415,6 +415,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB") ...@@ -415,6 +415,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
.phys_io = REALVIEW_EB_UART0_BASE, .phys_io = REALVIEW_EB_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_fixup,
.map_io = realview_eb_map_io, .map_io = realview_eb_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_eb_timer, .timer = &realview_eb_timer,
......
...@@ -300,6 +300,18 @@ static void realview_pb1176_reset(char mode) ...@@ -300,6 +300,18 @@ static void realview_pb1176_reset(char mode)
__raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl); __raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl);
} }
static void realview_pb1176_fixup(struct machine_desc *mdesc,
struct tag *tags, char **from,
struct meminfo *meminfo)
{
/*
* RealView PB1176 only has 128MB of RAM mapped at 0.
*/
meminfo->bank[0].start = 0;
meminfo->bank[0].size = SZ_128M;
meminfo->nr_banks = 1;
}
static void __init realview_pb1176_init(void) static void __init realview_pb1176_init(void)
{ {
int i; int i;
...@@ -331,6 +343,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") ...@@ -331,6 +343,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
.phys_io = REALVIEW_PB1176_UART0_BASE, .phys_io = REALVIEW_PB1176_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_PB1176_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_pb1176_fixup,
.map_io = realview_pb1176_map_io, .map_io = realview_pb1176_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_pb1176_timer, .timer = &realview_pb1176_timer,
......
...@@ -347,6 +347,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") ...@@ -347,6 +347,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
.phys_io = REALVIEW_PB11MP_UART0_BASE, .phys_io = REALVIEW_PB11MP_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_fixup,
.map_io = realview_pb11mp_map_io, .map_io = realview_pb11mp_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_pb11mp_timer, .timer = &realview_pb11mp_timer,
......
...@@ -298,6 +298,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") ...@@ -298,6 +298,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
.phys_io = REALVIEW_PBA8_UART0_BASE, .phys_io = REALVIEW_PBA8_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_fixup,
.map_io = realview_pba8_map_io, .map_io = realview_pba8_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_pba8_timer, .timer = &realview_pba8_timer,
......
...@@ -304,6 +304,26 @@ static struct sys_timer realview_pbx_timer = { ...@@ -304,6 +304,26 @@ static struct sys_timer realview_pbx_timer = {
.init = realview_pbx_timer_init, .init = realview_pbx_timer_init,
}; };
static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags,
char **from, struct meminfo *meminfo)
{
#ifdef CONFIG_SPARSEMEM
/*
* Memory configuration with SPARSEMEM enabled on RealView PBX (see
* asm/mach/memory.h for more information).
*/
meminfo->bank[0].start = 0;
meminfo->bank[0].size = SZ_256M;
meminfo->bank[1].start = 0x20000000;
meminfo->bank[1].size = SZ_512M;
meminfo->bank[2].start = 0x80000000;
meminfo->bank[2].size = SZ_256M;
meminfo->nr_banks = 3;
#else
realview_fixup(mdesc, tags, from, meminfo);
#endif
}
static void __init realview_pbx_init(void) static void __init realview_pbx_init(void)
{ {
int i; int i;
...@@ -345,6 +365,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") ...@@ -345,6 +365,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
.phys_io = REALVIEW_PBX_UART0_BASE, .phys_io = REALVIEW_PBX_UART0_BASE,
.io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc, .io_pg_offst = (IO_ADDRESS(REALVIEW_PBX_UART0_BASE) >> 18) & 0xfffc,
.boot_params = PHYS_OFFSET + 0x00000100, .boot_params = PHYS_OFFSET + 0x00000100,
.fixup = realview_pbx_fixup,
.map_io = realview_pbx_map_io, .map_io = realview_pbx_map_io,
.init_irq = gic_init_irq, .init_irq = gic_init_irq,
.timer = &realview_pbx_timer, .timer = &realview_pbx_timer,
......
...@@ -186,9 +186,10 @@ cpu_v7_name: ...@@ -186,9 +186,10 @@ cpu_v7_name:
*/ */
__v7_setup: __v7_setup:
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode and mrc p15, 0, r0, c1, c0, 1
orr r0, r0, #(1 << 6) | (1 << 0) @ TLB ops broadcasting tst r0, #(1 << 6) @ SMP/nAMP mode enabled?
mcr p15, 0, r0, c1, c0, 1 orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and
mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting
#endif #endif
adr r12, __v7_setup_stack @ the local stack adr r12, __v7_setup_stack @ the local stack
stmia r12, {r0-r5, r7, r9, r11, lr} stmia r12, {r0-r5, r7, r9, r11, lr}
......
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