Commit 74ad3d28 authored by Babu Moger's avatar Babu Moger Committed by Helge Deller

parisc: Define CONFIG_CPU_BIG_ENDIAN

While working on enabling queued rwlock on SPARC, found this following
code in include/asm-generic/qrwlock.h which uses CONFIG_CPU_BIG_ENDIAN
to clear a byte.

static inline u8 *__qrwlock_write_byte(struct qrwlock *lock)
 {
	return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN);
 }

Problem is many of the fixed big endian architectures don't define
CPU_BIG_ENDIAN and clears the wrong byte.

Define CPU_BIG_ENDIAN for parisc architecture to fix it.
Signed-off-by: default avatarBabu Moger <babu.moger@oracle.com>
Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent 93964fd4
...@@ -47,6 +47,9 @@ config PARISC ...@@ -47,6 +47,9 @@ config PARISC
and later HP3000 series). The PA-RISC Linux project home page is and later HP3000 series). The PA-RISC Linux project home page is
at <http://www.parisc-linux.org/>. at <http://www.parisc-linux.org/>.
config CPU_BIG_ENDIAN
def_bool y
config MMU config MMU
def_bool y def_bool y
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment