ARM: 5966/1: at91_udc HW glitch

Add some delay to avoid reading CSR TXCOUNT too early after
updating it.

For more info about this HW glitch see:
http://lists.arm.linux.org.uk/lurker/message/20090325.150843.f515c02f.en.html
http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20100129/10ba0f8b/attachment.el
http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20100203/09cdb3b4/attachment.el
http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20100203/08b5b249/attachment.el

First applied: "Fix soft lockup in at91 udc driver"
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=5965Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee>
Signed-off-by: Harro Haan <hrhaan@gmail.com>
Acked-by: Remy Bohmer <linux@bohmer.net>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

drivers/usb/gadget/at91_udc.c

@@ -366,6 +366,13 @@ static int read_fifo (struct at91_ep *ep, struct at91_request *req)
 	if (is_done)
 		done(ep, req, 0);
 	else if (ep->is_pingpong) {
+		/*
+		 * One dummy read to delay the code because of a HW glitch:
+		 * CSR returns bad RXCOUNT when read too soon after updating
+		 * RX_DATA_BK flags.
+		 */
+		csr = __raw_readl(creg);
+
 		bufferspace -= count;
 		buf += count;
 		goto rescan;