Commit 776100a4 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Mark Brown

ASoC: SOF: Intel: hda: reduce verbosity of boot error logs

Previous commits reduced the verbosity of errors during boot
iterations, but there are still a couple remaining which generate
false positives. Errors should only be logged when after last attempt
to download firmware failed.

Duplicating logs and assigning them different levels based on the
iteration number isn't really elegant, use macro as suggested by
Guennadi.
Suggested-by: default avatarGuennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: default avatarGuennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: default avatarKai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20200917105633.2579047-9-kai.vehmanen@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0e4ea878
......@@ -82,7 +82,7 @@ static struct hdac_ext_stream *cl_stream_prepare(struct snd_sof_dev *sdev, unsig
* status on core 1, so power up core 1 also momentarily, keep it in
* reset/stall and then turn it off
*/
static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag)
{
struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
const struct sof_intel_dsp_desc *chip = hda->desc;
......@@ -93,7 +93,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
/* step 1: power up corex */
ret = hda_dsp_core_power_up(sdev, chip->host_managed_cores_mask);
if (ret < 0) {
if (iteration == HDA_FW_BOOT_ATTEMPTS)
if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)
dev_err(sdev->dev, "error: dsp core 0/1 power up failed\n");
goto err;
}
......@@ -116,7 +116,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
/* step 3: unset core 0 reset state & unstall/run core 0 */
ret = hda_dsp_core_run(sdev, BIT(0));
if (ret < 0) {
if (iteration == HDA_FW_BOOT_ATTEMPTS)
if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)
dev_err(sdev->dev,
"error: dsp core start failed %d\n", ret);
ret = -EIO;
......@@ -132,7 +132,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
HDA_DSP_INIT_TIMEOUT_US);
if (ret < 0) {
if (iteration == HDA_FW_BOOT_ATTEMPTS)
if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)
dev_err(sdev->dev,
"error: %s: timeout for HIPCIE done\n",
__func__);
......@@ -148,7 +148,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
/* step 5: power down corex */
ret = hda_dsp_core_power_down(sdev, chip->host_managed_cores_mask & ~(BIT(0)));
if (ret < 0) {
if (iteration == HDA_FW_BOOT_ATTEMPTS)
if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)
dev_err(sdev->dev,
"error: dsp core x power down failed\n");
goto err;
......@@ -168,7 +168,7 @@ static int cl_dsp_init(struct snd_sof_dev *sdev, int stream_tag, int iteration)
if (!ret)
return 0;
if (iteration == HDA_FW_BOOT_ATTEMPTS)
if (hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS)
dev_err(sdev->dev,
"error: %s: timeout HDA_DSP_SRAM_REG_ROM_STATUS read\n",
__func__);
......@@ -328,6 +328,7 @@ int hda_dsp_cl_boot_firmware_iccmax(struct snd_sof_dev *sdev)
int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev)
{
struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
struct snd_sof_pdata *plat_data = sdev->pdata;
const struct sof_dev_desc *desc = plat_data->desc;
const struct sof_intel_dsp_desc *chip_info;
......@@ -364,7 +365,8 @@ int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev)
dev_dbg(sdev->dev,
"Attempting iteration %d of Core En/ROM load...\n", i);
ret = cl_dsp_init(sdev, stream->hstream.stream_tag, i + 1);
hda->boot_iteration = i + 1;
ret = cl_dsp_init(sdev, stream->hstream.stream_tag);
/* don't retry anymore if successful */
if (!ret)
......
......@@ -418,6 +418,7 @@ void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
/* dump the first 8 dwords representing the extended ROM status */
static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev)
{
struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
char msg[128];
int len = 0;
u32 value;
......@@ -428,11 +429,14 @@ static void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev)
len += snprintf(msg + len, sizeof(msg) - len, " 0x%x", value);
}
dev_err(sdev->dev, "error: extended rom status:%s", msg);
sof_dev_dbg_or_err(sdev->dev, hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS,
"extended rom status: %s", msg);
}
void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
{
struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
struct sof_ipc_dsp_oops_xtensa xoops;
struct sof_ipc_panic_info panic_info;
u32 stack[HDA_DSP_STACK_DUMP_SIZE];
......@@ -452,8 +456,10 @@ void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
stack, HDA_DSP_STACK_DUMP_SIZE);
} else {
dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
status, panic);
sof_dev_dbg_or_err(sdev->dev, hda->boot_iteration == HDA_FW_BOOT_ATTEMPTS,
"status = 0x%8.8x panic = 0x%8.8x\n",
status, panic);
hda_dsp_dump_ext_rom_status(sdev);
hda_dsp_get_status(sdev);
}
......
......@@ -274,6 +274,7 @@
#define BXT_D0I3_DELAY 5000
#define FW_CL_STREAM_NUMBER 0x1
#define HDA_FW_BOOT_ATTEMPTS 3
/* ADSPCS - Audio DSP Control & Status */
......@@ -416,6 +417,7 @@ enum sof_hda_D0_substate {
/* represents DSP HDA controller frontend - i.e. host facing control */
struct sof_intel_hda_dev {
int boot_iteration;
struct hda_bus hbus;
......
......@@ -578,4 +578,12 @@ int intel_pcm_close(struct snd_sof_dev *sdev,
int sof_machine_check(struct snd_sof_dev *sdev);
#define sof_dev_dbg_or_err(dev, is_err, fmt, ...) \
do { \
if (is_err) \
dev_err(dev, "error: " fmt, __VA_ARGS__); \
else \
dev_dbg(dev, fmt, __VA_ARGS__); \
} while (0)
#endif
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