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Commit 78036939 authored by Mark Brown's avatar Mark Brown
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ASoC: codecs: wsa88xx and wcd93xx: Soundwire port 

Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>:

Few cleanups to make the code more robust or readable.  No functional
impact (compiled objects stay the same).
parents d0296adb a9d843e6
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Showing with 88 additions and 92 deletions
sound/soc/codecs/wcd937x.h
View file @ 78036939
......@@ -484,10 +484,25 @@
#define WCD937X_MAX_MICBIAS 3
#define WCD937X_MAX_BULK_SUPPLY 4
#define WCD937X_MAX_TX_SWR_PORTS 4
#define WCD937X_MAX_SWR_PORTS 5
#define WCD937X_MAX_SWR_CH_IDS 15
enum wcd937x_tx_sdw_ports {
WCD937X_ADC_1_PORT = 1,
WCD937X_ADC_2_3_PORT,
WCD937X_DMIC_0_3_MBHC_PORT,
WCD937X_DMIC_4_6_PORT,
WCD937X_MAX_TX_SWR_PORTS = WCD937X_DMIC_4_6_PORT,
};
enum wcd937x_rx_sdw_ports {
WCD937X_HPH_PORT = 1,
WCD937X_CLSH_PORT,
WCD937X_COMP_PORT,
WCD937X_LO_PORT,
WCD937X_DSD_PORT,
WCD937X_MAX_SWR_PORTS = WCD937X_DSD_PORT,
};
struct wcd937x_sdw_ch_info {
int port_num;
unsigned int ch_mask;
......@@ -581,13 +596,6 @@ enum {
WCD937X_NUM_IRQS,
};
enum wcd937x_tx_sdw_ports {
WCD937X_ADC_1_PORT = 1,
WCD937X_ADC_2_3_PORT,
WCD937X_DMIC_0_3_MBHC_PORT,
WCD937X_DMIC_4_6_PORT,
};
enum wcd937x_tx_sdw_channels {
WCD937X_ADC1,
WCD937X_ADC2,
......@@ -602,14 +610,6 @@ enum wcd937x_tx_sdw_channels {
WCD937X_DMIC6,
};
enum wcd937x_rx_sdw_ports {
WCD937X_HPH_PORT = 1,
WCD937X_CLSH_PORT,
WCD937X_COMP_PORT,
WCD937X_LO_PORT,
WCD937X_DSD_PORT,
};
enum wcd937x_rx_sdw_channels {
WCD937X_HPH_L,
WCD937X_HPH_R,
......
sound/soc/codecs/wcd938x.c
View file @ 78036939
......@@ -29,7 +29,6 @@
#define WCD938X_MAX_SUPPLY (4)
#define WCD938X_MBHC_MAX_BUTTONS (8)
#define TX_ADC_MAX (4)
#define WCD938X_TX_MAX_SWR_PORTS (5)
#define WCD938X_RATES_MASK (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
......@@ -39,8 +38,6 @@
SNDRV_PCM_RATE_176400)
#define WCD938X_FORMATS_S16_S24_LE (SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S24_LE)
/* Convert from vout ctl to micbias voltage in mV */
#define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
#define SWR_CLK_RATE_0P6MHZ (600000)
#define SWR_CLK_RATE_1P2MHZ (1200000)
#define SWR_CLK_RATE_2P4MHZ (2400000)
......@@ -48,8 +45,6 @@
#define SWR_CLK_RATE_9P6MHZ (9600000)
#define SWR_CLK_RATE_11P2896MHZ (1128960)
#define WCD938X_DRV_NAME "wcd938x_codec"
#define WCD938X_VERSION_1_0 (1)
#define EAR_RX_PATH_AUX (1)
#define ADC_MODE_VAL_HIFI 0x01
......@@ -72,7 +67,6 @@
/* Z value compared in milliOhm */
#define WCD938X_MBHC_IS_SECOND_RAMP_REQUIRED(z) ((z > 400000) || (z < 32000))
#define WCD938X_MBHC_ZDET_CONST (86 * 16384)
#define WCD938X_MBHC_MOISTURE_RREF R_24_KOHM
#define WCD_MBHC_HS_V_MAX 1600
#define WCD938X_EAR_PA_GAIN_TLV(xname, reg, shift, max, invert, tlv_array) \
......@@ -89,18 +83,6 @@ enum {
WCD9385 = 5,
};
enum {
TX_HDR12 = 0,
TX_HDR34,
TX_HDR_MAX,
};
enum {
WCD_RX1,
WCD_RX2,
WCD_RX3
};
enum {
/* INTR_CTRL_INT_MASK_0 */
WCD938X_IRQ_MBHC_BUTTON_PRESS_DET = 0,
......
sound/soc/codecs/wcd938x.h
View file @ 78036939
......@@ -585,8 +585,6 @@
#define WCD938X_DIGITAL_DEM_BYPASS_DATA3 (0x34D8)
#define WCD938X_MAX_REGISTER (WCD938X_DIGITAL_DEM_BYPASS_DATA3)
#define WCD938X_MAX_SWR_PORTS 5
#define WCD938X_MAX_TX_SWR_PORTS 4
#define WCD938X_MAX_SWR_CH_IDS 15
struct wcd938x_sdw_ch_info {
......@@ -606,6 +604,7 @@ enum wcd938x_tx_sdw_ports {
/* DMIC0_0, DMIC0_1, DMIC1_0, DMIC1_1 */
WCD938X_DMIC_0_3_MBHC_PORT,
WCD938X_DMIC_4_7_PORT,
WCD938X_MAX_TX_SWR_PORTS = WCD938X_DMIC_4_7_PORT,
};
enum wcd938x_tx_sdw_channels {
......@@ -630,6 +629,7 @@ enum wcd938x_rx_sdw_ports {
WCD938X_COMP_PORT,
WCD938X_LO_PORT,
WCD938X_DSD_PORT,
WCD938X_MAX_SWR_PORTS = WCD938X_DSD_PORT,
};
enum wcd938x_rx_sdw_channels {
......
sound/soc/codecs/wcd939x.h
View file @ 78036939
......@@ -842,9 +842,6 @@
#define WCD939X_DSD_HPHR_CFG5 (0x35a6)
#define WCD939X_MAX_REGISTER (WCD939X_DSD_HPHR_CFG5)
#define WCD939X_MAX_SWR_PORTS (6)
#define WCD939X_MAX_RX_SWR_PORTS (6)
#define WCD939X_MAX_TX_SWR_PORTS (4)
#define WCD939X_MAX_SWR_CH_IDS (15)
struct wcd939x_sdw_ch_info {
......@@ -863,6 +860,7 @@ enum wcd939x_tx_sdw_ports {
WCD939X_ADC_DMIC_1_2_PORT,
WCD939X_DMIC_0_3_MBHC_PORT,
WCD939X_DMIC_3_7_PORT,
WCD939X_MAX_TX_SWR_PORTS = WCD939X_DMIC_3_7_PORT,
};
enum wcd939x_tx_sdw_channels {
......@@ -888,6 +886,8 @@ enum wcd939x_rx_sdw_ports {
WCD939X_LO_PORT,
WCD939X_DSD_PORT,
WCD939X_HIFI_PCM_PORT,
WCD939X_MAX_RX_SWR_PORTS = WCD939X_HIFI_PCM_PORT,
WCD939X_MAX_SWR_PORTS = WCD939X_MAX_RX_SWR_PORTS,
};
enum wcd939x_rx_sdw_channels {
......
sound/soc/codecs/wsa881x.c
View file @ 78036939
......@@ -386,33 +386,32 @@ enum wsa_port_ids {
/* 4 ports */
static struct sdw_dpn_prop wsa_sink_dpn_prop[WSA881X_MAX_SWR_PORTS] = {
{
/* DAC */
.num = 1,
[WSA881X_PORT_DAC] = {
.num = WSA881X_PORT_DAC + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
/* COMP */
.num = 2,
},
[WSA881X_PORT_COMP] = {
.num = WSA881X_PORT_COMP + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
/* BOOST */
.num = 3,
},
[WSA881X_PORT_BOOST] = {
.num = WSA881X_PORT_BOOST + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
/* VISENSE */
.num = 4,
},
[WSA881X_PORT_VISENSE] = {
.num = WSA881X_PORT_VISENSE + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
......@@ -422,17 +421,20 @@ static struct sdw_dpn_prop wsa_sink_dpn_prop[WSA881X_MAX_SWR_PORTS] = {
};
static const struct sdw_port_config wsa881x_pconfig[WSA881X_MAX_SWR_PORTS] = {
{
.num = 1,
[WSA881X_PORT_DAC] = {
.num = WSA881X_PORT_DAC + 1,
.ch_mask = 0x1,
}, {
.num = 2,
},
[WSA881X_PORT_COMP] = {
.num = WSA881X_PORT_COMP + 1,
.ch_mask = 0xf,
}, {
.num = 3,
},
[WSA881X_PORT_BOOST] = {
.num = WSA881X_PORT_BOOST + 1,
.ch_mask = 0x3,
}, { /* IV feedback */
.num = 4,
},
[WSA881X_PORT_VISENSE] = {
.num = WSA881X_PORT_VISENSE + 1,
.ch_mask = 0x3,
},
};
......
sound/soc/codecs/wsa883x.c
View file @ 78036939
......@@ -480,33 +480,32 @@ static const struct soc_enum wsa_dev_mode_enum =
/* 4 ports */
static struct sdw_dpn_prop wsa_sink_dpn_prop[WSA883X_MAX_SWR_PORTS] = {
{
/* DAC */
.num = 1,
[WSA883X_PORT_DAC] = {
.num = WSA883X_PORT_DAC + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
/* COMP */
.num = 2,
},
[WSA883X_PORT_COMP] = {
.num = WSA883X_PORT_COMP + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
/* BOOST */
.num = 3,
},
[WSA883X_PORT_BOOST] = {
.num = WSA883X_PORT_BOOST + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
/* VISENSE */
.num = 4,
},
[WSA883X_PORT_VISENSE] = {
.num = WSA883X_PORT_VISENSE + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
......@@ -516,17 +515,20 @@ static struct sdw_dpn_prop wsa_sink_dpn_prop[WSA883X_MAX_SWR_PORTS] = {
};
static const struct sdw_port_config wsa883x_pconfig[WSA883X_MAX_SWR_PORTS] = {
{
.num = 1,
[WSA883X_PORT_DAC] = {
.num = WSA883X_PORT_DAC + 1,
.ch_mask = 0x1,
}, {
.num = 2,
},
[WSA883X_PORT_COMP] = {
.num = WSA883X_PORT_COMP + 1,
.ch_mask = 0xf,
}, {
.num = 3,
},
[WSA883X_PORT_BOOST] = {
.num = WSA883X_PORT_BOOST + 1,
.ch_mask = 0x3,
}, { /* IV feedback */
.num = 4,
},
[WSA883X_PORT_VISENSE] = {
.num = WSA883X_PORT_VISENSE + 1,
.ch_mask = 0x3,
},
};
......
sound/soc/codecs/wsa884x.c
View file @ 78036939
......@@ -781,42 +781,47 @@ static const struct soc_enum wsa884x_dev_mode_enum =
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa884x_dev_mode_text), wsa884x_dev_mode_text);
static struct sdw_dpn_prop wsa884x_sink_dpn_prop[WSA884X_MAX_SWR_PORTS] = {
{
[WSA884X_PORT_DAC] = {
.num = WSA884X_PORT_DAC + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
},
[WSA884X_PORT_COMP] = {
.num = WSA884X_PORT_COMP + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
},
[WSA884X_PORT_BOOST] = {
.num = WSA884X_PORT_BOOST + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
},
[WSA884X_PORT_PBR] = {
.num = WSA884X_PORT_PBR + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
},
[WSA884X_PORT_VISENSE] = {
.num = WSA884X_PORT_VISENSE + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
.max_ch = 1,
.simple_ch_prep_sm = true,
.read_only_wordlength = true,
}, {
},
[WSA884X_PORT_CPS] = {
.num = WSA884X_PORT_CPS + 1,
.type = SDW_DPN_SIMPLE,
.min_ch = 1,
......@@ -827,22 +832,27 @@ static struct sdw_dpn_prop wsa884x_sink_dpn_prop[WSA884X_MAX_SWR_PORTS] = {
};
static const struct sdw_port_config wsa884x_pconfig[WSA884X_MAX_SWR_PORTS] = {
{
[WSA884X_PORT_DAC] = {
.num = WSA884X_PORT_DAC + 1,
.ch_mask = 0x1,
}, {
},
[WSA884X_PORT_COMP] = {
.num = WSA884X_PORT_COMP + 1,
.ch_mask = 0xf,
}, {
},
[WSA884X_PORT_BOOST] = {
.num = WSA884X_PORT_BOOST + 1,
.ch_mask = 0x3,
}, {
},
[WSA884X_PORT_PBR] = {
.num = WSA884X_PORT_PBR + 1,
.ch_mask = 0x1,
}, {
},
[WSA884X_PORT_VISENSE] = {
.num = WSA884X_PORT_VISENSE + 1,
.ch_mask = 0x3,
}, {
},
[WSA884X_PORT_CPS] = {
.num = WSA884X_PORT_CPS + 1,
.ch_mask = 0x3,
},
......
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