Commit 7991585b authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher

drm/amd/display: Modify HPO pixel clock programming to support DPM

Need to select DTBCLK and DPREFCLK as DTBCLK_p source according to
hardware guidance.
Reviewed-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarDillon Varone <dillon.varone@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bea00fab
......@@ -1082,11 +1082,11 @@ static bool dcn401_program_pix_clk(
// all but TMDS gets Driver to program DP_DTO without calling VBIOS Command table
if (!dc_is_tmds_signal(pix_clk_params->signal_type)) {
long long ref_dtbclk_khz = clock_source->ctx->dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(clock_source->ctx->dc->clk_mgr);
long long dprefclk_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;
long long dtbclk_p_src_clk_khz;
/* if signal is DP132B128B dtbclk_p_src is DTBCLK else DPREFCLK */
dtbclk_p_src_clk_khz = encoding == DP_128b_132b_ENCODING ? ref_dtbclk_khz : dprefclk_khz;
dtbclk_p_src_clk_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz;
dto_params.clk_src = DPREFCLK;
if (e) {
dto_params.pixclk_hz = e->target_pixel_rate_khz * e->mult_factor;
dto_params.refclk_hz = dtbclk_p_src_clk_khz * e->div_factor;
......
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