Commit 7999d8d7 authored by Russell King's avatar Russell King Committed by Russell King

[ARM] Remove RETINSTR macro

RETINSTR is a left-over from the days when we had 26-bit and
32-bit CPU support integrated into the same tree.  Since this
is no longer the case, we can now remove RETINSTR.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent dfd8317d
...@@ -340,7 +340,7 @@ sys_mmap2: ...@@ -340,7 +340,7 @@ sys_mmap2:
streq r5, [sp, #4] streq r5, [sp, #4]
beq do_mmap2 beq do_mmap2
mov r0, #-EINVAL mov r0, #-EINVAL
RETINSTR(mov,pc, lr) mov pc, lr
#else #else
str r5, [sp, #4] str r5, [sp, #4]
b do_mmap2 b do_mmap2
......
...@@ -31,7 +31,7 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 ...@@ -31,7 +31,7 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
mov r2, r2, lsr #10 @ max = 0x00007fff mov r2, r2, lsr #10 @ max = 0x00007fff
mul r0, r2, r0 @ max = 2^32-1 mul r0, r2, r0 @ max = 2^32-1
movs r0, r0, lsr #6 movs r0, r0, lsr #6
RETINSTR(moveq,pc,lr) moveq pc, lr
/* /*
* loops = r0 * HZ * loops_per_jiffy / 1000000 * loops = r0 * HZ * loops_per_jiffy / 1000000
...@@ -43,20 +43,20 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 ...@@ -43,20 +43,20 @@ ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06
ENTRY(__delay) ENTRY(__delay)
subs r0, r0, #1 subs r0, r0, #1
#if 0 #if 0
RETINSTR(movls,pc,lr) movls pc, lr
subs r0, r0, #1 subs r0, r0, #1
RETINSTR(movls,pc,lr) movls pc, lr
subs r0, r0, #1 subs r0, r0, #1
RETINSTR(movls,pc,lr) movls pc, lr
subs r0, r0, #1 subs r0, r0, #1
RETINSTR(movls,pc,lr) movls pc, lr
subs r0, r0, #1 subs r0, r0, #1
RETINSTR(movls,pc,lr) movls pc, lr
subs r0, r0, #1 subs r0, r0, #1
RETINSTR(movls,pc,lr) movls pc, lr
subs r0, r0, #1 subs r0, r0, #1
RETINSTR(movls,pc,lr) movls pc, lr
subs r0, r0, #1 subs r0, r0, #1
#endif #endif
bhi __delay bhi __delay
RETINSTR(mov,pc,lr) mov pc, lr
...@@ -32,7 +32,7 @@ ENTRY(_find_first_zero_bit_le) ...@@ -32,7 +32,7 @@ ENTRY(_find_first_zero_bit_le)
2: cmp r2, r1 @ any more? 2: cmp r2, r1 @ any more?
blo 1b blo 1b
3: mov r0, r1 @ no free bits 3: mov r0, r1 @ no free bits
RETINSTR(mov,pc,lr) mov pc, lr
/* /*
* Purpose : Find next 'zero' bit * Purpose : Find next 'zero' bit
...@@ -66,7 +66,7 @@ ENTRY(_find_first_bit_le) ...@@ -66,7 +66,7 @@ ENTRY(_find_first_bit_le)
2: cmp r2, r1 @ any more? 2: cmp r2, r1 @ any more?
blo 1b blo 1b
3: mov r0, r1 @ no free bits 3: mov r0, r1 @ no free bits
RETINSTR(mov,pc,lr) mov pc, lr
/* /*
* Purpose : Find next 'one' bit * Purpose : Find next 'one' bit
...@@ -98,7 +98,7 @@ ENTRY(_find_first_zero_bit_be) ...@@ -98,7 +98,7 @@ ENTRY(_find_first_zero_bit_be)
2: cmp r2, r1 @ any more? 2: cmp r2, r1 @ any more?
blo 1b blo 1b
3: mov r0, r1 @ no free bits 3: mov r0, r1 @ no free bits
RETINSTR(mov,pc,lr) mov pc, lr
ENTRY(_find_next_zero_bit_be) ENTRY(_find_next_zero_bit_be)
teq r1, #0 teq r1, #0
...@@ -126,7 +126,7 @@ ENTRY(_find_first_bit_be) ...@@ -126,7 +126,7 @@ ENTRY(_find_first_bit_be)
2: cmp r2, r1 @ any more? 2: cmp r2, r1 @ any more?
blo 1b blo 1b
3: mov r0, r1 @ no free bits 3: mov r0, r1 @ no free bits
RETINSTR(mov,pc,lr) mov pc, lr
ENTRY(_find_next_bit_be) ENTRY(_find_next_bit_be)
teq r1, #0 teq r1, #0
...@@ -164,5 +164,5 @@ ENTRY(_find_next_bit_be) ...@@ -164,5 +164,5 @@ ENTRY(_find_next_bit_be)
addeq r2, r2, #1 addeq r2, r2, #1
mov r0, r2 mov r0, r2
#endif #endif
RETINSTR(mov,pc,lr) mov pc, lr
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
strb r3, [r1], #1 strb r3, [r1], #1
subs r2, r2, #1 subs r2, r2, #1
RETINSTR(moveq, pc, lr) moveq pc, lr
ENTRY(__raw_readsw) ENTRY(__raw_readsw)
teq r2, #0 @ do we have to check for the zero len? teq r2, #0 @ do we have to check for the zero len?
......
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
orr r3, r3, r3, lsl #16 orr r3, r3, r3, lsl #16
str r3, [r0] str r3, [r0]
subs r2, r2, #1 subs r2, r2, #1
RETINSTR(moveq, pc, lr) moveq pc, lr
ENTRY(__raw_writesw) ENTRY(__raw_writesw)
teq r2, #0 @ do we have to check for the zero len? teq r2, #0 @ do we have to check for the zero len?
......
...@@ -22,4 +22,4 @@ ENTRY(memchr) ...@@ -22,4 +22,4 @@ ENTRY(memchr)
bne 1b bne 1b
sub r0, r0, #1 sub r0, r0, #1
2: movne r0, #0 2: movne r0, #0
RETINSTR(mov,pc,lr) mov pc, lr
...@@ -77,4 +77,4 @@ ENTRY(memset) ...@@ -77,4 +77,4 @@ ENTRY(memset)
strneb r1, [r0], #1 strneb r1, [r0], #1
tst r2, #1 tst r2, #1
strneb r1, [r0], #1 strneb r1, [r0], #1
RETINSTR(mov,pc,lr) mov pc, lr
...@@ -77,4 +77,4 @@ ENTRY(__memzero) ...@@ -77,4 +77,4 @@ ENTRY(__memzero)
strneb r2, [r0], #1 @ 1 strneb r2, [r0], #1 @ 1
tst r1, #1 @ 1 a byte left over tst r1, #1 @ 1 a byte left over
strneb r2, [r0], #1 @ 1 strneb r2, [r0], #1 @ 1
RETINSTR(mov,pc,lr) @ 1 mov pc, lr @ 1
...@@ -23,4 +23,4 @@ ENTRY(strchr) ...@@ -23,4 +23,4 @@ ENTRY(strchr)
teq r2, r1 teq r2, r1
movne r0, #0 movne r0, #0
subeq r0, r0, #1 subeq r0, r0, #1
RETINSTR(mov,pc,lr) mov pc, lr
...@@ -22,4 +22,4 @@ ENTRY(strrchr) ...@@ -22,4 +22,4 @@ ENTRY(strrchr)
teq r2, #0 teq r2, #0
bne 1b bne 1b
mov r0, r3 mov r0, r3
RETINSTR(mov,pc,lr) mov pc, lr
...@@ -73,12 +73,6 @@ ...@@ -73,12 +73,6 @@
ldm/**/cond base,reglist ldm/**/cond base,reglist
#endif #endif
/*
* Build a return instruction for this processor type.
*/
#define RETINSTR(instr, regs...)\
instr regs
/* /*
* Enable and disable interrupts * Enable and disable interrupts
*/ */
......
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