drm/amd/display: Correct display clocks update block sequence

[WHY&HOW]
At the time of block sequence construction, the exact reference DPP/DISP clock is
not yet known, so the clock should be passed by reference to the DTO programming
function.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.h

@@ -54,18 +54,17 @@ union dcn401_clk_mgr_block_sequence_params {
 	struct {
 		/* inputs */
 		struct dc_state *context;
-		int dppclk_khz;
+		int *ref_dppclk_khz;
 		bool safe_to_lower;
 	} update_dppclk_dto_params;
 	struct {
 		/* inputs */
 		struct dc_state *context;
-		int ref_dtbclk_khz;
+		int *ref_dtbclk_khz;
 	} update_dtbclk_dto_params;
 	struct {
 		/* inputs */
 		struct dc_state *context;
-		int ref_dtbclk_khz;
 	} update_dentist_params;
 	struct {
 		/* inputs */
@@ -108,9 +107,6 @@ void dcn401_init_clocks(struct clk_mgr *clk_mgr_base);
 struct clk_mgr_internal *dcn401_clk_mgr_construct(struct dc_context *ctx,
 		struct dccg *dccg);
 
-void dcn401_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
-		struct dc_state *context, bool safe_to_lower, int dppclk_khz);
-
 void dcn401_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr);
 
 #endif /* __DCN401_CLK_MGR_H_ */