Commit 7a7db3d1 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

arm64: dts: renesas: r8a779h0: Add DMA support

Add device nodes for the Direct Memory Access Controllers for System
(SYS-DMAC) on the Renesas R-Car V4M (R8A779H0) SoC.

Link all DMA consumers to the corresponding DMA controller channels.

Based on patches in the BSP by Thanh Le and Minh Le.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/44de886cd83f41659d2f6962c0e277f548fb0adb.1707916707.git.geert+renesas@glider.be
parent 81f1919b
...@@ -326,6 +326,9 @@ i2c0: i2c@e6500000 { ...@@ -326,6 +326,9 @@ i2c0: i2c@e6500000 {
clocks = <&cpg CPG_MOD 518>; clocks = <&cpg CPG_MOD 518>;
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 518>; resets = <&cpg 518>;
dmas = <&dmac1 0x91>, <&dmac1 0x90>,
<&dmac2 0x91>, <&dmac2 0x90>;
dma-names = "tx", "rx", "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -340,6 +343,9 @@ i2c1: i2c@e6508000 { ...@@ -340,6 +343,9 @@ i2c1: i2c@e6508000 {
clocks = <&cpg CPG_MOD 519>; clocks = <&cpg CPG_MOD 519>;
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 519>; resets = <&cpg 519>;
dmas = <&dmac1 0x93>, <&dmac1 0x92>,
<&dmac2 0x93>, <&dmac2 0x92>;
dma-names = "tx", "rx", "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -354,6 +360,9 @@ i2c2: i2c@e6510000 { ...@@ -354,6 +360,9 @@ i2c2: i2c@e6510000 {
clocks = <&cpg CPG_MOD 520>; clocks = <&cpg CPG_MOD 520>;
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 520>; resets = <&cpg 520>;
dmas = <&dmac1 0x95>, <&dmac1 0x94>,
<&dmac2 0x95>, <&dmac2 0x94>;
dma-names = "tx", "rx", "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -368,6 +377,9 @@ i2c3: i2c@e66d0000 { ...@@ -368,6 +377,9 @@ i2c3: i2c@e66d0000 {
clocks = <&cpg CPG_MOD 521>; clocks = <&cpg CPG_MOD 521>;
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 521>; resets = <&cpg 521>;
dmas = <&dmac1 0x97>, <&dmac1 0x96>,
<&dmac2 0x97>, <&dmac2 0x96>;
dma-names = "tx", "rx", "tx", "rx";
i2c-scl-internal-delay-ns = <110>; i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -385,6 +397,9 @@ hscif0: serial@e6540000 { ...@@ -385,6 +397,9 @@ hscif0: serial@e6540000 {
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 514>; resets = <&cpg 514>;
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
<&dmac2 0x31>, <&dmac2 0x30>;
dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; status = "disabled";
}; };
...@@ -532,6 +547,66 @@ avb2: ethernet@e6820000 { ...@@ -532,6 +547,66 @@ avb2: ethernet@e6820000 {
status = "disabled"; status = "disabled";
}; };
dmac1: dma-controller@e7350000 {
compatible = "renesas,dmac-r8a779h0",
"renesas,rcar-gen4-dmac";
reg = <0 0xe7350000 0 0x1000>,
<0 0xe7300000 0 0x10000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3", "ch4",
"ch5", "ch6", "ch7", "ch8", "ch9",
"ch10", "ch11", "ch12", "ch13",
"ch14", "ch15";
clocks = <&cpg CPG_MOD 709>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 709>;
#dma-cells = <1>;
dma-channels = <16>;
};
dmac2: dma-controller@e7351000 {
compatible = "renesas,dmac-r8a779h0",
"renesas,rcar-gen4-dmac";
reg = <0 0xe7351000 0 0x1000>,
<0 0xe7310000 0 0x10000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3", "ch4",
"ch5", "ch6", "ch7";
clocks = <&cpg CPG_MOD 710>;
clock-names = "fck";
power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>;
resets = <&cpg 710>;
#dma-cells = <1>;
dma-channels = <8>;
};
mmc0: mmc@ee140000 { mmc0: mmc@ee140000 {
compatible = "renesas,sdhi-r8a779h0", compatible = "renesas,sdhi-r8a779h0",
"renesas,rcar-gen4-sdhi"; "renesas,rcar-gen4-sdhi";
......
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