Commit 7ba57d11 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson

arm64: dts: qcom: sm8350: drop duplicated ref_clk in UFS

ref_clk clock in UFS node is already there with a <0 0> frequency, which
matches other DTSI files.
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220407092725.232463-3-krzysztof.kozlowski@linaro.org
parent 64ff6984
...@@ -1916,7 +1916,6 @@ ufs_mem_hc: ufshc@1d84000 { ...@@ -1916,7 +1916,6 @@ ufs_mem_hc: ufshc@1d84000 {
iommus = <&apps_smmu 0xe0 0x0>; iommus = <&apps_smmu 0xe0 0x0>;
clock-names = clock-names =
"ref_clk",
"core_clk", "core_clk",
"bus_aggr_clk", "bus_aggr_clk",
"iface_clk", "iface_clk",
...@@ -1926,7 +1925,6 @@ ufs_mem_hc: ufshc@1d84000 { ...@@ -1926,7 +1925,6 @@ ufs_mem_hc: ufshc@1d84000 {
"rx_lane0_sync_clk", "rx_lane0_sync_clk",
"rx_lane1_sync_clk"; "rx_lane1_sync_clk";
clocks = clocks =
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_AXI_CLK>, <&gcc GCC_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>, <&gcc GCC_UFS_PHY_AHB_CLK>,
...@@ -1936,7 +1934,6 @@ ufs_mem_hc: ufshc@1d84000 { ...@@ -1936,7 +1934,6 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
freq-table-hz = freq-table-hz =
<75000000 300000000>,
<75000000 300000000>, <75000000 300000000>,
<0 0>, <0 0>,
<0 0>, <0 0>,
......
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