Commit 7d7bf30f authored by Horatiu Vultur's avatar Horatiu Vultur Committed by David S. Miller

net: micrel: Fix the frequency adjustments

By default lan8841's 1588 clock frequency is 125MHz. But when adjusting
the frequency, it is using the 1PPM format of the lan8814. Which is the
wrong format as lan8814 has a 1588 clock frequency of 250MHz. So then
for each 1PPM adjustment would adjust less than expected.
Therefore fix this by using the correct 1PPM format for lan8841.
Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d6aa8e0a
......@@ -120,6 +120,12 @@
*/
#define LAN8814_1PPM_FORMAT 17179
/* Represents 1ppm adjustment in 2^32 format with
* each nsec contains 8 clock cycles.
* The value is calculated as following: (1/1000000)/((2^-32)/8)
*/
#define LAN8841_1PPM_FORMAT 34360
#define PTP_RX_VERSION 0x0248
#define PTP_TX_VERSION 0x0288
#define PTP_MAX_VERSION(x) (((x) & GENMASK(7, 0)) << 8)
......@@ -4115,8 +4121,8 @@ static int lan8841_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
faster = false;
}
rate = LAN8814_1PPM_FORMAT * (upper_16_bits(scaled_ppm));
rate += (LAN8814_1PPM_FORMAT * (lower_16_bits(scaled_ppm))) >> 16;
rate = LAN8841_1PPM_FORMAT * (upper_16_bits(scaled_ppm));
rate += (LAN8841_1PPM_FORMAT * (lower_16_bits(scaled_ppm))) >> 16;
mutex_lock(&ptp_priv->ptp_lock);
phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_RATE_ADJ_HI,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment