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Commit 7e6d8f83 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch '4.14-fixes' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull MIPS fixes from Ralf Baechle:

 - Fix a build error on MSP71xx which used to rely on somehow magically
   <asm/setup.h> being pulled in which no longer happens.

 - Fix the __write_64bit_c0_split inline assembler where there was the
   theoretical possibility of GCC interpret the constraints such that
   bad code could result.

 - A __init was causing section mismatch errors on Alchemy. Just to be
   on the safe side, Manuel's patch does away with all of them.

 - Fix perf event init.

* '4.14-fixes' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: PCI: fix pcibios_map_irq section mismatch
  MIPS: Fix input modify in __write_64bit_c0_split()
  MIPS: MSP71xx: Include asm/setup.h
  MIPS: Fix perf event init
parents c8107ed9 8eba3651
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Showing with 37 additions and 33 deletions
arch/mips/include/asm/mipsregs.h
View file @ 7e6d8f83
...@@ -1377,29 +1377,32 @@ do { \ ...@@ -1377,29 +1377,32 @@ do { \
#define __write_64bit_c0_split(source, sel, val) \ #define __write_64bit_c0_split(source, sel, val) \
do { \ do { \
unsigned long long __tmp; \
unsigned long __flags; \ unsigned long __flags; \
\ \
local_irq_save(__flags); \ local_irq_save(__flags); \
if (sel == 0) \ if (sel == 0) \
__asm__ __volatile__( \ __asm__ __volatile__( \
".set\tmips64\n\t" \ ".set\tmips64\n\t" \
"dsll\t%L0, %L0, 32\n\t" \ "dsll\t%L0, %L1, 32\n\t" \
"dsrl\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \
"dsll\t%M0, %M0, 32\n\t" \ "dsll\t%M0, %M1, 32\n\t" \
"or\t%L0, %L0, %M0\n\t" \ "or\t%L0, %L0, %M0\n\t" \
"dmtc0\t%L0, " #source "\n\t" \ "dmtc0\t%L0, " #source "\n\t" \
".set\tmips0" \ ".set\tmips0" \
: : "r" (val)); \ : "=&r,r" (__tmp) \
: "r,0" (val)); \
else \ else \
__asm__ __volatile__( \ __asm__ __volatile__( \
".set\tmips64\n\t" \ ".set\tmips64\n\t" \
"dsll\t%L0, %L0, 32\n\t" \ "dsll\t%L0, %L1, 32\n\t" \
"dsrl\t%L0, %L0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \
"dsll\t%M0, %M0, 32\n\t" \ "dsll\t%M0, %M1, 32\n\t" \
"or\t%L0, %L0, %M0\n\t" \ "or\t%L0, %L0, %M0\n\t" \
"dmtc0\t%L0, " #source ", " #sel "\n\t" \ "dmtc0\t%L0, " #source ", " #sel "\n\t" \
".set\tmips0" \ ".set\tmips0" \
: : "r" (val)); \ : "=&r,r" (__tmp) \
: "r,0" (val)); \
local_irq_restore(__flags); \ local_irq_restore(__flags); \
} while (0) } while (0)
......
arch/mips/kernel/perf_event_mipsxx.c
View file @ 7e6d8f83
...@@ -618,8 +618,7 @@ static int mipspmu_event_init(struct perf_event *event) ...@@ -618,8 +618,7 @@ static int mipspmu_event_init(struct perf_event *event)
return -ENOENT; return -ENOENT;
} }
if ((unsigned int)event->cpu >= nr_cpumask_bits || if (event->cpu >= 0 && !cpu_online(event->cpu))
(event->cpu >= 0 && !cpu_online(event->cpu)))
return -ENODEV; return -ENODEV;
if (!atomic_inc_not_zero(&active_events)) { if (!atomic_inc_not_zero(&active_events)) {
......
arch/mips/pci/fixup-capcella.c
View file @ 7e6d8f83
...@@ -38,7 +38,7 @@ static char irq_tab_capcella[][5] __initdata = { ...@@ -38,7 +38,7 @@ static char irq_tab_capcella[][5] __initdata = {
[14] = { -1, INTA, INTB, INTC, INTD } [14] = { -1, INTA, INTB, INTC, INTD }
}; };
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
return irq_tab_capcella[slot][pin]; return irq_tab_capcella[slot][pin];
} }
......
arch/mips/pci/fixup-cobalt.c
View file @ 7e6d8f83
...@@ -174,7 +174,7 @@ static char irq_tab_raq2[] __initdata = { ...@@ -174,7 +174,7 @@ static char irq_tab_raq2[] __initdata = {
[COBALT_PCICONF_ETH1] = ETH1_IRQ [COBALT_PCICONF_ETH1] = ETH1_IRQ
}; };
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
if (cobalt_board_id <= COBALT_BRD_ID_QUBE1) if (cobalt_board_id <= COBALT_BRD_ID_QUBE1)
return irq_tab_qube1[slot]; return irq_tab_qube1[slot];
......
arch/mips/pci/fixup-emma2rh.c
View file @ 7e6d8f83
...@@ -85,7 +85,7 @@ static void emma2rh_pci_host_fixup(struct pci_dev *dev) ...@@ -85,7 +85,7 @@ static void emma2rh_pci_host_fixup(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_EMMA2RH, DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_EMMA2RH,
emma2rh_pci_host_fixup); emma2rh_pci_host_fixup);
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
return irq_map[slot][pin]; return irq_map[slot][pin];
} }
......
arch/mips/pci/fixup-fuloong2e.c
View file @ 7e6d8f83
...@@ -19,7 +19,7 @@ ...@@ -19,7 +19,7 @@
/* South bridge slot number is set by the pci probe process */ /* South bridge slot number is set by the pci probe process */
static u8 sb_slot = 5; static u8 sb_slot = 5;
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
int irq = 0; int irq = 0;
......
arch/mips/pci/fixup-ip32.c
View file @ 7e6d8f83
...@@ -39,7 +39,7 @@ static char irq_tab_mace[][5] __initdata = { ...@@ -39,7 +39,7 @@ static char irq_tab_mace[][5] __initdata = {
* irqs. I suppose a device without a pin A will thank us for doing it * irqs. I suppose a device without a pin A will thank us for doing it
* right if there exists such a broken piece of crap. * right if there exists such a broken piece of crap.
*/ */
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
return irq_tab_mace[slot][pin]; return irq_tab_mace[slot][pin];
} }
......
arch/mips/pci/fixup-lantiq.c
View file @ 7e6d8f83
...@@ -23,7 +23,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) ...@@ -23,7 +23,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
return 0; return 0;
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
return of_irq_parse_and_map_pci(dev, slot, pin); return of_irq_parse_and_map_pci(dev, slot, pin);
} }
arch/mips/pci/fixup-lemote2f.c
View file @ 7e6d8f83
...@@ -51,7 +51,7 @@ static char irq_tab[][5] __initdata = { ...@@ -51,7 +51,7 @@ static char irq_tab[][5] __initdata = {
{0, 0, 0, 0, 0}, /* 27: Unused */ {0, 0, 0, 0, 0}, /* 27: Unused */
}; };
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
int virq; int virq;
......
arch/mips/pci/fixup-loongson3.c
View file @ 7e6d8f83
...@@ -32,7 +32,7 @@ static void print_fixup_info(const struct pci_dev *pdev) ...@@ -32,7 +32,7 @@ static void print_fixup_info(const struct pci_dev *pdev)
pdev->vendor, pdev->device, pdev->irq); pdev->vendor, pdev->device, pdev->irq);
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
print_fixup_info(dev); print_fixup_info(dev);
return dev->irq; return dev->irq;
......
arch/mips/pci/fixup-malta.c
View file @ 7e6d8f83
...@@ -38,7 +38,7 @@ static char irq_tab[][5] __initdata = { ...@@ -38,7 +38,7 @@ static char irq_tab[][5] __initdata = {
{0, PCID, PCIA, PCIB, PCIC } /* 21: PCI Slot 4 */ {0, PCID, PCIA, PCIB, PCIC } /* 21: PCI Slot 4 */
}; };
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
int virq; int virq;
virq = irq_tab[slot][pin]; virq = irq_tab[slot][pin];
......
arch/mips/pci/fixup-mpc30x.c
View file @ 7e6d8f83
...@@ -34,7 +34,7 @@ static const int irq_tab_mpc30x[] __initconst = { ...@@ -34,7 +34,7 @@ static const int irq_tab_mpc30x[] __initconst = {
[29] = MQ200_IRQ, [29] = MQ200_IRQ,
}; };
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
if (slot == 30) if (slot == 30)
return internal_func_irqs[PCI_FUNC(dev->devfn)]; return internal_func_irqs[PCI_FUNC(dev->devfn)];
......
arch/mips/pci/fixup-pmcmsp.c
View file @ 7e6d8f83
...@@ -202,7 +202,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) ...@@ -202,7 +202,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
* RETURNS: IRQ number * RETURNS: IRQ number
* *
****************************************************************************/ ****************************************************************************/
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
#if !defined(CONFIG_PMC_MSP7120_GW) && !defined(CONFIG_PMC_MSP7120_EVAL) #if !defined(CONFIG_PMC_MSP7120_GW) && !defined(CONFIG_PMC_MSP7120_EVAL)
printk(KERN_WARNING "PCI: unknown board, no PCI IRQs assigned.\n"); printk(KERN_WARNING "PCI: unknown board, no PCI IRQs assigned.\n");
......
arch/mips/pci/fixup-sni.c
View file @ 7e6d8f83
...@@ -130,7 +130,7 @@ static inline int is_rm300_revd(void) ...@@ -130,7 +130,7 @@ static inline int is_rm300_revd(void)
return (csmsr & 0xa0) == 0x20; return (csmsr & 0xa0) == 0x20;
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
switch (sni_brd_type) { switch (sni_brd_type) {
case SNI_BRD_PCI_TOWER_CPLUS: case SNI_BRD_PCI_TOWER_CPLUS:
......
arch/mips/pci/fixup-tb0219.c
View file @ 7e6d8f83
...@@ -23,7 +23,7 @@ ...@@ -23,7 +23,7 @@
#include <asm/vr41xx/tb0219.h> #include <asm/vr41xx/tb0219.h>
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
int irq = -1; int irq = -1;
......
arch/mips/pci/fixup-tb0226.c
View file @ 7e6d8f83
...@@ -23,7 +23,7 @@ ...@@ -23,7 +23,7 @@
#include <asm/vr41xx/giu.h> #include <asm/vr41xx/giu.h>
#include <asm/vr41xx/tb0226.h> #include <asm/vr41xx/tb0226.h>
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
int irq = -1; int irq = -1;
......
arch/mips/pci/fixup-tb0287.c
View file @ 7e6d8f83
...@@ -22,7 +22,7 @@ ...@@ -22,7 +22,7 @@
#include <asm/vr41xx/tb0287.h> #include <asm/vr41xx/tb0287.h>
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
unsigned char bus; unsigned char bus;
int irq = -1; int irq = -1;
......
arch/mips/pci/pci-alchemy.c
View file @ 7e6d8f83
...@@ -522,7 +522,7 @@ static int __init alchemy_pci_init(void) ...@@ -522,7 +522,7 @@ static int __init alchemy_pci_init(void)
arch_initcall(alchemy_pci_init); arch_initcall(alchemy_pci_init);
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
struct alchemy_pci_context *ctx = dev->sysdata; struct alchemy_pci_context *ctx = dev->sysdata;
if (ctx && ctx->board_map_irq) if (ctx && ctx->board_map_irq)
......
arch/mips/pci/pci-bcm47xx.c
View file @ 7e6d8f83
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
#include <linux/bcma/bcma.h> #include <linux/bcma/bcma.h>
#include <bcm47xx.h> #include <bcm47xx.h>
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
return 0; return 0;
} }
......
arch/mips/pci/pci-lasat.c
View file @ 7e6d8f83
...@@ -61,7 +61,7 @@ arch_initcall(lasat_pci_setup); ...@@ -61,7 +61,7 @@ arch_initcall(lasat_pci_setup);
#define LASAT_IRQ_PCIC (LASAT_IRQ_BASE + 7) #define LASAT_IRQ_PCIC (LASAT_IRQ_BASE + 7)
#define LASAT_IRQ_PCID (LASAT_IRQ_BASE + 8) #define LASAT_IRQ_PCID (LASAT_IRQ_BASE + 8)
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
switch (slot) { switch (slot) {
case 1: case 1:
......
arch/mips/pci/pci-mt7620.c
View file @ 7e6d8f83
...@@ -361,7 +361,7 @@ static int mt7620_pci_probe(struct platform_device *pdev) ...@@ -361,7 +361,7 @@ static int mt7620_pci_probe(struct platform_device *pdev)
return 0; return 0;
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
u16 cmd; u16 cmd;
u32 val; u32 val;
......
arch/mips/pci/pci-octeon.c
View file @ 7e6d8f83
...@@ -59,7 +59,7 @@ union octeon_pci_address { ...@@ -59,7 +59,7 @@ union octeon_pci_address {
} s; } s;
}; };
int __initconst (*octeon_pcibios_map_irq)(const struct pci_dev *dev, int (*octeon_pcibios_map_irq)(const struct pci_dev *dev,
u8 slot, u8 pin); u8 slot, u8 pin);
enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID; enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID;
...@@ -74,7 +74,7 @@ enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID; ...@@ -74,7 +74,7 @@ enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID;
* as it goes through each bridge. * as it goes through each bridge.
* Returns Interrupt number for the device * Returns Interrupt number for the device
*/ */
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
if (octeon_pcibios_map_irq) if (octeon_pcibios_map_irq)
return octeon_pcibios_map_irq(dev, slot, pin); return octeon_pcibios_map_irq(dev, slot, pin);
......
arch/mips/pci/pci-rt2880.c
View file @ 7e6d8f83
...@@ -181,7 +181,7 @@ static inline void rt2880_pci_write_u32(unsigned long reg, u32 val) ...@@ -181,7 +181,7 @@ static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
spin_unlock_irqrestore(&rt2880_pci_lock, flags); spin_unlock_irqrestore(&rt2880_pci_lock, flags);
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
u16 cmd; u16 cmd;
int irq = -1; int irq = -1;
......
arch/mips/pci/pci-rt3883.c
View file @ 7e6d8f83
...@@ -564,7 +564,7 @@ static int rt3883_pci_probe(struct platform_device *pdev) ...@@ -564,7 +564,7 @@ static int rt3883_pci_probe(struct platform_device *pdev)
return err; return err;
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
return of_irq_parse_and_map_pci(dev, slot, pin); return of_irq_parse_and_map_pci(dev, slot, pin);
} }
......
arch/mips/pci/pci-xlp.c
View file @ 7e6d8f83
...@@ -205,7 +205,7 @@ int xlp_socdev_to_node(const struct pci_dev *lnkdev) ...@@ -205,7 +205,7 @@ int xlp_socdev_to_node(const struct pci_dev *lnkdev)
return PCI_SLOT(lnkdev->devfn) / 8; return PCI_SLOT(lnkdev->devfn) / 8;
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
struct pci_dev *lnkdev; struct pci_dev *lnkdev;
int lnkfunc, node; int lnkfunc, node;
......
arch/mips/pci/pci-xlr.c
View file @ 7e6d8f83
...@@ -315,7 +315,7 @@ static void xls_pcie_ack_b(struct irq_data *d) ...@@ -315,7 +315,7 @@ static void xls_pcie_ack_b(struct irq_data *d)
} }
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{ {
return get_irq_vector(dev); return get_irq_vector(dev);
} }
......
arch/mips/pmcs-msp71xx/msp_smp.c
View file @ 7e6d8f83
...@@ -22,6 +22,8 @@ ...@@ -22,6 +22,8 @@
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <asm/setup.h>
#ifdef CONFIG_MIPS_MT_SMP #ifdef CONFIG_MIPS_MT_SMP
#define MIPS_CPU_IPI_RESCHED_IRQ 0 /* SW int 0 for resched */ #define MIPS_CPU_IPI_RESCHED_IRQ 0 /* SW int 0 for resched */
#define MIPS_CPU_IPI_CALL_IRQ 1 /* SW int 1 for call */ #define MIPS_CPU_IPI_CALL_IRQ 1 /* SW int 1 for call */
......
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