Commit 7f1cd6fd authored by Oded Gabbay's avatar Oded Gabbay

accel/habanalabs: minor cosmetics update to cpucp_if.h

- Update copyright years
- Align comments
Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
Reviewed-by: default avatarOfir Bitton <obitton@habana.ai>
parent ff92d010
/* SPDX-License-Identifier: GPL-2.0 /* SPDX-License-Identifier: GPL-2.0
* *
* Copyright 2020-2022 HabanaLabs, Ltd. * Copyright 2020-2023 HabanaLabs, Ltd.
* All Rights Reserved. * All Rights Reserved.
* *
*/ */
...@@ -668,18 +668,15 @@ enum pq_init_status { ...@@ -668,18 +668,15 @@ enum pq_init_status {
* Obsolete. * Obsolete.
* *
* CPUCP_PACKET_GENERIC_PASSTHROUGH - * CPUCP_PACKET_GENERIC_PASSTHROUGH -
* Generic opcode for all firmware info that is only passed to host * Generic opcode for all firmware info that is only passed to host
* through the LKD, without getting parsed there. * through the LKD, without getting parsed there.
* *
* CPUCP_PACKET_ACTIVE_STATUS_SET - * CPUCP_PACKET_ACTIVE_STATUS_SET -
* LKD sends FW indication whether device is free or in use, this indication is reported * LKD sends FW indication whether device is free or in use, this indication is reported
* also to the BMC. * also to the BMC.
* *
* CPUCP_PACKET_REGISTER_INTERRUPTS -
* Packet to register interrupts indicating LKD is ready to receive events from FW.
*
* CPUCP_PACKET_SOFT_RESET - * CPUCP_PACKET_SOFT_RESET -
* Packet to perform soft-reset. * Packet to perform soft-reset.
* *
* CPUCP_PACKET_INTS_REGISTER - * CPUCP_PACKET_INTS_REGISTER -
* Packet to inform FW that queues have been established and LKD is ready to receive * Packet to inform FW that queues have been established and LKD is ready to receive
...@@ -750,9 +747,9 @@ enum cpucp_packet_id { ...@@ -750,9 +747,9 @@ enum cpucp_packet_id {
CPUCP_PACKET_RESERVED11, /* not used */ CPUCP_PACKET_RESERVED11, /* not used */
CPUCP_PACKET_RESERVED12, /* internal */ CPUCP_PACKET_RESERVED12, /* internal */
CPUCP_PACKET_RESERVED13, /* internal */ CPUCP_PACKET_RESERVED13, /* internal */
CPUCP_PACKET_SOFT_RESET, /* internal */ CPUCP_PACKET_SOFT_RESET, /* internal */
CPUCP_PACKET_INTS_REGISTER, /* internal */ CPUCP_PACKET_INTS_REGISTER, /* internal */
CPUCP_PACKET_ID_MAX /* must be last */ CPUCP_PACKET_ID_MAX /* must be last */
}; };
#define CPUCP_PACKET_FENCE_VAL 0xFE8CE7A5 #define CPUCP_PACKET_FENCE_VAL 0xFE8CE7A5
......
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