Commit 839f9117 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/powerplay: guard consistency between CPU copy and local VRAM

This can prevent CPU to use the out-dated copy.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bd2280da
...@@ -451,6 +451,7 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int ...@@ -451,6 +451,7 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int
void *table_data, bool drv2smu) void *table_data, bool drv2smu)
{ {
struct smu_table_context *smu_table = &smu->smu_table; struct smu_table_context *smu_table = &smu->smu_table;
struct amdgpu_device *adev = smu->adev;
struct smu_table *table = NULL; struct smu_table *table = NULL;
int ret = 0; int ret = 0;
int table_id = smu_table_get_index(smu, table_index); int table_id = smu_table_get_index(smu, table_index);
...@@ -478,6 +479,9 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int ...@@ -478,6 +479,9 @@ int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int
if (ret) if (ret)
return ret; return ret;
/* flush hdp cache */
adev->nbio_funcs->hdp_flush(adev, NULL);
if (!drv2smu) if (!drv2smu)
memcpy(table_data, table->cpu_addr, table->size); memcpy(table_data, table->cpu_addr, table->size);
......
...@@ -118,6 +118,7 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -118,6 +118,7 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
{ {
struct smu10_smumgr *priv = struct smu10_smumgr *priv =
(struct smu10_smumgr *)(hwmgr->smu_backend); (struct smu10_smumgr *)(hwmgr->smu_backend);
struct amdgpu_device *adev = hwmgr->adev;
PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE, PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
"Invalid SMU Table ID!", return -EINVAL;); "Invalid SMU Table ID!", return -EINVAL;);
...@@ -135,6 +136,9 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -135,6 +136,9 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
PPSMC_MSG_TransferTableSmu2Dram, PPSMC_MSG_TransferTableSmu2Dram,
priv->smu_tables.entry[table_id].table_id); priv->smu_tables.entry[table_id].table_id);
/* flush hdp cache */
adev->nbio_funcs->hdp_flush(adev, NULL);
memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table, memcpy(table, (uint8_t *)priv->smu_tables.entry[table_id].table,
priv->smu_tables.entry[table_id].size); priv->smu_tables.entry[table_id].size);
......
...@@ -39,6 +39,7 @@ static int vega10_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -39,6 +39,7 @@ static int vega10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id) uint8_t *table, int16_t table_id)
{ {
struct vega10_smumgr *priv = hwmgr->smu_backend; struct vega10_smumgr *priv = hwmgr->smu_backend;
struct amdgpu_device *adev = hwmgr->adev;
PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE, PP_ASSERT_WITH_CODE(table_id < MAX_SMU_TABLE,
"Invalid SMU Table ID!", return -EINVAL); "Invalid SMU Table ID!", return -EINVAL);
...@@ -56,6 +57,9 @@ static int vega10_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -56,6 +57,9 @@ static int vega10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
PPSMC_MSG_TransferTableSmu2Dram, PPSMC_MSG_TransferTableSmu2Dram,
priv->smu_tables.entry[table_id].table_id); priv->smu_tables.entry[table_id].table_id);
/* flush hdp cache */
adev->nbio_funcs->hdp_flush(adev, NULL);
memcpy(table, priv->smu_tables.entry[table_id].table, memcpy(table, priv->smu_tables.entry[table_id].table,
priv->smu_tables.entry[table_id].size); priv->smu_tables.entry[table_id].size);
......
...@@ -42,6 +42,7 @@ static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -42,6 +42,7 @@ static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
{ {
struct vega12_smumgr *priv = struct vega12_smumgr *priv =
(struct vega12_smumgr *)(hwmgr->smu_backend); (struct vega12_smumgr *)(hwmgr->smu_backend);
struct amdgpu_device *adev = hwmgr->adev;
PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT, PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,
"Invalid SMU Table ID!", return -EINVAL); "Invalid SMU Table ID!", return -EINVAL);
...@@ -64,6 +65,9 @@ static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -64,6 +65,9 @@ static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
"[CopyTableFromSMC] Attempt to Transfer Table From SMU Failed!", "[CopyTableFromSMC] Attempt to Transfer Table From SMU Failed!",
return -EINVAL); return -EINVAL);
/* flush hdp cache */
adev->nbio_funcs->hdp_flush(adev, NULL);
memcpy(table, priv->smu_tables.entry[table_id].table, memcpy(table, priv->smu_tables.entry[table_id].table,
priv->smu_tables.entry[table_id].size); priv->smu_tables.entry[table_id].size);
......
...@@ -163,6 +163,7 @@ static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -163,6 +163,7 @@ static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr,
{ {
struct vega20_smumgr *priv = struct vega20_smumgr *priv =
(struct vega20_smumgr *)(hwmgr->smu_backend); (struct vega20_smumgr *)(hwmgr->smu_backend);
struct amdgpu_device *adev = hwmgr->adev;
int ret = 0; int ret = 0;
PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT, PP_ASSERT_WITH_CODE(table_id < TABLE_COUNT,
...@@ -187,6 +188,9 @@ static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -187,6 +188,9 @@ static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr,
"[CopyTableFromSMC] Attempt to Transfer Table From SMU Failed!", "[CopyTableFromSMC] Attempt to Transfer Table From SMU Failed!",
return ret); return ret);
/* flush hdp cache */
adev->nbio_funcs->hdp_flush(adev, NULL);
memcpy(table, priv->smu_tables.entry[table_id].table, memcpy(table, priv->smu_tables.entry[table_id].table,
priv->smu_tables.entry[table_id].size); priv->smu_tables.entry[table_id].size);
...@@ -266,6 +270,7 @@ int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr, ...@@ -266,6 +270,7 @@ int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
{ {
struct vega20_smumgr *priv = struct vega20_smumgr *priv =
(struct vega20_smumgr *)(hwmgr->smu_backend); (struct vega20_smumgr *)(hwmgr->smu_backend);
struct amdgpu_device *adev = hwmgr->adev;
int ret = 0; int ret = 0;
PP_ASSERT_WITH_CODE((ret = vega20_send_msg_to_smc_with_parameter(hwmgr, PP_ASSERT_WITH_CODE((ret = vega20_send_msg_to_smc_with_parameter(hwmgr,
...@@ -284,6 +289,9 @@ int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr, ...@@ -284,6 +289,9 @@ int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
"[GetActivityMonitor] Attempt to Transfer Table From SMU Failed!", "[GetActivityMonitor] Attempt to Transfer Table From SMU Failed!",
return ret); return ret);
/* flush hdp cache */
adev->nbio_funcs->hdp_flush(adev, NULL);
memcpy(table, priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].table, memcpy(table, priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].table,
priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size); priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size);
......
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