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Kirill Smelkov
linux
Commits
8483b14a
Commit
8483b14a
authored
Jan 03, 2014
by
Markos Chandras
Committed by
Ralf Baechle
Mar 26, 2014
Browse files
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Plain Diff
MIPS: lib: memset: Whitespace fixes
Signed-off-by:
Markos Chandras
<
markos.chandras@imgtec.com
>
parent
cd26cb41
Changes
1
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Showing
1 changed file
with
15 additions
and
15 deletions
+15
-15
arch/mips/lib/memset.S
arch/mips/lib/memset.S
+15
-15
No files found.
arch/mips/lib/memset.S
View file @
8483b14a
...
@@ -74,7 +74,7 @@
...
@@ -74,7 +74,7 @@
.
align
5
.
align
5
LEAF
(
memset
)
LEAF
(
memset
)
beqz
a1
,
1
f
beqz
a1
,
1
f
move
v0
,
a0
/*
result
*/
move
v0
,
a0
/*
result
*/
andi
a1
,
0xff
/*
spread
fillword
*/
andi
a1
,
0xff
/*
spread
fillword
*/
LONG_SLL
t1
,
a1
,
8
LONG_SLL
t1
,
a1
,
8
...
@@ -90,7 +90,7 @@ LEAF(memset)
...
@@ -90,7 +90,7 @@ LEAF(memset)
FEXPORT
(
__bzero
)
FEXPORT
(
__bzero
)
sltiu
t0
,
a2
,
STORSIZE
/*
very
small
region
?
*/
sltiu
t0
,
a2
,
STORSIZE
/*
very
small
region
?
*/
bnez
t0
,
.
Lsmall_memset
bnez
t0
,
.
Lsmall_memset
andi
t0
,
a0
,
STORMASK
/*
aligned
?
*/
andi
t0
,
a0
,
STORMASK
/*
aligned
?
*/
#ifdef CONFIG_CPU_MICROMIPS
#ifdef CONFIG_CPU_MICROMIPS
move
t8
,
a1
/*
used
by
'swp'
instruction
*/
move
t8
,
a1
/*
used
by
'swp'
instruction
*/
...
@@ -98,12 +98,12 @@ FEXPORT(__bzero)
...
@@ -98,12 +98,12 @@ FEXPORT(__bzero)
#endif
#endif
#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
#ifndef CONFIG_CPU_DADDI_WORKAROUNDS
beqz
t0
,
1
f
beqz
t0
,
1
f
PTR_SUBU
t0
,
STORSIZE
/*
alignment
in
bytes
*/
PTR_SUBU
t0
,
STORSIZE
/*
alignment
in
bytes
*/
#else
#else
.
set
noat
.
set
noat
li
AT
,
STORSIZE
li
AT
,
STORSIZE
beqz
t0
,
1
f
beqz
t0
,
1
f
PTR_SUBU
t0
,
AT
/*
alignment
in
bytes
*/
PTR_SUBU
t0
,
AT
/*
alignment
in
bytes
*/
.
set
at
.
set
at
#endif
#endif
...
@@ -120,7 +120,7 @@ FEXPORT(__bzero)
...
@@ -120,7 +120,7 @@ FEXPORT(__bzero)
1
:
ori
t1
,
a2
,
0x3f
/*
#
of
full
blocks
*/
1
:
ori
t1
,
a2
,
0x3f
/*
#
of
full
blocks
*/
xori
t1
,
0x3f
xori
t1
,
0x3f
beqz
t1
,
.
Lmemset_partial
/*
no
block
to
fill
*/
beqz
t1
,
.
Lmemset_partial
/*
no
block
to
fill
*/
andi
t0
,
a2
,
0x40
-
STORSIZE
andi
t0
,
a2
,
0x40
-
STORSIZE
PTR_ADDU
t1
,
a0
/*
end
address
*/
PTR_ADDU
t1
,
a0
/*
end
address
*/
.
set
reorder
.
set
reorder
...
@@ -145,7 +145,7 @@ FEXPORT(__bzero)
...
@@ -145,7 +145,7 @@ FEXPORT(__bzero)
.
set
at
.
set
at
#endif
#endif
jr
t1
jr
t1
PTR_ADDU
a0
,
t0
/*
dest
ptr
*/
PTR_ADDU
a0
,
t0
/*
dest
ptr
*/
.
set
push
.
set
push
.
set
noreorder
.
set
noreorder
...
@@ -155,7 +155,7 @@ FEXPORT(__bzero)
...
@@ -155,7 +155,7 @@ FEXPORT(__bzero)
andi
a2
,
STORMASK
/*
At
most
one
long
to
go
*/
andi
a2
,
STORMASK
/*
At
most
one
long
to
go
*/
beqz
a2
,
1
f
beqz
a2
,
1
f
PTR_ADDU
a0
,
a2
/*
What
's left */
PTR_ADDU
a0
,
a2
/*
What
's left */
R10KCBARRIER
(0(
ra
))
R10KCBARRIER
(0(
ra
))
#ifdef __MIPSEB__
#ifdef __MIPSEB__
EX
(
LONG_S_R
,
a1
,
-
1
(
a0
),
.
Llast_fixup
)
EX
(
LONG_S_R
,
a1
,
-
1
(
a0
),
.
Llast_fixup
)
...
@@ -164,24 +164,24 @@ FEXPORT(__bzero)
...
@@ -164,24 +164,24 @@ FEXPORT(__bzero)
EX
(
LONG_S_L
,
a1
,
-
1
(
a0
),
.
Llast_fixup
)
EX
(
LONG_S_L
,
a1
,
-
1
(
a0
),
.
Llast_fixup
)
#endif
#endif
1
:
jr
ra
1
:
jr
ra
move
a2
,
zero
move
a2
,
zero
.
Lsmall_memset
:
.
Lsmall_memset
:
beqz
a2
,
2
f
beqz
a2
,
2
f
PTR_ADDU
t1
,
a0
,
a2
PTR_ADDU
t1
,
a0
,
a2
1
:
PTR_ADDIU
a0
,
1
/*
fill
bytewise
*/
1
:
PTR_ADDIU
a0
,
1
/*
fill
bytewise
*/
R10KCBARRIER
(0(
ra
))
R10KCBARRIER
(0(
ra
))
bne
t1
,
a0
,
1
b
bne
t1
,
a0
,
1
b
sb
a1
,
-
1
(
a0
)
sb
a1
,
-
1
(
a0
)
2
:
jr
ra
/*
done
*/
2
:
jr
ra
/*
done
*/
move
a2
,
zero
move
a2
,
zero
END
(
memset
)
END
(
memset
)
.
Lfirst_fixup
:
.
Lfirst_fixup
:
jr
ra
jr
ra
nop
nop
.
Lfwd_fixup
:
.
Lfwd_fixup
:
PTR_L
t0
,
TI_TASK
(
$
28
)
PTR_L
t0
,
TI_TASK
(
$
28
)
...
@@ -189,7 +189,7 @@ FEXPORT(__bzero)
...
@@ -189,7 +189,7 @@ FEXPORT(__bzero)
LONG_L
t0
,
THREAD_BUADDR
(
t0
)
LONG_L
t0
,
THREAD_BUADDR
(
t0
)
LONG_ADDU
a2
,
t1
LONG_ADDU
a2
,
t1
jr
ra
jr
ra
LONG_SUBU
a2
,
t0
LONG_SUBU
a2
,
t0
.
Lpartial_fixup
:
.
Lpartial_fixup
:
PTR_L
t0
,
TI_TASK
(
$
28
)
PTR_L
t0
,
TI_TASK
(
$
28
)
...
@@ -197,8 +197,8 @@ FEXPORT(__bzero)
...
@@ -197,8 +197,8 @@ FEXPORT(__bzero)
LONG_L
t0
,
THREAD_BUADDR
(
t0
)
LONG_L
t0
,
THREAD_BUADDR
(
t0
)
LONG_ADDU
a2
,
t1
LONG_ADDU
a2
,
t1
jr
ra
jr
ra
LONG_SUBU
a2
,
t0
LONG_SUBU
a2
,
t0
.
Llast_fixup
:
.
Llast_fixup
:
jr
ra
jr
ra
andi
v1
,
a2
,
STORMASK
andi
v1
,
a2
,
STORMASK
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