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Commit 86a24899 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'stm32-dt-for-v5.12-1' of... 

Merge tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.12, round 1

Highlights:
----------

MCU part:
 -Rename mmc nodes to match with yaml validation.

MPU part:
 -Rename mmc nodes to match with yaml validation.
 -Move vdda1v1 & vdda1v8 (used by usbphyc) from boards files
  to SoC dtsi file.

 -LXA:
  -Fix leds schema for yaml validation.

 -DH:
  -Enable SDMMC1 internal pull-ups and disable CKIN feedabck clock
   on DHCOM.
  -Add SDMMC1 init state inorder to use some gpios during probing phase.
  -Disable KS8851 and FMC on PicoITX board.

* tag 'stm32-dt-for-v5.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add #clock-cells property to usbphyc node on stm32mp151
  ARM: dts: stm32: remove usbphyc ports vdda1v1 & vdda1v8 on stm32mp15 boards
  ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8 supplies on stm32mp151
  ARM: dts: stm32: Add STM32MP1 I2C6 SDA/SCL pinmux
  ARM: dts: stm32: Rename mmc controller nodes to mmc@
  ARM: dts: stm32: Enable voltage translator auto-detection on DHCOM
  ARM: dts: stm32: Add additional init state for SDMMC1 pins
  ARM: dts: stm32: Disable KS8851 and FMC on PicoITX board
  ARM: dts: stm32: Fix schema warnings for pwm-leds on lxa-mc1
  ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock on DHCOM
  ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
  ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
  ARM: dts: stm32: Fix GPIO hog names on DHCOM
  ARM: dts: stm32: Disable optional TSC2004 on DRC02 board
  ARM: dts: stm32: Disable WP on DHCOM uSD slot
  ARM: dts: stm32: Connect card-detect signal on DHCOM
  ARM: dts: stm32: Fix polarity of the DH DRC02 uSD card detect

Link: https://lore.kernel.org/r/5e8897a0-8f68-5e41-bfa0-ccdf1e23a3c1@foss.st.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents af911564 36be90f5
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Showing with 99 additions and 48 deletions
arch/arm/boot/dts/stm32f429.dtsi
View file @ 86a24899
......@@ -566,7 +566,7 @@ adc3: adc@200 {
};
};
sdio: sdio@40012c00 {
sdio: mmc@40012c00 {
compatible = "arm,pl180", "arm,primecell";
arm,primecell-periphid = <0x00880180>;
reg = <0x40012c00 0x400>;
......
arch/arm/boot/dts/stm32f746.dtsi
View file @ 86a24899
......@@ -473,7 +473,7 @@ usart6: serial@40011400 {
status = "disabled";
};
sdio2: sdio2@40011c00 {
sdio2: mmc@40011c00 {
compatible = "arm,pl180", "arm,primecell";
arm,primecell-periphid = <0x00880180>;
reg = <0x40011c00 0x400>;
......@@ -484,7 +484,7 @@ sdio2: sdio2@40011c00 {
status = "disabled";
};
sdio1: sdio1@40012c00 {
sdio1: mmc@40012c00 {
compatible = "arm,pl180", "arm,primecell";
arm,primecell-periphid = <0x00880180>;
reg = <0x40012c00 0x400>;
......
arch/arm/boot/dts/stm32h743.dtsi
View file @ 86a24899
......@@ -354,7 +354,7 @@ mdma1: dma-controller@52000000 {
dma-requests = <32>;
};
sdmmc1: sdmmc@52007000 {
sdmmc1: mmc@52007000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x10153180>;
reg = <0x52007000 0x1000>;
......
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
View file @ 86a24899
......@@ -1273,6 +1273,18 @@ pins3 {
};
};
sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
<STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
};
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
......@@ -1299,6 +1311,17 @@ pins2{
};
};
sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
......@@ -2018,6 +2041,23 @@ pins {
};
};
i2c6_pins_a: i2c6-0 {
pins {
pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
<STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
i2c6_sleep_pins_a: i2c6-sleep-0 {
pins {
pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
<STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */
};
};
spi1_pins_a: spi1-0 {
pins1 {
pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
......
arch/arm/boot/dts/stm32mp151.dtsi
View file @ 86a24899
......@@ -1047,7 +1047,7 @@ adc2: adc@100 {
};
};
sdmmc3: sdmmc@48004000 {
sdmmc3: mmc@48004000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00253180>;
reg = <0x48004000 0x400>;
......@@ -1368,7 +1368,7 @@ qspi: spi@58003000 {
status = "disabled";
};
sdmmc1: sdmmc@58005000 {
sdmmc1: mmc@58005000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00253180>;
reg = <0x58005000 0x1000>;
......@@ -1383,7 +1383,7 @@ sdmmc1: sdmmc@58005000 {
status = "disabled";
};
sdmmc2: sdmmc@58007000 {
sdmmc2: mmc@58007000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00253180>;
reg = <0x58007000 0x1000>;
......@@ -1482,10 +1482,13 @@ iwdg2: watchdog@5a002000 {
usbphyc: usbphyc@5a006000 {
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <0>;
compatible = "st,stm32mp1-usbphyc";
reg = <0x5a006000 0x1000>;
clocks = <&rcc USBPHY_K>;
resets = <&rcc USBPHY_R>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
status = "disabled";
usbphyc_port0: usb-phy@0 {
......
arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
View file @ 86a24899
......@@ -331,12 +331,8 @@ &usbphyc {
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
arch/arm/boot/dts/stm32mp157c-ed1.dts
View file @ 86a24899
......@@ -393,12 +393,8 @@ &usbotg_hs {
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
View file @ 86a24899
......@@ -36,34 +36,35 @@ chosen {
stdout-path = &uart4;
};
led-act {
led-controller-0 {
compatible = "gpio-leds";
led-green {
led-0 {
label = "mc1:green:act";
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
led-rgb {
led-controller-1 {
compatible = "pwm-leds";
led-red {
/* led-1 to led-3 are part of a single RGB led */
led-1 {
label = "mc1:red:rgb";
pwms = <&leds_pwm 1 1000000 0>;
max-brightness = <255>;
active-low;
};
led-green {
led-2 {
label = "mc1:green:rgb";
pwms = <&leds_pwm 2 1000000 0>;
max-brightness = <255>;
active-low;
};
led-blue {
led-3 {
label = "mc1:blue:rgb";
pwms = <&leds_pwm 3 1000000 0>;
max-brightness = <255>;
......
arch/arm/boot/dts/stm32mp15xx-dhcom-drc02.dtsi
View file @ 86a24899
......@@ -33,9 +33,9 @@ &gpiob {
* during TX anyway and that it only controls drive enable DE
* line. Hence, the RX is always enabled here.
*/
rs485-rx-en {
rs485-rx-en-hog {
gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>;
gpios = <8 0>;
output-low;
line-name = "rs485-rx-en";
};
......@@ -61,9 +61,9 @@ &gpioi {
* order to reset the Hub when USB bus is powered down, but
* so far there is no such functionality.
*/
usb-hub {
usb-hub-hog {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
gpios = <2 0>;
output-high;
line-name = "usb-hub-reset";
};
......@@ -87,6 +87,12 @@ eeprom@50 {
};
};
&i2c4 {
touchscreen@49 {
status = "disabled";
};
};
&i2c5 { /* TP7/TP8 */
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins_a>;
......@@ -104,7 +110,7 @@ &sdmmc3 {
* are used for on-board microSD slot instead.
*/
/delete-property/broken-cd;
cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
disable-wp;
};
......@@ -152,6 +158,4 @@ &usbphyc {
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi
View file @ 86a24899
......@@ -300,12 +300,8 @@ &usbphyc {
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
arch/arm/boot/dts/stm32mp15xx-dhcom-picoitx.dtsi
View file @ 86a24899
......@@ -36,6 +36,10 @@ &dac {
status = "disabled";
};
&fmc {
status = "disabled";
};
&gpioa {
/*
* NOTE: The USB Port on the PicoITX needs a PWR_EN signal to enable
......@@ -43,9 +47,9 @@ &gpioa {
* in order to turn on port power when USB bus is powered up, but so
* far there is no such functionality.
*/
usb-port-power {
usb-port-power-hog {
gpio-hog;
gpios = <13 GPIO_ACTIVE_LOW>;
gpios = <13 0>;
output-low;
line-name = "usb-port-power";
};
......@@ -94,6 +98,10 @@ &i2c5 { /* On board-to-board connector */
/delete-property/dma-names;
};
&ksz8851 {
status = "disabled";
};
&usart3 {
pinctrl-names = "default";
pinctrl-0 = <&usart3_pins_a>;
......@@ -132,12 +140,8 @@ &usbphyc {
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View file @ 86a24899
......@@ -386,19 +386,38 @@ &rtc {
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-names = "default", "opendrain", "sleep", "init";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
broken-cd;
pinctrl-3 = <&sdmmc1_b4_init_pins_a &sdmmc1_dir_init_pins_a>;
cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
st,cmd-gpios = <&gpiod 2 0>;
st,ck-gpios = <&gpioc 12 0>;
st,ckin-gpios = <&gpioe 4 0>;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
status = "okay";
};
&sdmmc1_b4_pins_a {
/*
* SD bus pull-up resistors:
* - optional on SoMs with SD voltage translator
* - mandatory on SoMs without SD voltage translator
*/
pins1 {
bias-pull-up;
};
pins2 {
bias-pull-up;
};
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
......
arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
View file @ 86a24899
......@@ -391,12 +391,8 @@ &usbphyc {
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View file @ 86a24899
......@@ -694,14 +694,10 @@ &usbphyc {
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&vrefbuf {
......
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