Commit 86c157b3 authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville

ath9k_hw: improve performance for AR934x v1.3+

AR934x v1.3 no longer needs the DCU backoff reduction workaround for
preventing rx overruns, but in turn needs the number of usable Tx
buffers to be reduced slightly.
Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent a37a9910
...@@ -1172,6 +1172,7 @@ u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan) ...@@ -1172,6 +1172,7 @@ u32 ath9k_regd_get_ctl(struct ath_regulatory *reg, struct ath9k_channel *chan)
static inline void ath9k_hw_set_dma(struct ath_hw *ah) static inline void ath9k_hw_set_dma(struct ath_hw *ah)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
int txbuf_size;
ENABLE_REGWRITE_BUFFER(ah); ENABLE_REGWRITE_BUFFER(ah);
...@@ -1225,13 +1226,17 @@ static inline void ath9k_hw_set_dma(struct ath_hw *ah) ...@@ -1225,13 +1226,17 @@ static inline void ath9k_hw_set_dma(struct ath_hw *ah)
* So set the usable tx buf size also to half to * So set the usable tx buf size also to half to
* avoid data/delimiter underruns * avoid data/delimiter underruns
*/ */
REG_WRITE(ah, AR_PCU_TXBUF_CTRL, txbuf_size = AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE;
AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE); } else if (AR_SREV_9340_13_OR_LATER(ah)) {
} else if (!AR_SREV_9271(ah)) { /* Uses fewer entries for AR934x v1.3+ to prevent rx overruns */
REG_WRITE(ah, AR_PCU_TXBUF_CTRL, txbuf_size = AR_9340_PCU_TXBUF_CTRL_USABLE_SIZE;
AR_PCU_TXBUF_CTRL_USABLE_SIZE); } else {
txbuf_size = AR_PCU_TXBUF_CTRL_USABLE_SIZE;
} }
if (!AR_SREV_9271(ah))
REG_WRITE(ah, AR_PCU_TXBUF_CTRL, txbuf_size);
REGWRITE_BUFFER_FLUSH(ah); REGWRITE_BUFFER_FLUSH(ah);
if (AR_SREV_9300_20_OR_LATER(ah)) if (AR_SREV_9300_20_OR_LATER(ah))
......
...@@ -410,7 +410,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q) ...@@ -410,7 +410,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ); REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ);
if (AR_SREV_9340(ah)) if (AR_SREV_9340(ah) && !AR_SREV_9340_13_OR_LATER(ah))
REG_WRITE(ah, AR_DMISC(q), REG_WRITE(ah, AR_DMISC(q),
AR_D_MISC_CW_BKOFF_EN | AR_D_MISC_FRAG_WAIT_EN | 0x1); AR_D_MISC_CW_BKOFF_EN | AR_D_MISC_FRAG_WAIT_EN | 0x1);
else else
......
...@@ -798,6 +798,10 @@ ...@@ -798,6 +798,10 @@
#define AR_SREV_REVISION_9485_10 0 #define AR_SREV_REVISION_9485_10 0
#define AR_SREV_REVISION_9485_11 1 #define AR_SREV_REVISION_9485_11 1
#define AR_SREV_VERSION_9340 0x300 #define AR_SREV_VERSION_9340 0x300
#define AR_SREV_REVISION_9340_10 0
#define AR_SREV_REVISION_9340_11 1
#define AR_SREV_REVISION_9340_12 2
#define AR_SREV_REVISION_9340_13 3
#define AR_SREV_VERSION_9580 0x1C0 #define AR_SREV_VERSION_9580 0x1C0
#define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */ #define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */
#define AR_SREV_VERSION_9462 0x280 #define AR_SREV_VERSION_9462 0x280
...@@ -897,6 +901,10 @@ ...@@ -897,6 +901,10 @@
#define AR_SREV_9340(_ah) \ #define AR_SREV_9340(_ah) \
(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9340)) (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9340))
#define AR_SREV_9340_13_OR_LATER(_ah) \
(AR_SREV_9340((_ah)) && \
((_ah)->hw_version.macRev >= AR_SREV_REVISION_9340_13))
#define AR_SREV_9285E_20(_ah) \ #define AR_SREV_9285E_20(_ah) \
(AR_SREV_9285_12_OR_LATER(_ah) && \ (AR_SREV_9285_12_OR_LATER(_ah) && \
((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1))
...@@ -1883,6 +1891,7 @@ enum { ...@@ -1883,6 +1891,7 @@ enum {
#define AR_PCU_TXBUF_CTRL_SIZE_MASK 0x7FF #define AR_PCU_TXBUF_CTRL_SIZE_MASK 0x7FF
#define AR_PCU_TXBUF_CTRL_USABLE_SIZE 0x700 #define AR_PCU_TXBUF_CTRL_USABLE_SIZE 0x700
#define AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE 0x380 #define AR_9285_PCU_TXBUF_CTRL_USABLE_SIZE 0x380
#define AR_9340_PCU_TXBUF_CTRL_USABLE_SIZE 0x500
#define AR_PCU_MISC_MODE2 0x8344 #define AR_PCU_MISC_MODE2 0x8344
#define AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE 0x00000002 #define AR_PCU_MISC_MODE2_MGMT_CRYPTO_ENABLE 0x00000002
......
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