Commit 86feafeb authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Kukjin Kim

ARM: dts: use macros in clock bindings for exynos5440

The patch replaces magic numbers with macros defined in DT header
in exynos5440 clock bindings.
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Acked-by: default avatarTomasz Figa <t.figa@samsung.com>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 1dd4e599
......@@ -12,45 +12,12 @@ Required Properties:
- #clock-cells: should be 1.
The following is the list of clocks generated by the controller. Each clock is
assigned an identifier and client nodes use this identifier to specify the
clock which they consume.
[Core Clocks]
Clock ID
----------------------------
xtal 1
arm_clk 2
[Peripheral Clock Gates]
Clock ID
----------------------------
spi_baud 16
pb0_250 17
pr0_250 18
pr1_250 19
b_250 20
b_125 21
b_200 22
sata 23
usb 24
gmac0 25
cs250 26
pb0_250_o 27
pr0_250_o 28
pr1_250_o 29
b_250_o 30
b_125_o 31
b_200_o 32
sata_o 33
usb_o 34
gmac0_o 35
cs250_o 36
Each clock is assigned an identifier and client nodes can use this identifier
to specify the clock which they consume.
All available clocks are defined as preprocessor macros in
dt-bindings/clock/exynos5440.h header and can be used in device
tree sources.
Example: An example of a clock controller node is listed below.
......
......@@ -9,6 +9,7 @@
* published by the Free Software Foundation.
*/
#include <dt-bindings/clock/exynos5440.h>
#include "skeleton.dtsi"
/ {
......@@ -105,7 +106,7 @@ serial@B0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xB0000 0x1000>;
interrupts = <0 2 0>;
clocks = <&clock 21>, <&clock 21>;
clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
clock-names = "uart", "clk_uart_baud0";
};
......@@ -113,7 +114,7 @@ serial@C0000 {
compatible = "samsung,exynos4210-uart";
reg = <0xC0000 0x1000>;
interrupts = <0 3 0>;
clocks = <&clock 21>, <&clock 21>;
clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
clock-names = "uart", "clk_uart_baud0";
};
......@@ -125,7 +126,7 @@ spi_0: spi@D0000 {
#size-cells = <0>;
samsung,spi-src-clk = <0>;
num-cs = <1>;
clocks = <&clock 21>, <&clock 16>;
clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
clock-names = "spi", "spi_busclk0";
};
......@@ -161,7 +162,7 @@ i2c@F0000 {
interrupts = <0 5 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 21>;
clocks = <&clock CLK_B_125>;
clock-names = "i2c";
};
......@@ -171,7 +172,7 @@ i2c@100000 {
interrupts = <0 6 0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock 21>;
clocks = <&clock CLK_B_125>;
clock-names = "i2c";
};
......@@ -179,7 +180,7 @@ watchdog {
compatible = "samsung,s3c2410-wdt";
reg = <0x110000 0x1000>;
interrupts = <0 1 0>;
clocks = <&clock 21>;
clocks = <&clock CLK_B_125>;
clock-names = "watchdog";
};
......@@ -190,7 +191,7 @@ gmac: ethernet@00230000 {
interrupts = <0 31 4>;
interrupt-names = "macirq";
phy-mode = "sgmii";
clocks = <&clock 25>;
clocks = <&clock CLK_GMAC0>;
clock-names = "stmmaceth";
};
......@@ -206,7 +207,7 @@ rtc {
compatible = "samsung,s3c6410-rtc";
reg = <0x130000 0x1000>;
interrupts = <0 17 0>, <0 16 0>;
clocks = <&clock 21>;
clocks = <&clock CLK_B_125>;
clock-names = "rtc";
};
......@@ -214,7 +215,7 @@ tmuctrl_0: tmuctrl@160118 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160118 0x230>, <0x160368 0x10>;
interrupts = <0 58 0>;
clocks = <&clock 21>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
};
......@@ -222,7 +223,7 @@ tmuctrl_1: tmuctrl@16011C {
compatible = "samsung,exynos5440-tmu";
reg = <0x16011C 0x230>, <0x160368 0x10>;
interrupts = <0 58 0>;
clocks = <&clock 21>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
};
......@@ -230,7 +231,7 @@ tmuctrl_2: tmuctrl@160120 {
compatible = "samsung,exynos5440-tmu";
reg = <0x160120 0x230>, <0x160368 0x10>;
interrupts = <0 58 0>;
clocks = <&clock 21>;
clocks = <&clock CLK_B_125>;
clock-names = "tmu_apbif";
};
......@@ -238,7 +239,7 @@ sata@210000 {
compatible = "snps,exynos5440-ahci";
reg = <0x210000 0x10000>;
interrupts = <0 30 0>;
clocks = <&clock 23>;
clocks = <&clock CLK_SATA>;
clock-names = "sata";
};
......@@ -246,7 +247,7 @@ ohci@220000 {
compatible = "samsung,exynos5440-ohci";
reg = <0x220000 0x1000>;
interrupts = <0 29 0>;
clocks = <&clock 24>;
clocks = <&clock CLK_USB>;
clock-names = "usbhost";
};
......@@ -254,7 +255,7 @@ ehci@221000 {
compatible = "samsung,exynos5440-ehci";
reg = <0x221000 0x1000>;
interrupts = <0 29 0>;
clocks = <&clock 24>;
clocks = <&clock CLK_USB>;
clock-names = "usbhost";
};
......@@ -264,7 +265,7 @@ pcie@290000 {
0x270000 0x1000
0x271000 0x40>;
interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
clocks = <&clock 28>, <&clock 27>;
clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
clock-names = "pcie", "pcie_bus";
#address-cells = <3>;
#size-cells = <2>;
......@@ -285,7 +286,7 @@ pcie@2a0000 {
0x272000 0x1000
0x271040 0x40>;
interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
clocks = <&clock 29>, <&clock 27>;
clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
clock-names = "pcie", "pcie_bus";
#address-cells = <3>;
#size-cells = <2>;
......
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