Commit 886bdf9c authored by Huisong Li's avatar Huisong Li Committed by Wei Xu

soc: hisilicon: Support HCCS driver on Kunpeng SoC

The Huawei Cache Coherence System (HCCS) is a multi-chip interconnection
bus protocol. This driver is aimed to support some features about HCCS on
Kunpeng SoC, like, querying the health status of HCCS.

This patch adds the probing of HCCS driver, and obtains all HCCS port
information by the dimension of chip and die on platform.
Signed-off-by: default avatarHuisong Li <lihuisong@huawei.com>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent 06c2afb8
......@@ -9307,6 +9307,12 @@ W: https://www.hisilicon.com
F: Documentation/devicetree/bindings/i2c/hisilicon,ascend910-i2c.yaml
F: drivers/i2c/busses/i2c-hisi.c
HISILICON KUNPENG SOC HCCS DRIVER
M: Huisong Li <lihuisong@huawei.com>
S: Maintained
F: drivers/soc/hisilicon/kunpeng_hccs.c
F: drivers/soc/hisilicon/kunpeng_hccs.h
HISILICON LPC BUS DRIVER
M: Jay Fang <f.fangjian@huawei.com>
S: Maintained
......
......@@ -10,6 +10,7 @@ source "drivers/soc/bcm/Kconfig"
source "drivers/soc/canaan/Kconfig"
source "drivers/soc/fsl/Kconfig"
source "drivers/soc/fujitsu/Kconfig"
source "drivers/soc/hisilicon/Kconfig"
source "drivers/soc/imx/Kconfig"
source "drivers/soc/ixp4xx/Kconfig"
source "drivers/soc/litex/Kconfig"
......
......@@ -14,6 +14,7 @@ obj-$(CONFIG_MACH_DOVE) += dove/
obj-y += fsl/
obj-y += fujitsu/
obj-$(CONFIG_ARCH_GEMINI) += gemini/
obj-y += hisilicon/
obj-y += imx/
obj-y += ixp4xx/
obj-$(CONFIG_SOC_XWAY) += lantiq/
......
# SPDX-License-Identifier: GPL-2.0-only
menu "Hisilicon SoC drivers"
depends on ARCH_HISI || COMPILE_TEST
config KUNPENG_HCCS
tristate "HCCS driver on Kunpeng SoC"
depends on ACPI
depends on ARM64 || COMPILE_TEST
help
The Huawei Cache Coherence System (HCCS) is a multi-chip
interconnection bus protocol.
The performance of application may be affected if some HCCS
ports are not in full lane status, have a large number of CRC
errors and so on.
Say M here if you want to include support for querying the
health status and port information of HCCS on Kunpeng SoC.
endmenu
# SPDX-License-Identifier: GPL-2.0-only
obj-$(CONFIG_KUNPENG_HCCS) += kunpeng_hccs.o
This diff is collapsed.
/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (c) 2023 Hisilicon Limited. */
#ifndef __KUNPENG_HCCS_H__
#define __KUNPENG_HCCS_H__
/*
* |--------------- Chip0 ---------------|---------------- ChipN -------------|
* |--------Die0-------|--------DieN-------|--------Die0-------|-------DieN-------|
* | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 |P0 | P1 | P2 | P3 |
*/
/*
* This value cannot be 255, otherwise the loop of the multi-BD communication
* case cannot end.
*/
#define HCCS_DIE_MAX_PORT_ID 254
struct hccs_port_info {
u8 port_id;
u8 port_type;
u8 lane_mode;
bool enable; /* if the port is enabled */
struct hccs_die_info *die; /* point to the die the port is located */
};
struct hccs_die_info {
u8 die_id;
u8 port_num;
u8 min_port_id;
u8 max_port_id;
struct hccs_port_info *ports;
struct hccs_chip_info *chip; /* point to the chip the die is located */
};
struct hccs_chip_info {
u8 chip_id;
u8 die_num;
struct hccs_die_info *dies;
struct hccs_dev *hdev;
};
struct hccs_mbox_client_info {
struct mbox_client client;
struct mbox_chan *mbox_chan;
struct pcc_mbox_chan *pcc_chan;
u64 deadline_us;
void *pcc_comm_addr;
};
struct hccs_dev {
struct device *dev;
struct acpi_device *acpi_dev;
u64 caps;
u8 chip_num;
struct hccs_chip_info *chips;
u8 chan_id;
struct mutex lock;
struct hccs_mbox_client_info cl_info;
};
#define HCCS_SERDES_MODULE_CODE 0x32
enum hccs_subcmd_type {
HCCS_GET_CHIP_NUM = 0x1,
HCCS_GET_DIE_NUM,
HCCS_GET_DIE_INFO,
HCCS_GET_DIE_PORT_INFO,
HCCS_GET_DEV_CAP,
HCCS_GET_PORT_LINK_STATUS,
HCCS_GET_PORT_CRC_ERR_CNT,
HCCS_GET_DIE_PORTS_LANE_STA,
HCCS_GET_DIE_PORTS_LINK_STA,
HCCS_GET_DIE_PORTS_CRC_ERR_CNT,
HCCS_SUB_CMD_MAX = 255,
};
struct hccs_die_num_req_param {
u8 chip_id;
};
struct hccs_die_info_req_param {
u8 chip_id;
u8 die_idx;
};
struct hccs_die_info_rsp_data {
u8 die_id;
u8 port_num;
u8 min_port_id;
u8 max_port_id;
};
struct hccs_port_attr {
u8 port_id;
u8 port_type;
u8 lane_mode;
u8 enable : 1; /* if the port is enabled */
u16 rsv[2];
};
/*
* The common command request for getting the information of all HCCS port on
* specified DIE.
*/
struct hccs_die_comm_req_param {
u8 chip_id;
u8 die_id; /* id in hardware */
};
struct hccs_req_head {
u8 module_code; /* set to 0x32 for serdes */
u8 start_id;
u8 rsv[2];
};
struct hccs_rsp_head {
u8 data_len;
u8 next_id;
u8 rsv[2];
};
struct hccs_fw_inner_head {
u8 retStatus; /* 0: success, other: failure */
u8 rsv[7];
};
#define HCCS_PCC_SHARE_MEM_BYTES 64
#define HCCS_FW_INNER_HEAD_BYTES 8
#define HCCS_RSP_HEAD_BYTES 4
#define HCCS_MAX_RSP_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \
HCCS_FW_INNER_HEAD_BYTES - \
HCCS_RSP_HEAD_BYTES)
#define HCCS_MAX_RSP_DATA_SIZE_MAX (HCCS_MAX_RSP_DATA_BYTES / 4)
/*
* Note: Actual available size of data field also depands on the PCC header
* bytes of the specific type. Driver needs to copy the response data in the
* communication space based on the real length.
*/
struct hccs_rsp_desc {
struct hccs_fw_inner_head fw_inner_head; /* 8 Bytes */
struct hccs_rsp_head rsp_head; /* 4 Bytes */
u32 data[HCCS_MAX_RSP_DATA_SIZE_MAX];
};
#define HCCS_REQ_HEAD_BYTES 4
#define HCCS_MAX_REQ_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \
HCCS_REQ_HEAD_BYTES)
#define HCCS_MAX_REQ_DATA_SIZE_MAX (HCCS_MAX_REQ_DATA_BYTES / 4)
/*
* Note: Actual available size of data field also depands on the PCC header
* bytes of the specific type. Driver needs to copy the request data to the
* communication space based on the real length.
*/
struct hccs_req_desc {
struct hccs_req_head req_head; /* 4 Bytes */
u32 data[HCCS_MAX_REQ_DATA_SIZE_MAX];
};
struct hccs_desc {
union {
struct hccs_req_desc req;
struct hccs_rsp_desc rsp;
};
};
#endif /* __KUNPENG_HCCS_H__ */
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