Commit 8c11f5a2 authored by Juston Li's avatar Juston Li Committed by Greg Kroah-Hartman

staging: sm750fb: add space before open brace

Fixes checkpatch.pl error:
ERROR: space required before the open brace '{'
Signed-off-by: default avatarJuston Li <juston.h.li@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b68a17a2
......@@ -132,7 +132,7 @@ static void setDisplayControl(int ctrl, int dispState)
static void waitNextVerticalSync(int ctrl, int delay)
{
unsigned int status;
if (!ctrl){
if (!ctrl) {
/* primary controller */
/* Do not wait when the Primary PLL is off or display control is already off.
......@@ -166,7 +166,7 @@ static void waitNextVerticalSync(int ctrl, int delay)
while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE);
}
}else{
}else {
/* Do not wait when the Primary PLL is off or display control is already off.
This will prevent the software to wait forever. */
......@@ -233,14 +233,14 @@ static void swPanelPowerSequence(int disp, int delay)
void ddk750_setLogicalDispOut(disp_output_t output)
{
unsigned int reg;
if (output & PNL_2_USAGE){
if (output & PNL_2_USAGE) {
/* set panel path controller select */
reg = PEEK32(PANEL_DISPLAY_CTRL);
reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, SELECT, (output & PNL_2_MASK)>>PNL_2_OFFSET);
POKE32(PANEL_DISPLAY_CTRL, reg);
}
if (output & CRT_2_USAGE){
if (output & CRT_2_USAGE) {
/* set crt path controller select */
reg = PEEK32(CRT_DISPLAY_CTRL);
reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET);
......@@ -250,17 +250,17 @@ void ddk750_setLogicalDispOut(disp_output_t output)
}
if (output & PRI_TP_USAGE){
if (output & PRI_TP_USAGE) {
/* set primary timing and plane en_bit */
setDisplayControl(0, (output&PRI_TP_MASK)>>PRI_TP_OFFSET);
}
if (output & SEC_TP_USAGE){
if (output & SEC_TP_USAGE) {
/* set secondary timing and plane en_bit*/
setDisplayControl(1, (output&SEC_TP_MASK)>>SEC_TP_OFFSET);
}
if (output & PNL_SEQ_USAGE){
if (output & PNL_SEQ_USAGE) {
/* set panel sequence */
swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET, 4);
}
......
......@@ -107,9 +107,9 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
FIELD_SET(0, CRT_DISPLAY_CTRL, PLANE, ENABLE);
if (getChipType() == SM750LE){
if (getChipType() == SM750LE) {
displayControlAdjust_SM750LE(pModeParam, ulTmpValue);
}else{
}else {
ulReg = PEEK32(CRT_DISPLAY_CTRL)
& FIELD_CLEAR(CRT_DISPLAY_CTRL, VSYNC_PHASE)
& FIELD_CLEAR(CRT_DISPLAY_CTRL, HSYNC_PHASE)
......@@ -179,7 +179,7 @@ static int programModeRegisters(mode_parameter_t *pModeParam, pll_value_t *pll)
}
#endif
}
else{
else {
ret = -1;
}
return ret;
......@@ -193,7 +193,7 @@ int ddk750_setModeTiming(mode_parameter_t *parm, clock_type_t clock)
pll.clockType = clock;
uiActualPixelClk = calcPllValue(parm->pixel_clock, &pll);
if (getChipType() == SM750LE){
if (getChipType() == SM750LE) {
/* set graphic mode via IO method */
outb_p(0x88, 0x3d4);
outb_p(0x06, 0x3d5);
......
......@@ -5,10 +5,10 @@
void ddk750_setDPMS(DPMS_t state)
{
unsigned int value;
if (getChipType() == SM750LE){
if (getChipType() == SM750LE) {
value = PEEK32(CRT_DISPLAY_CTRL);
POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(value, CRT_DISPLAY_CTRL, DPMS, state));
}else{
}else {
value = PEEK32(SYSTEM_CTRL);
value= FIELD_VALUE(value, SYSTEM_CTRL, DPMS, state);
POKE32(SYSTEM_CTRL, value);
......
......@@ -248,7 +248,7 @@ unsigned int rop2) /* ROP value */
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel conversion.
*/
if (Bpp == 3){
if (Bpp == 3) {
sx *= 3;
dx *= 3;
width *= 3;
......@@ -271,7 +271,7 @@ unsigned int rop2) /* ROP value */
FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) |
FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp))); /* dpr3c */
if (accel->de_wait() != 0){
if (accel->de_wait() != 0) {
return -1;
}
......@@ -363,7 +363,7 @@ int hw_imageblit(struct lynx_accel *accel,
Note that input pitch is BYTE value, but the 2D Pitch register uses
pixel values. Need Byte to pixel conversion.
*/
if (bytePerPixel == 3){
if (bytePerPixel == 3) {
dx *= 3;
width *= 3;
startBit *= 3;
......
......@@ -143,14 +143,14 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
if (opr & (0x80 >> j))
{ /* use fg color,id = 2 */
data |= 2 << (j*2);
}else{
}else {
/* use bg color,id = 1 */
data |= 1 << (j*2);
}
}
#else
for (j=0;j<8;j++){
if (mask & (0x80>>j)){
for (j=0;j<8;j++) {
if (mask & (0x80>>j)) {
if (rop == ROP_XOR)
opr = mask ^ color;
else
......@@ -173,7 +173,7 @@ void hw_cursor_setData(struct lynx_cursor *cursor,
/* need a return */
pstart += offset;
pbuffer = pstart;
}else{
}else {
pbuffer += sizeof(u16);
}
......@@ -223,13 +223,13 @@ void hw_cursor_setData2(struct lynx_cursor *cursor,
if (opr & (0x80 >> j))
{ /* use fg color,id = 2 */
data |= 2 << (j*2);
}else{
}else {
/* use bg color,id = 1 */
data |= 1 << (j*2);
}
}
#else
for (j=0;j<8;j++){
for (j=0;j<8;j++) {
if (mask & (1<<j))
data |= ((color & (1<<j))?1:2)<<(j*2);
}
......@@ -242,7 +242,7 @@ void hw_cursor_setData2(struct lynx_cursor *cursor,
/* need a return */
pstart += offset;
pbuffer = pstart;
}else{
}else {
pbuffer += sizeof(u16);
}
......
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