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Commit 8c5ce909 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'imx-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt 

i.MX ARM device tree for 6.8:

- A bunch of changes from Fabio Estevam cleaning up dt-schema warnings.
- A number of i.MX7 related small fixes and peripheral addition from
  Alexander Stein.
- A set of changes from Hiago De Franco adding usdhc aliases for Apalis
  and Colibri boards.
- A white-space cleanup from Krzysztof Kozlowski.
- A change from Linus Walleij to correct errors in the Marvell MV88E6xxx
  switch descriptions.
- Fix a couple of typo in comment for MBA6 and MBA6ULX board.
- Add on-chip memory and enable MIPI-DSI support for i.MX7.
- Add LM75A sensor for TQMA7 board.

* tag 'imx-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits)
  ARM: dts: imx27-phytec-phycore-som: Use 'rtc' as node name
  ARM: dts: imx25: Remove unneeded keypad properties
  ARM: dts: imx23/28: Fix the DMA controller node name
  ARM: dts: imx23-sansa: Use preferred i2c-gpios properties
  ARM: dts: imx27-apf27dev: Fix LED name
  ARM: dts: imx25/27: Pass timing0
  ARM: dts: imx25: Fix the iim compatible string
  ARM: dts: imx25: Move usbphy nodes out of simple-bus
  ARM: dts: imx1: Use 'bus' for AIPI bus
  ARM: dts: imx27-phytec-phycore-rdk: Move usbphy nodes out of simple-bus
  ARM: dts: imx27-pdk: Move usbphy0 out of simple-bus
  ARM: dts: imx27: Use 'bus' for EMI bus
  ARM: dts: imx27: Use 'bus' for AIPI bus
  ARM: dts: imx27-phytec-phycore-som: Use the mux- prefix
  ARM: dts: imx1: Fix sram node
  ARM: dts: imx27: Fix sram node
  ARM: dts: imx: Use flash@0,0 pattern
  ARM: dts: imx25/27-eukrea: Fix RTC node name
  ARM: dts: imx25-pdk: Pass #sound-dai-cells
  ARM: dts: imx25: Pass I2C clock-names property
  ...

Link: https://lore.kernel.org/r/20231216064605.876196-4-shawnguo@kernel.orgSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents e802ed9e 47360e40
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arch/arm/boot/dts/nxp/imx/imx1-ads.dts
View file @ 8c5ce909
......@@ -65,7 +65,7 @@ &weim {
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <4>;
......
arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts
View file @ 8c5ce909
......@@ -45,7 +45,7 @@ &weim {
pinctrl-0 = <&pinctrl_weim>;
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <2>;
......
arch/arm/boot/dts/nxp/imx/imx1.dtsi
View file @ 8c5ce909
......@@ -68,7 +68,7 @@ soc {
interrupt-parent = <&aitc>;
ranges;
aipi@200000 {
bus@200000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -155,7 +155,7 @@ uart3: serial@20a000 {
};
};
aipi@210000 {
bus@210000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -268,9 +268,12 @@ weim: weim@220000 {
status = "disabled";
};
esram: esram@300000 {
esram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x20000>;
ranges = <0 0x00300000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
};
};
};
arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi
View file @ 8c5ce909
......@@ -27,7 +27,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pcf8563@51 {
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
......
arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
View file @ 8c5ce909
......@@ -16,7 +16,7 @@ cmo_qvga: display {
bus-width = <18>;
display-timings {
native-mode = <&qvga_timings>;
qvga_timings: 320x240 {
qvga_timings: timing0 {
clock-frequency = <6500000>;
hactive = <320>;
vactive = <240>;
......
arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts
View file @ 8c5ce909
......@@ -16,7 +16,7 @@ dvi_svga: display {
bus-width = <18>;
display-timings {
native-mode = <&dvi_svga_timings>;
dvi_svga_timings: 800x600 {
dvi_svga_timings: timing0 {
clock-frequency = <40000000>;
hactive = <800>;
vactive = <600>;
......
arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dts
View file @ 8c5ce909
......@@ -16,7 +16,7 @@ dvi_vga: display {
bus-width = <18>;
display-timings {
native-mode = <&dvi_vga_timings>;
dvi_vga_timings: 640x480 {
dvi_vga_timings: timing0 {
clock-frequency = <31250000>;
hactive = <640>;
vactive = <480>;
......
arch/arm/boot/dts/nxp/imx/imx25-pdk.dts
View file @ 8c5ce909
......@@ -68,7 +68,7 @@ wvga: display {
bus-width = <18>;
display-timings {
native-mode = <&wvga_timings>;
wvga_timings: 640x480 {
wvga_timings: timing0 {
hactive = <640>;
vactive = <480>;
hback-porch = <45>;
......@@ -122,6 +122,7 @@ &i2c1 {
codec: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
clocks = <&clks 129>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
......
arch/arm/boot/dts/nxp/imx/imx25.dtsi
View file @ 8c5ce909
......@@ -68,6 +68,16 @@ osc {
};
};
usbphy0: usb-phy0 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
usbphy1: usb-phy1 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -93,7 +103,7 @@ i2c1: i2c@43f80000 {
compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
reg = <0x43f80000 0x4000>;
clocks = <&clks 48>;
clock-names = "";
clock-names = "ipg";
interrupts = <3>;
status = "disabled";
};
......@@ -104,7 +114,7 @@ i2c3: i2c@43f84000 {
compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
reg = <0x43f84000 0x4000>;
clocks = <&clks 48>;
clock-names = "";
clock-names = "ipg";
interrupts = <10>;
status = "disabled";
};
......@@ -151,7 +161,7 @@ i2c2: i2c@43f98000 {
compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
reg = <0x43f98000 0x4000>;
clocks = <&clks 48>;
clock-names = "";
clock-names = "ipg";
interrupts = <4>;
status = "disabled";
};
......@@ -178,12 +188,9 @@ spi1: spi@43fa4000 {
};
kpp: kpp@43fa8000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
reg = <0x43fa8000 0x4000>;
clocks = <&clks 102>;
clock-names = "";
interrupts = <24>;
status = "disabled";
};
......@@ -542,7 +549,7 @@ pwm1: pwm@53fe0000 {
};
iim: efuse@53ff0000 {
compatible = "fsl,imx25-iim", "fsl,imx27-iim";
compatible = "fsl,imx25-iim";
reg = <0x53ff0000 0x4000>;
interrupts = <19>;
clocks = <&clks 99>;
......@@ -597,7 +604,7 @@ iram: sram@78000000 {
#size-cells = <1>;
};
emi@80000000 {
bus@80000000 {
compatible = "fsl,emi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -617,22 +624,4 @@ nfc: nand@bb000000 {
};
};
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usb-phy@0 {
reg = <0>;
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
usbphy1: usb-phy@1 {
reg = <1>;
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
};
};
arch/arm/boot/dts/nxp/imx/imx27-apf27dev.dts
View file @ 8c5ce909
......@@ -16,7 +16,7 @@ display: display {
fsl,pcr = <0xfae80083>; /* non-standard but required */
display-timings {
native-mode = <&timing0>;
timing0: 800x480 {
timing0: timing0 {
clock-frequency = <33000033>;
hactive = <800>;
vactive = <480>;
......@@ -47,7 +47,7 @@ leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
user {
led-user {
label = "Heartbeat";
gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
......
arch/arm/boot/dts/nxp/imx/imx27-eukrea-cpuimx27.dtsi
View file @ 8c5ce909
......@@ -33,7 +33,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pcf8563@51 {
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
......@@ -90,7 +90,7 @@ &usbotg {
&weim {
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
......
arch/arm/boot/dts/nxp/imx/imx27-eukrea-mbimxsd27-baseboard.dts
View file @ 8c5ce909
......@@ -16,7 +16,7 @@ display0: CMO-QVGA {
display-timings {
native-mode = <&timing0>;
timing0: 320x240 {
timing0: timing0 {
clock-frequency = <6500000>;
hactive = <320>;
vactive = <240>;
......
arch/arm/boot/dts/nxp/imx/imx27-pdk.dts
View file @ 8c5ce909
......@@ -14,18 +14,12 @@ memory@a0000000 {
reg = <0xa0000000 0x08000000>;
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usbphy@0 {
compatible = "usb-nop-xceiv";
reg = <0>;
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
usbphy0: usbphy {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
};
......
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-rdk.dts
View file @ 8c5ce909
......@@ -19,7 +19,7 @@ display: display {
fsl,pcr = <0xf0c88080>; /* non-standard but required */
display-timings {
native-mode = <&timing0>;
timing0: 640x480 {
timing0: timing0 {
hactive = <640>;
vactive = <480>;
hback-porch = <112>;
......
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts
View file @ 8c5ce909
......@@ -19,7 +19,7 @@ display0: LQ035Q7 {
display-timings {
native-mode = <&timing0>;
timing0: 240x320 {
timing0: timing0 {
clock-frequency = <5500000>;
hactive = <240>;
vactive = <320>;
......@@ -48,15 +48,12 @@ regulator-2 {
regulator-always-on;
};
usbphy {
usbphy2: usbphy@2 {
compatible = "usb-nop-xceiv";
reg = <2>;
vcc-supply = <&reg_5v0>;
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
usbphy2: usbphy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_5v0>;
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
};
......
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-som.dtsi
View file @ 8c5ce909
......@@ -29,19 +29,13 @@ reg_5v0: regulator-1 {
regulator-max-microvolt = <5000000>;
};
usbphy {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usbphy@0 {
compatible = "usb-nop-xceiv";
reg = <0>;
vcc-supply = <&sw3_reg>;
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
usbphy0: usbphy {
compatible = "usb-nop-xceiv";
vcc-supply = <&sw3_reg>;
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
};
......@@ -49,12 +43,12 @@ &audmux {
status = "okay";
/* SSI0 <=> PINS_4 (MC13783 Audio) */
ssi0 {
mux-ssi0 {
fsl,audmux-port = <0>;
fsl,port-config = <0xcb205000>;
};
pins4 {
mux-pins4 {
fsl,audmux-port = <2>;
fsl,port-config = <0x00001000>;
};
......@@ -186,7 +180,7 @@ eeprom@52 {
reg = <0x52>;
};
pcf8563@51 {
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
......@@ -314,7 +308,7 @@ &usbotg {
&weim {
status = "okay";
nor: nor@0,0 {
nor: flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <2>;
......
arch/arm/boot/dts/nxp/imx/imx27.dtsi
View file @ 8c5ce909
......@@ -81,7 +81,7 @@ soc: soc {
interrupt-parent = <&aitc>;
ranges;
aipi1: aipi@10000000 { /* AIPI1 */
aipi1: bus@10000000 { /* AIPI1 */
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -453,7 +453,7 @@ gpt6: timer@1001f000 {
};
};
aipi2: aipi@10020000 { /* AIPI2 */
aipi2: bus@10020000 { /* AIPI2 */
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
......@@ -588,6 +588,9 @@ weim: weim@d8002000 {
iram: sram@ffff4c00 {
compatible = "mmio-sram";
reg = <0xffff4c00 0xb400>;
ranges = <0 0xffff4c00 0xb400>;
#address-cells = <1>;
#size-cells = <1>;
};
};
};
arch/arm/boot/dts/nxp/imx/imx53-cx9020.dts
View file @ 8c5ce909
......@@ -22,7 +22,7 @@ memory@70000000 {
};
display-0 {
#address-cells =<1>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24";
......
arch/arm/boot/dts/nxp/imx/imx6dl-b105pv2.dts
View file @ 8c5ce909
......@@ -22,7 +22,7 @@ touchscreen@41 {
compatible = "ilitek,ili251x";
reg = <0x41>;
pinctrl-names = "default";
pinctrl-0 =<&pinctrl_q7_gpio0>;
pinctrl-0 = <&pinctrl_q7_gpio0>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&tca6424a 21 GPIO_ACTIVE_LOW>;
......
arch/arm/boot/dts/nxp/imx/imx6dl-b105v2.dts
View file @ 8c5ce909
......@@ -22,7 +22,7 @@ touchscreen@41 {
compatible = "ilitek,ili251x";
reg = <0x41>;
pinctrl-names = "default";
pinctrl-0 =<&pinctrl_q7_gpio0>;
pinctrl-0 = <&pinctrl_q7_gpio0>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&tca6424a 21 GPIO_ACTIVE_LOW>;
......
arch/arm/boot/dts/nxp/imx/imx6dl-b125pv2.dts
View file @ 8c5ce909
......@@ -22,7 +22,7 @@ touchscreen@2a {
compatible = "eeti,exc80h60";
reg = <0x2a>;
pinctrl-names = "default";
pinctrl-0 =<&pinctrl_q7_gpio0>;
pinctrl-0 = <&pinctrl_q7_gpio0>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tca6424a 21 GPIO_ACTIVE_HIGH>;
......
arch/arm/boot/dts/nxp/imx/imx6dl-b125v2.dts
View file @ 8c5ce909
......@@ -22,7 +22,7 @@ touchscreen@2a {
compatible = "eeti,exc80h60";
reg = <0x2a>;
pinctrl-names = "default";
pinctrl-0 =<&pinctrl_q7_gpio0>;
pinctrl-0 = <&pinctrl_q7_gpio0>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tca6424a 21 GPIO_ACTIVE_HIGH>;
......
arch/arm/boot/dts/nxp/imx/imx6dl-b155v2.dts
View file @ 8c5ce909
......@@ -22,7 +22,7 @@ touchscreen@2a {
compatible = "eeti,exc80h84";
reg = <0x2a>;
pinctrl-names = "default";
pinctrl-0 =<&pinctrl_q7_gpio0>;
pinctrl-0 = <&pinctrl_q7_gpio0>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
touchscreen-inverted-x;
......
arch/arm/boot/dts/nxp/imx/imx6q-apalis-ixora-v1.2.dts
View file @ 8c5ce909
......@@ -76,6 +76,7 @@ reg_can1_supply: regulator-can1-supply {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enable_can1_power>;
regulator-name = "can1_supply";
startup-delay-us = <1000>;
};
reg_can2_supply: regulator-can2-supply {
......@@ -85,6 +86,7 @@ reg_can2_supply: regulator-can2-supply {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enable_can2_power>;
regulator-name = "can2_supply";
startup-delay-us = <1000>;
};
};
......
arch/arm/boot/dts/nxp/imx/imx6q-var-mx6customboard.dts
View file @ 8c5ce909
......@@ -16,7 +16,7 @@ / {
compatible = "variscite,mx6customboard", "variscite,var-som-imx6q", "fsl,imx6q";
panel0: lvds-panel0 {
compatible = "panel-lvds";
compatible = "panel-lvds";
backlight = <&backlight_lvds>;
width-mm = <152>;
height-mm = <91>;
......@@ -43,7 +43,7 @@ panel_in_lvds0: endpoint {
};
panel1: lvds-panel1 {
compatible = "panel-lvds";
compatible = "panel-lvds";
width-mm = <152>;
height-mm = <91>;
data-mapping = "jeida-18";
......
arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi
View file @ 8c5ce909
......@@ -12,6 +12,13 @@ / {
model = "Toradex Apalis iMX6Q/D Module";
compatible = "toradex,apalis_imx6q", "fsl,imx6q";
aliases {
mmc0 = &usdhc3; /* eMMC */
mmc1 = &usdhc1; /* MMC1 slot */
mmc2 = &usdhc2; /* SD1 slot */
/delete-property/ mmc3;
};
/* Will be filled by the bootloader */
memory@10000000 {
device_type = "memory";
......@@ -166,7 +173,7 @@ reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub {
reg_usb_host_vbus: regulator-usb-host-vbus {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
regulator-max-microvolt = <5000000>;
......
arch/arm/boot/dts/nxp/imx/imx6qdl-colibri.dtsi
View file @ 8c5ce909
......@@ -12,6 +12,13 @@ / {
model = "Toradex Colibri iMX6DL/S Module";
compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";
aliases {
mmc0 = &usdhc3; /* eMMC */
mmc1 = &usdhc1; /* MMC/SD Slot */
/delete-property/ mmc2;
/delete-property/ mmc3;
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <0 45 63 88 119 158 203 255>;
......
arch/arm/boot/dts/nxp/imx/imx6qdl-emcon-avari.dtsi
View file @ 8c5ce909
......@@ -54,7 +54,7 @@ reg_usb_otg: reg-otgvbus {
clk_codec: clock-codec {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12000000>;
clock-frequency = <12000000>;
};
sound {
......
arch/arm/boot/dts/nxp/imx/imx6qdl-mba6.dtsi
View file @ 8c5ce909
......@@ -500,21 +500,21 @@ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x001b0f0 /* #PCIE.DIS */
pinctrl_pwm1: pwm1grp {
fsl,pins = <
/* 100 k PD, DSE 120 OHM, SPPEED LO */
/* 100 k PD, DSE 120 OHM, SPEED LO */
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x00003050
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
/* 100 k PD, DSE 120 OHM, SPPEED LO */
/* 100 k PD, DSE 120 OHM, SPEED LO */
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x00003050
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
/* 100 k PD, DSE 120 OHM, SPPEED LO */
/* 100 k PD, DSE 120 OHM, SPEED LO */
MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x00003050
>;
};
......
arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu-revc.dtsi
View file @ 8c5ce909
......@@ -25,7 +25,7 @@ adc_ts: adc@0 {
compatible = "ti,tsc2046e-adc";
reg = <0>;
pinctrl-0 = <&pinctrl_touch>;
pinctrl-names ="default";
pinctrl-names = "default";
spi-max-frequency = <1000000>;
interrupts-extended = <&gpio3 19 IRQ_TYPE_LEVEL_LOW>;
#io-channel-cells = <1>;
......
arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi
View file @ 8c5ce909
......@@ -475,7 +475,7 @@ asrc: asrc@2034000 {
<&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
dma-names = "rxa", "rxb", "rxc",
"txa", "txb", "txc";
fsl,asrc-rate = <48000>;
fsl,asrc-rate = <48000>;
fsl,asrc-width = <16>;
status = "okay";
};
......
arch/arm/boot/dts/nxp/imx/imx6sx.dtsi
View file @ 8c5ce909
......@@ -418,7 +418,7 @@ asrc: asrc@2034000 {
<&sdma 21 23 1>, <&sdma 22 23 1>;
dma-names = "rxa", "rxb", "rxc",
"txa", "txb", "txc";
fsl,asrc-rate = <48000>;
fsl,asrc-rate = <48000>;
fsl,asrc-width = <16>;
status = "okay";
};
......@@ -1010,7 +1010,7 @@ usdhc1: mmc@2190000 {
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>;
status = "disabled";
};
......@@ -1024,7 +1024,7 @@ usdhc2: mmc@2194000 {
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>;
status = "disabled";
};
......@@ -1038,7 +1038,7 @@ usdhc3: mmc@2198000 {
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>;
status = "disabled";
};
......
arch/arm/boot/dts/nxp/imx/imx6ul.dtsi
View file @ 8c5ce909
......@@ -364,7 +364,7 @@ asrc: asrc@2034000 {
<&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
dma-names = "rxa", "rxb", "rxc",
"txa", "txb", "txc";
fsl,asrc-rate = <48000>;
fsl,asrc-rate = <48000>;
fsl,asrc-width = <16>;
status = "okay";
};
......
arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi
View file @ 8c5ce909
......@@ -128,11 +128,16 @@ vgen6_reg: vldo4 {
};
};
/* NXP SE97BTP with temperature sensor + eeprom */
/* LM75A temperature sensor, TQMa7x 01xx */
lm75a: temperature-sensor@48 {
compatible = "national,lm75a";
reg = <0x48>;
};
/* NXP SE97BTP with temperature sensor + eeprom, TQMa7x 02xx */
se97b: temperature-sensor-eeprom@1e {
compatible = "nxp,se97b", "jedec,jc-42.4-temp";
reg = <0x1e>;
status = "okay";
};
/* ST M24C64 */
......
arch/arm/boot/dts/nxp/imx/imx7d-colibri-emmc.dtsi
View file @ 8c5ce909
......@@ -11,6 +11,10 @@ aliases {
/* Required to properly pass MAC addresses from bootloader. */
ethernet0 = &fec1;
ethernet1 = &fec2;
mmc0 = &usdhc3; /* eMMC */
mmc1 = &usdhc1; /* MMC/SD slot */
/delete-property/ mmc2;
/delete-property/ mmc3;
};
memory@80000000 {
......
arch/arm/boot/dts/nxp/imx/imx7d-meerkat96.dts
View file @ 8c5ce909
......@@ -212,7 +212,7 @@ &usdhc3 {
keep-power-in-suspend;
wakeup-source;
vmmc-supply = <&reg_wlreg_on>;
vqmmc-supply =<&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
status = "okay";
brcmf: wifi@1 {
......
arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi
View file @ 8c5ce909
......@@ -108,6 +108,14 @@ &clks {
assigned-clock-rates = <0>, <32768>;
};
&cpu0 {
cpu-supply = <&sw1a_reg>;
};
&cpu1 {
cpu-supply = <&sw1a_reg>;
};
&ecspi3 {
cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
......
arch/arm/boot/dts/nxp/imx/imx7d-smegw01.dts
View file @ 8c5ce909
......@@ -149,7 +149,7 @@ &fec2 {
&i2c2 {
pinctrl-names = "default";
pinctrl-0 =<&pinctrl_i2c2>;
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
......
arch/arm/boot/dts/nxp/imx/imx7d.dtsi
View file @ 8c5ce909
......@@ -217,9 +217,6 @@ fec2: ethernet@30bf0000 {
};
&ca_funnel_in_ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
ca_funnel_in_port1: endpoint {
......
arch/arm/boot/dts/nxp/imx/imx7s.dtsi
View file @ 8c5ce909
......@@ -183,6 +183,15 @@ soc: soc {
interrupt-parent = <&gpc>;
ranges;
ocram: sram@900000 {
compatible = "mmio-sram";
reg = <0x00900000 0x20000>;
ranges = <0 0x00900000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&clks IMX7D_OCRAM_CLK>;
};
funnel@30041000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x30041000 0x1000>;
......@@ -190,7 +199,11 @@ funnel@30041000 {
clock-names = "apb_pclk";
ca_funnel_in_ports: in-ports {
port {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ca_funnel_in_port0: endpoint {
remote-endpoint = <&etm0_out_port>;
};
......@@ -605,6 +618,7 @@ tempmon: tempmon {
nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
nvmem-cell-names = "calib", "temp_grade";
clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>;
#thermal-sensor-cells = <0>;
};
};
......@@ -720,6 +734,8 @@ ecspi4: spi@30630000 {
clocks = <&clks IMX7D_ECSPI4_ROOT_CLK>,
<&clks IMX7D_ECSPI4_ROOT_CLK>;
clock-names = "ipg", "per";
dma-names = "rx", "tx";
dmas = <&sdma 6 7 1>, <&sdma 7 7 2>;
status = "disabled";
};
......@@ -811,13 +827,23 @@ csi_from_csi_mux: endpoint {
};
lcdif: lcdif@30730000 {
compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
compatible = "fsl,imx7d-lcdif", "fsl,imx6sx-lcdif";
reg = <0x30730000 0x10000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>,
<&clks IMX7D_LCDIF_PIXEL_ROOT_CLK>;
clock-names = "pix", "axi";
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
lcdif_out_mipi_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_dsi_in_lcdif>;
};
};
};
mipi_csi: mipi-csi@30750000 {
......@@ -850,6 +876,42 @@ mipi_vc0_to_csi_mux: endpoint {
};
};
};
mipi_dsi: dsi@30760000 {
compatible = "fsl,imx7d-mipi-dsim", "fsl,imx8mm-mipi-dsim";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x30760000 0x400>;
clocks = <&clks IMX7D_MIPI_DSI_ROOT_CLK>,
<&clks IMX7D_MIPI_DPHY_ROOT_CLK>;
clock-names = "bus_clk", "sclk_mipi";
assigned-clocks = <&clks IMX7D_MIPI_DSI_ROOT_SRC>,
<&clks IMX7D_PLL_SYS_PFD5_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_PFD5_CLK>;
assigned-clock-rates = <0>, <333000000>;
power-domains = <&pgc_mipi_phy>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
samsung,burst-clock-frequency = <891000000>;
samsung,esc-clock-frequency = <20000000>;
samsung,pll-clock-frequency = <24000000>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_dsi_in_lcdif: endpoint@0 {
reg = <0>;
remote-endpoint = <&lcdif_out_mipi_dsi>;
};
};
};
};
};
aips3: bus@30800000 {
......@@ -875,6 +937,8 @@ ecspi1: spi@30820000 {
clocks = <&clks IMX7D_ECSPI1_ROOT_CLK>,
<&clks IMX7D_ECSPI1_ROOT_CLK>;
clock-names = "ipg", "per";
dma-names = "rx", "tx";
dmas = <&sdma 0 7 1>, <&sdma 1 7 2>;
status = "disabled";
};
......@@ -887,6 +951,8 @@ ecspi2: spi@30830000 {
clocks = <&clks IMX7D_ECSPI2_ROOT_CLK>,
<&clks IMX7D_ECSPI2_ROOT_CLK>;
clock-names = "ipg", "per";
dma-names = "rx", "tx";
dmas = <&sdma 2 7 1>, <&sdma 3 7 2>;
status = "disabled";
};
......@@ -899,6 +965,8 @@ ecspi3: spi@30840000 {
clocks = <&clks IMX7D_ECSPI3_ROOT_CLK>,
<&clks IMX7D_ECSPI3_ROOT_CLK>;
clock-names = "ipg", "per";
dma-names = "rx", "tx";
dmas = <&sdma 4 7 1>, <&sdma 5 7 2>;
status = "disabled";
};
......@@ -1275,7 +1343,7 @@ dma_apbh: dma-controller@33000000 {
gpmi: nand-controller@33002000 {
compatible = "fsl,imx7d-gpmi-nand";
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
reg-names = "gpmi-nand", "bch";
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
......
arch/arm/boot/dts/nxp/imx/mba6ulx.dtsi
View file @ 8c5ce909
......@@ -467,7 +467,7 @@ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
pinctrl_pwm2: pwm2grp {
fsl,pins = <
/* 100 k PD, DSE 120 OHM, SPPEED LO */
/* 100 k PD, DSE 120 OHM, SPEED LO */
MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x00003050
>;
};
......
arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi
View file @ 8c5ce909
......@@ -74,7 +74,7 @@ soc {
sct_pwm: pwm@40000000 {
compatible = "nxp,lpc1850-sct-pwm";
reg = <0x40000000 0x1000>;
clocks =<&ccu1 CLK_CPU_SCT>;
clocks = <&ccu1 CLK_CPU_SCT>;
clock-names = "pwm";
resets = <&rgu 37>;
#pwm-cells = <3>;
......
arch/arm/boot/dts/nxp/ls/ls1021a.dtsi
View file @ 8c5ce909
......@@ -112,7 +112,7 @@ msi1: msi-controller@1570e00 {
compatible = "fsl,ls1021a-msi";
reg = <0x0 0x1570e00 0x0 0x8>;
msi-controller;
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
};
msi2: msi-controller@1570e08 {
......
arch/arm/boot/dts/nxp/mxs/imx23-sansa.dts
View file @ 8c5ce909
......@@ -175,10 +175,8 @@ i2c-0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
gpios = <
&gpio1 24 0 /* SDA */
&gpio1 22 0 /* SCL */
>;
sda-gpios = <&gpio1 24 0>;
scl-gpios = <&gpio1 22 0>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
};
......@@ -186,10 +184,8 @@ i2c-1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
gpios = <
&gpio0 31 0 /* SDA */
&gpio0 30 0 /* SCL */
>;
sda-gpios = <&gpio0 31 0>;
scl-gpios = <&gpio0 30 0>;
i2c-gpio,delay-us = <2>; /* ~100 kHz */
touch: touch@20 {
......
arch/arm/boot/dts/nxp/mxs/imx23.dtsi
View file @ 8c5ce909
......@@ -110,7 +110,7 @@ pinctrl@80018000 {
reg = <0x80018000 0x2000>;
gpio0: gpio@0 {
compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx23-gpio";
reg = <0>;
interrupts = <16>;
gpio-controller;
......@@ -120,7 +120,7 @@ gpio0: gpio@0 {
};
gpio1: gpio@1 {
compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx23-gpio";
reg = <1>;
interrupts = <17>;
gpio-controller;
......@@ -130,7 +130,7 @@ gpio1: gpio@1 {
};
gpio2: gpio@2 {
compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx23-gpio";
reg = <2>;
interrupts = <18>;
gpio-controller;
......@@ -412,7 +412,7 @@ emi@80020000 {
status = "disabled";
};
dma_apbx: dma-apbx@80024000 {
dma_apbx: dma-controller@80024000 {
compatible = "fsl,imx23-dma-apbx";
reg = <0x80024000 0x2000>;
interrupts = <7>, <5>, <9>, <26>,
......@@ -484,7 +484,7 @@ apbx@80040000 {
ranges;
clks: clkctrl@80040000 {
compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
compatible = "fsl,imx23-clkctrl";
reg = <0x80040000 0x2000>;
#clock-cells = <1>;
};
......
arch/arm/boot/dts/nxp/mxs/imx28-lwe.dtsi
View file @ 8c5ce909
......@@ -18,6 +18,7 @@ chosen {
memory@40000000 {
reg = <0x40000000 0x08000000>;
device_type = "memory";
};
reg_3v3: regulator-reg-3v3 {
......
arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts
View file @ 8c5ce909
......@@ -260,6 +260,7 @@ &i2c0 {
sgtl5000: sgtl5000@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_3p3v>;
clocks = <&mclk>;
......
arch/arm/boot/dts/nxp/mxs/imx28.dtsi
View file @ 8c5ce909
......@@ -164,7 +164,7 @@ pinctrl: pinctrl@80018000 {
reg = <0x80018000 0x2000>;
gpio0: gpio@0 {
compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx28-gpio";
reg = <0>;
interrupts = <127>;
gpio-controller;
......@@ -174,7 +174,7 @@ gpio0: gpio@0 {
};
gpio1: gpio@1 {
compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx28-gpio";
reg = <1>;
interrupts = <126>;
gpio-controller;
......@@ -184,7 +184,7 @@ gpio1: gpio@1 {
};
gpio2: gpio@2 {
compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx28-gpio";
reg = <2>;
interrupts = <125>;
gpio-controller;
......@@ -194,7 +194,7 @@ gpio2: gpio@2 {
};
gpio3: gpio@3 {
compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx28-gpio";
reg = <3>;
interrupts = <124>;
gpio-controller;
......@@ -204,7 +204,7 @@ gpio3: gpio@3 {
};
gpio4: gpio@4 {
compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
compatible = "fsl,imx28-gpio";
reg = <4>;
interrupts = <123>;
gpio-controller;
......@@ -990,7 +990,7 @@ etm: etm@80022000 {
status = "disabled";
};
dma_apbx: dma-apbx@80024000 {
dma_apbx: dma-controller@80024000 {
compatible = "fsl,imx28-dma-apbx";
reg = <0x80024000 0x2000>;
interrupts = <78>, <79>, <66>, <0>,
......@@ -1100,7 +1100,7 @@ apbx@80040000 {
ranges;
clks: clkctrl@80040000 {
compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
compatible = "fsl,imx28-clkctrl";
reg = <0x80040000 0x2000>;
#clock-cells = <1>;
};
......
arch/arm/boot/dts/nxp/vf/vf-colibri-eval-v3.dtsi
View file @ 8c5ce909
......@@ -55,7 +55,7 @@ &bl {
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
power-supply = <&reg_3v3>;
status = "okay";
status = "okay";
};
&dcu0 {
......
arch/arm/boot/dts/nxp/vf/vf610-bk4.dts
View file @ 8c5ce909
......@@ -68,7 +68,7 @@ spi {
#address-cells = <1>;
#size-cells = <0>;
/* PTD12 ->RPIO[91] */
sck-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
sck-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
/* PTD10 ->RPIO[89] */
miso-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
......@@ -79,7 +79,7 @@ gpio@0 {
gpio-controller;
#gpio-cells = <2>;
/* PTB18 -> RGPIO[40] */
load-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
load-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
spi-max-frequency = <100000>;
};
};
......
arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts
View file @ 8c5ce909
......@@ -162,7 +162,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
switch0: switch0@0 {
switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6085";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_switch>;
......@@ -173,26 +173,26 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
label = "eth_cu_1000_1";
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_2";
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "eth_cu_1000_3";
};
port@5 {
ethernet-port@5 {
reg = <5>;
label = "eth_fc_1000_1";
phy-mode = "1000base-x";
......@@ -200,7 +200,7 @@ port@5 {
sfp = <&sff>;
};
port@6 {
ethernet-port@6 {
reg = <6>;
phy-mode = "rmii";
ethernet = <&fec1>;
......
arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-b.dts
View file @ 8c5ce909
......@@ -294,11 +294,11 @@ spi-0 {
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
sck-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
miso-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW
&gpio1 8 GPIO_ACTIVE_HIGH>;
cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW
&gpio1 8 GPIO_ACTIVE_HIGH>;
num-chipselects = <2>;
flash@0 {
......
arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts
View file @ 8c5ce909
......@@ -47,17 +47,17 @@ mdio_mux_1: mdio@1 {
#address-cells = <1>;
#size-cells = <0>;
switch0: switch0@0 {
switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 0>;
eeprom-length = <65536>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
......@@ -68,37 +68,37 @@ fixed-link {
};
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "aib2main_1";
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "aib2main_2";
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "eth_cu_1000_5";
};
port@4 {
ethernet-port@4 {
reg = <4>;
label = "eth_cu_1000_6";
};
port@5 {
ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_4";
};
port@6 {
ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_7";
};
port@7 {
ethernet-port@7 {
reg = <7>;
label = "modem_pic";
......@@ -108,7 +108,7 @@ fixed-link {
};
};
switch0port10: port@10 {
switch0port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "xgmii";
......@@ -130,32 +130,32 @@ mdio_mux_2: mdio@2 {
#address-cells = <1>;
#size-cells = <0>;
switch1: switch1@0 {
switch1: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 1>;
eeprom-length = <65536>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_3";
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "eth_cu_100_2";
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "eth_cu_100_3";
};
switch1port9: port@9 {
switch1port9: ethernet-port@9 {
reg = <9>;
label = "dsa";
phy-mode = "xgmii";
......@@ -168,7 +168,7 @@ fixed-link {
};
};
switch1port10: port@10 {
switch1port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "xgmii";
......@@ -188,17 +188,17 @@ mdio_mux_4: mdio@4 {
#address-cells = <1>;
#size-cells = <0>;
switch2: switch2@0 {
switch2: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 2>;
eeprom-length = <65536>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
ethernet-port@2 {
reg = <2>;
label = "eth_fc_1000_2";
phy-mode = "1000base-x";
......@@ -206,7 +206,7 @@ port@2 {
sfp = <&sff1>;
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "eth_fc_1000_3";
phy-mode = "1000base-x";
......@@ -214,7 +214,7 @@ port@3 {
sfp = <&sff2>;
};
port@4 {
ethernet-port@4 {
reg = <4>;
label = "eth_fc_1000_4";
phy-mode = "1000base-x";
......@@ -222,7 +222,7 @@ port@4 {
sfp = <&sff3>;
};
port@5 {
ethernet-port@5 {
reg = <5>;
label = "eth_fc_1000_5";
phy-mode = "1000base-x";
......@@ -230,7 +230,7 @@ port@5 {
sfp = <&sff4>;
};
port@6 {
ethernet-port@6 {
reg = <6>;
label = "eth_fc_1000_6";
phy-mode = "1000base-x";
......@@ -238,7 +238,7 @@ port@6 {
sfp = <&sff5>;
};
port@7 {
ethernet-port@7 {
reg = <7>;
label = "eth_fc_1000_7";
phy-mode = "1000base-x";
......@@ -246,7 +246,7 @@ port@7 {
sfp = <&sff6>;
};
port@9 {
ethernet-port@9 {
reg = <9>;
label = "eth_fc_1000_1";
phy-mode = "1000base-x";
......@@ -254,7 +254,7 @@ port@9 {
sfp = <&sff0>;
};
switch2port10: port@10 {
switch2port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "2500base-x";
......@@ -276,17 +276,17 @@ mdio_mux_8: mdio@8 {
#address-cells = <1>;
#size-cells = <0>;
switch3: switch3@0 {
switch3: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 3>;
eeprom-length = <65536>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
ethernet-port@2 {
reg = <2>;
label = "eth_fc_1000_8";
phy-mode = "1000base-x";
......@@ -294,7 +294,7 @@ port@2 {
sfp = <&sff7>;
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "eth_fc_1000_9";
phy-mode = "1000base-x";
......@@ -302,7 +302,7 @@ port@3 {
sfp = <&sff8>;
};
port@4 {
ethernet-port@4 {
reg = <4>;
label = "eth_fc_1000_10";
phy-mode = "1000base-x";
......@@ -310,7 +310,7 @@ port@4 {
sfp = <&sff9>;
};
switch3port9: port@9 {
switch3port9: ethernet-port@9 {
reg = <9>;
label = "dsa";
phy-mode = "2500base-x";
......@@ -322,7 +322,7 @@ fixed-link {
};
};
switch3port10: port@10 {
switch3port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "xgmii";
......
arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts
View file @ 8c5ce909
......@@ -123,7 +123,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
switch0: switch0@0 {
switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch0>;
pinctrl-names = "default";
......@@ -134,11 +134,11 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
......@@ -149,32 +149,32 @@ fixed-link {
};
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_1";
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "eth_cu_1000_2";
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "eth_cu_1000_3";
};
port@4 {
ethernet-port@4 {
reg = <4>;
label = "eth_cu_1000_4";
};
port@5 {
ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_5";
};
port@6 {
ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_6";
};
......
arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts
View file @ 8c5ce909
......@@ -112,7 +112,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
switch0: switch0@0 {
switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch0>;
pinctrl-names = "default";
......@@ -123,11 +123,11 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
......@@ -138,27 +138,27 @@ fixed-link {
};
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "eth_cu_100_3";
};
port@5 {
ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_4";
};
port@6 {
ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_5";
};
port@8 {
ethernet-port@8 {
reg = <8>;
label = "eth_cu_1000_1";
};
port@9 {
ethernet-port@9 {
reg = <9>;
label = "eth_cu_1000_2";
phy-handle = <&phy9>;
......@@ -167,12 +167,12 @@ port@9 {
};
};
mdio1 {
mdio-external {
compatible = "marvell,mv88e6xxx-mdio-external";
#address-cells = <1>;
#size-cells = <0>;
phy9: phy9@0 {
phy9: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
pinctrl-0 = <&pinctrl_gpio_phy9>;
pinctrl-names = "default";
......
arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts
View file @ 8c5ce909
......@@ -137,7 +137,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
switch0: switch0@0 {
switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch0>;
pinctrl-names = "default";
......@@ -148,11 +148,11 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
ports {
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
......@@ -163,32 +163,32 @@ fixed-link {
};
};
port@1 {
ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_1";
};
port@2 {
ethernet-port@2 {
reg = <2>;
label = "eth_cu_1000_2";
};
port@3 {
ethernet-port@3 {
reg = <3>;
label = "eth_cu_1000_3";
};
port@4 {
ethernet-port@4 {
reg = <4>;
label = "eth_cu_1000_4";
};
port@5 {
ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_5";
};
port@6 {
ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_6";
};
......
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