Commit 8d0a88a9 authored by Todd Fujinaka's avatar Todd Fujinaka Committed by Jeff Kirsher

igb: disable IPv6 extension header processing

Disable IPv6 extension header processing as per hardware errata.

Also fix copyright date.
Signed-off-by: default avatarTodd Fujinaka <todd.fujinaka@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 011cb197
/* Intel(R) Gigabit Ethernet Linux driver /* Intel(R) Gigabit Ethernet Linux driver
* Copyright(c) 2007-2014 Intel Corporation. * Copyright(c) 2007-2015 Intel Corporation.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License, * under the terms and conditions of the GNU General Public License,
...@@ -1900,8 +1900,8 @@ static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw) ...@@ -1900,8 +1900,8 @@ static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw)
* igb_rx_fifo_flush_82575 - Clean rx fifo after RX enable * igb_rx_fifo_flush_82575 - Clean rx fifo after RX enable
* @hw: pointer to the HW structure * @hw: pointer to the HW structure
* *
* After rx enable if managability is enabled then there is likely some * After rx enable if manageability is enabled then there is likely some
* bad data at the start of the fifo and possibly in the DMA fifo. This * bad data at the start of the fifo and possibly in the DMA fifo. This
* function clears the fifos and flushes any packets that came in as rx was * function clears the fifos and flushes any packets that came in as rx was
* being enabled. * being enabled.
**/ **/
...@@ -1910,6 +1910,11 @@ void igb_rx_fifo_flush_82575(struct e1000_hw *hw) ...@@ -1910,6 +1910,11 @@ void igb_rx_fifo_flush_82575(struct e1000_hw *hw)
u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled; u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
int i, ms_wait; int i, ms_wait;
/* disable IPv6 options as per hardware errata */
rfctl = rd32(E1000_RFCTL);
rfctl |= E1000_RFCTL_IPV6_EX_DIS;
wr32(E1000_RFCTL, rfctl);
if (hw->mac.type != e1000_82575 || if (hw->mac.type != e1000_82575 ||
!(rd32(E1000_MANC) & E1000_MANC_RCV_TCO_EN)) !(rd32(E1000_MANC) & E1000_MANC_RCV_TCO_EN))
return; return;
...@@ -1937,7 +1942,6 @@ void igb_rx_fifo_flush_82575(struct e1000_hw *hw) ...@@ -1937,7 +1942,6 @@ void igb_rx_fifo_flush_82575(struct e1000_hw *hw)
* incoming packets are rejected. Set enable and wait 2ms so that * incoming packets are rejected. Set enable and wait 2ms so that
* any packet that was coming in as RCTL.EN was set is flushed * any packet that was coming in as RCTL.EN was set is flushed
*/ */
rfctl = rd32(E1000_RFCTL);
wr32(E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF); wr32(E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
rlpml = rd32(E1000_RLPML); rlpml = rd32(E1000_RLPML);
......
...@@ -344,7 +344,8 @@ ...@@ -344,7 +344,8 @@
#define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */ #define E1000_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */
/* Header split receive */ /* Header split receive */
#define E1000_RFCTL_LEF 0x00040000 #define E1000_RFCTL_IPV6_EX_DIS 0x00010000
#define E1000_RFCTL_LEF 0x00040000
/* Collision related configuration parameters */ /* Collision related configuration parameters */
#define E1000_COLLISION_THRESHOLD 15 #define E1000_COLLISION_THRESHOLD 15
......
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