Commit 8dd4a966 authored by Devendra Naga's avatar Devendra Naga Committed by Greg Kroah-Hartman

staging: et131x: fix invalid fail after the call to eeprom_wait_ready

should be err < 0 instead of if (err) which actually the read register
value can be a positive number
Acked-by: default avatarMark Einon <mark.einon@gmail.com>
Signed-off-by: default avatarDevendra Naga <devendra.aaru@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f165d815
...@@ -595,7 +595,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) ...@@ -595,7 +595,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data)
*/ */
err = eeprom_wait_ready(pdev, NULL); err = eeprom_wait_ready(pdev, NULL);
if (err) if (err < 0)
return err; return err;
/* 2. Write to the LBCIF Control Register: bit 7=1, bit 6=1, bit 3=0, /* 2. Write to the LBCIF Control Register: bit 7=1, bit 6=1, bit 3=0,
...@@ -709,7 +709,7 @@ static int eeprom_read(struct et131x_adapter *adapter, u32 addr, u8 *pdata) ...@@ -709,7 +709,7 @@ static int eeprom_read(struct et131x_adapter *adapter, u32 addr, u8 *pdata)
*/ */
err = eeprom_wait_ready(pdev, NULL); err = eeprom_wait_ready(pdev, NULL);
if (err) if (err < 0)
return err; return err;
/* Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0, /* Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0,
* and bits 1:0 both =0. Bit 5 should be set according to the type * and bits 1:0 both =0. Bit 5 should be set according to the type
......
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