Commit 8e35ac73 authored by Guo Ren's avatar Guo Ren

csky: Cleanup asm/spinlock.h

There are two implementation of spinlock in arch/csky:
 - simple one (NR_CPU = 1,2)
 - tick's one (NR_CPU = 3,4)
Remove the simple one.

There is already smp_mb in spinlock, so remove the definition of
smp_mb__after_spinlock.

Link: https://lore.kernel.org/linux-csky/20200807081253.GD2674@hirez.programming.kicks-ass.net/#tSigned-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
Cc: Peter Zijlstra <peterz@infradead.org>k
Cc: Arnd Bergmann <arnd@arndb.de>
parent c38425df
......@@ -7,7 +7,7 @@ config CSKY
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_WANT_FRAME_POINTERS if !CPU_CK610
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
select COMMON_CLK
......
......@@ -6,8 +6,6 @@
#include <linux/spinlock_types.h>
#include <asm/barrier.h>
#ifdef CONFIG_QUEUED_RWLOCKS
/*
* Ticket-based spin-locking.
*/
......@@ -88,169 +86,4 @@ static inline int arch_spin_is_contended(arch_spinlock_t *lock)
#include <asm/qrwlock.h>
/* See include/linux/spinlock.h */
#define smp_mb__after_spinlock() smp_mb()
#else /* CONFIG_QUEUED_RWLOCKS */
/*
* Test-and-set spin-locking.
*/
static inline void arch_spin_lock(arch_spinlock_t *lock)
{
u32 *p = &lock->lock;
u32 tmp;
asm volatile (
"1: ldex.w %0, (%1) \n"
" bnez %0, 1b \n"
" movi %0, 1 \n"
" stex.w %0, (%1) \n"
" bez %0, 1b \n"
: "=&r" (tmp)
: "r"(p)
: "cc");
smp_mb();
}
static inline void arch_spin_unlock(arch_spinlock_t *lock)
{
smp_mb();
WRITE_ONCE(lock->lock, 0);
}
static inline int arch_spin_trylock(arch_spinlock_t *lock)
{
u32 *p = &lock->lock;
u32 tmp;
asm volatile (
"1: ldex.w %0, (%1) \n"
" bnez %0, 2f \n"
" movi %0, 1 \n"
" stex.w %0, (%1) \n"
" bez %0, 1b \n"
" movi %0, 0 \n"
"2: \n"
: "=&r" (tmp)
: "r"(p)
: "cc");
if (!tmp)
smp_mb();
return !tmp;
}
#define arch_spin_is_locked(x) (READ_ONCE((x)->lock) != 0)
/*
* read lock/unlock/trylock
*/
static inline void arch_read_lock(arch_rwlock_t *lock)
{
u32 *p = &lock->lock;
u32 tmp;
asm volatile (
"1: ldex.w %0, (%1) \n"
" blz %0, 1b \n"
" addi %0, 1 \n"
" stex.w %0, (%1) \n"
" bez %0, 1b \n"
: "=&r" (tmp)
: "r"(p)
: "cc");
smp_mb();
}
static inline void arch_read_unlock(arch_rwlock_t *lock)
{
u32 *p = &lock->lock;
u32 tmp;
smp_mb();
asm volatile (
"1: ldex.w %0, (%1) \n"
" subi %0, 1 \n"
" stex.w %0, (%1) \n"
" bez %0, 1b \n"
: "=&r" (tmp)
: "r"(p)
: "cc");
}
static inline int arch_read_trylock(arch_rwlock_t *lock)
{
u32 *p = &lock->lock;
u32 tmp;
asm volatile (
"1: ldex.w %0, (%1) \n"
" blz %0, 2f \n"
" addi %0, 1 \n"
" stex.w %0, (%1) \n"
" bez %0, 1b \n"
" movi %0, 0 \n"
"2: \n"
: "=&r" (tmp)
: "r"(p)
: "cc");
if (!tmp)
smp_mb();
return !tmp;
}
/*
* write lock/unlock/trylock
*/
static inline void arch_write_lock(arch_rwlock_t *lock)
{
u32 *p = &lock->lock;
u32 tmp;
asm volatile (
"1: ldex.w %0, (%1) \n"
" bnez %0, 1b \n"
" subi %0, 1 \n"
" stex.w %0, (%1) \n"
" bez %0, 1b \n"
: "=&r" (tmp)
: "r"(p)
: "cc");
smp_mb();
}
static inline void arch_write_unlock(arch_rwlock_t *lock)
{
smp_mb();
WRITE_ONCE(lock->lock, 0);
}
static inline int arch_write_trylock(arch_rwlock_t *lock)
{
u32 *p = &lock->lock;
u32 tmp;
asm volatile (
"1: ldex.w %0, (%1) \n"
" bnez %0, 2f \n"
" subi %0, 1 \n"
" stex.w %0, (%1) \n"
" bez %0, 1b \n"
" movi %0, 0 \n"
"2: \n"
: "=&r" (tmp)
: "r"(p)
: "cc");
if (!tmp)
smp_mb();
return !tmp;
}
#endif /* CONFIG_QUEUED_RWLOCKS */
#endif /* __ASM_CSKY_SPINLOCK_H */
......@@ -22,16 +22,6 @@ typedef struct {
#define __ARCH_SPIN_LOCK_UNLOCKED { { 0 } }
#ifdef CONFIG_QUEUED_RWLOCKS
#include <asm-generic/qrwlock_types.h>
#else /* CONFIG_NR_CPUS > 2 */
typedef struct {
u32 lock;
} arch_rwlock_t;
#define __ARCH_RW_LOCK_UNLOCKED { 0 }
#endif /* CONFIG_QUEUED_RWLOCKS */
#endif /* __ASM_CSKY_SPINLOCK_TYPES_H */
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment