Commit 8e52a602 authored by Xi Wang's avatar Xi Wang Committed by David S. Miller

net: hns3: Optimize PF CMDQ interrupt switching process

When the PF frequently switches the CMDQ interrupt, if the CMDQ_SRC is
not cleared before the hardware interrupt is generated, the new interrupt
will not be reported.

This patch optimizes this problem by clearing CMDQ_SRC and RESET_STS
before enabling interrupt and syncing pending IRQ handlers after disabling
interrupt.

Fixes: 466b0c00 ("net: hns3: Add support for misc interrupt")
Signed-off-by: default avatarXi Wang <wangxi11@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarSalil Mehta <salil.mehta@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6444e2a5
...@@ -2557,6 +2557,15 @@ static void hclge_clear_event_cause(struct hclge_dev *hdev, u32 event_type, ...@@ -2557,6 +2557,15 @@ static void hclge_clear_event_cause(struct hclge_dev *hdev, u32 event_type,
} }
} }
static void hclge_clear_all_event_cause(struct hclge_dev *hdev)
{
hclge_clear_event_cause(hdev, HCLGE_VECTOR0_EVENT_RST,
BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) |
BIT(HCLGE_VECTOR0_CORERESET_INT_B) |
BIT(HCLGE_VECTOR0_IMPRESET_INT_B));
hclge_clear_event_cause(hdev, HCLGE_VECTOR0_EVENT_MBX, 0);
}
static void hclge_enable_vector(struct hclge_misc_vector *vector, bool enable) static void hclge_enable_vector(struct hclge_misc_vector *vector, bool enable)
{ {
writel(enable ? 1 : 0, vector->addr); writel(enable ? 1 : 0, vector->addr);
...@@ -5688,6 +5697,8 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) ...@@ -5688,6 +5697,8 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
INIT_WORK(&hdev->rst_service_task, hclge_reset_service_task); INIT_WORK(&hdev->rst_service_task, hclge_reset_service_task);
INIT_WORK(&hdev->mbx_service_task, hclge_mailbox_service_task); INIT_WORK(&hdev->mbx_service_task, hclge_mailbox_service_task);
hclge_clear_all_event_cause(hdev);
/* Enable MISC vector(vector0) */ /* Enable MISC vector(vector0) */
hclge_enable_vector(&hdev->misc_vector, true); hclge_enable_vector(&hdev->misc_vector, true);
...@@ -5817,6 +5828,8 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) ...@@ -5817,6 +5828,8 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev)
/* Disable MISC vector(vector0) */ /* Disable MISC vector(vector0) */
hclge_enable_vector(&hdev->misc_vector, false); hclge_enable_vector(&hdev->misc_vector, false);
synchronize_irq(hdev->misc_vector.vector_irq);
hclge_destroy_cmd_queue(&hdev->hw); hclge_destroy_cmd_queue(&hdev->hw);
hclge_misc_irq_uninit(hdev); hclge_misc_irq_uninit(hdev);
hclge_pci_uninit(hdev); hclge_pci_uninit(hdev);
......
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