Commit 8e8c09c7 authored by Bo Jiao's avatar Bo Jiao Committed by Felix Fietkau

wifi: mt76: mt7996: disable WFDMA Tx/Rx during SER recovery

Stop WFDMA transaction to avoid potential unexpected issue while doing
system recovery.
Signed-off-by: default avatarBo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: default avatarRyder Lee <ryder.lee@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent 1e64fdd4
...@@ -128,11 +128,55 @@ static void mt7996_dma_disable(struct mt7996_dev *dev, bool reset) ...@@ -128,11 +128,55 @@ static void mt7996_dma_disable(struct mt7996_dev *dev, bool reset)
} }
} }
static int mt7996_dma_enable(struct mt7996_dev *dev) void mt7996_dma_start(struct mt7996_dev *dev, bool reset)
{ {
u32 hif1_ofs = 0; u32 hif1_ofs = 0;
u32 irq_mask; u32 irq_mask;
if (dev->hif2)
hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
/* enable WFDMA Tx/Rx */
if (!reset) {
mt76_set(dev, MT_WFDMA0_GLO_CFG,
MT_WFDMA0_GLO_CFG_TX_DMA_EN |
MT_WFDMA0_GLO_CFG_RX_DMA_EN |
MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
if (dev->hif2)
mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,
MT_WFDMA0_GLO_CFG_TX_DMA_EN |
MT_WFDMA0_GLO_CFG_RX_DMA_EN |
MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
}
/* enable interrupts for TX/RX rings */
irq_mask = MT_INT_MCU_CMD;
if (reset)
goto done;
irq_mask = MT_INT_RX_DONE_MCU | MT_INT_TX_DONE_MCU;
if (!dev->mphy.band_idx)
irq_mask |= MT_INT_BAND0_RX_DONE;
if (dev->dbdc_support)
irq_mask |= MT_INT_BAND1_RX_DONE;
if (dev->tbtc_support)
irq_mask |= MT_INT_BAND2_RX_DONE;
done:
mt7996_irq_enable(dev, irq_mask);
mt7996_irq_disable(dev, 0);
}
static void mt7996_dma_enable(struct mt7996_dev *dev, bool reset)
{
u32 hif1_ofs = 0;
if (dev->hif2) if (dev->hif2)
hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
...@@ -170,13 +214,6 @@ static int mt7996_dma_enable(struct mt7996_dev *dev) ...@@ -170,13 +214,6 @@ static int mt7996_dma_enable(struct mt7996_dev *dev)
mt76_poll(dev, MT_WFDMA_EXT_CSR_HIF_MISC, mt76_poll(dev, MT_WFDMA_EXT_CSR_HIF_MISC,
MT_WFDMA_EXT_CSR_HIF_MISC_BUSY, 0, 1000); MT_WFDMA_EXT_CSR_HIF_MISC_BUSY, 0, 1000);
/* set WFDMA Tx/Rx */
mt76_set(dev, MT_WFDMA0_GLO_CFG,
MT_WFDMA0_GLO_CFG_TX_DMA_EN |
MT_WFDMA0_GLO_CFG_RX_DMA_EN |
MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
/* GLO_CFG_EXT0 */ /* GLO_CFG_EXT0 */
mt76_set(dev, WF_WFDMA0_GLO_CFG_EXT0, mt76_set(dev, WF_WFDMA0_GLO_CFG_EXT0,
WF_WFDMA0_GLO_CFG_EXT0_RX_WB_RXD | WF_WFDMA0_GLO_CFG_EXT0_RX_WB_RXD |
...@@ -187,12 +224,6 @@ static int mt7996_dma_enable(struct mt7996_dev *dev) ...@@ -187,12 +224,6 @@ static int mt7996_dma_enable(struct mt7996_dev *dev)
WF_WFDMA0_GLO_CFG_EXT1_TX_FCTRL_MODE); WF_WFDMA0_GLO_CFG_EXT1_TX_FCTRL_MODE);
if (dev->hif2) { if (dev->hif2) {
mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,
MT_WFDMA0_GLO_CFG_TX_DMA_EN |
MT_WFDMA0_GLO_CFG_RX_DMA_EN |
MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
/* GLO_CFG_EXT0 */ /* GLO_CFG_EXT0 */
mt76_set(dev, WF_WFDMA0_GLO_CFG_EXT0 + hif1_ofs, mt76_set(dev, WF_WFDMA0_GLO_CFG_EXT0 + hif1_ofs,
WF_WFDMA0_GLO_CFG_EXT0_RX_WB_RXD | WF_WFDMA0_GLO_CFG_EXT0_RX_WB_RXD |
...@@ -216,23 +247,7 @@ static int mt7996_dma_enable(struct mt7996_dev *dev) ...@@ -216,23 +247,7 @@ static int mt7996_dma_enable(struct mt7996_dev *dev)
/* TODO: redirect rx ring6 interrupt to pcie0 for wed function */ /* TODO: redirect rx ring6 interrupt to pcie0 for wed function */
} }
/* enable interrupts for TX/RX rings */ mt7996_dma_start(dev, reset);
irq_mask = MT_INT_RX_DONE_MCU |
MT_INT_TX_DONE_MCU |
MT_INT_MCU_CMD;
if (!dev->mphy.band_idx)
irq_mask |= MT_INT_BAND0_RX_DONE;
if (dev->dbdc_support)
irq_mask |= MT_INT_BAND1_RX_DONE;
if (dev->tbtc_support)
irq_mask |= MT_INT_BAND2_RX_DONE;
mt7996_irq_enable(dev, irq_mask);
return 0;
} }
int mt7996_dma_init(struct mt7996_dev *dev) int mt7996_dma_init(struct mt7996_dev *dev)
...@@ -347,7 +362,7 @@ int mt7996_dma_init(struct mt7996_dev *dev) ...@@ -347,7 +362,7 @@ int mt7996_dma_init(struct mt7996_dev *dev)
mt7996_poll_tx); mt7996_poll_tx);
napi_enable(&dev->mt76.tx_napi); napi_enable(&dev->mt76.tx_napi);
mt7996_dma_enable(dev); mt7996_dma_enable(dev, false);
return 0; return 0;
} }
...@@ -413,7 +428,7 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) ...@@ -413,7 +428,7 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
mt76_for_each_q_rx(&dev->mt76, i) mt76_for_each_q_rx(&dev->mt76, i)
mt76_queue_rx_reset(dev, i); mt76_queue_rx_reset(dev, i);
mt7996_dma_enable(dev); mt7996_dma_enable(dev, !force);
} }
void mt7996_dma_cleanup(struct mt7996_dev *dev) void mt7996_dma_cleanup(struct mt7996_dev *dev)
......
...@@ -2051,6 +2051,12 @@ void mt7996_mac_reset_work(struct work_struct *work) ...@@ -2051,6 +2051,12 @@ void mt7996_mac_reset_work(struct work_struct *work)
mt7996_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE); mt7996_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE);
} }
mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
mt7996_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
/* enable DMA Tx/Tx and interrupt */
mt7996_dma_start(dev, false);
clear_bit(MT76_MCU_RESET, &dev->mphy.state); clear_bit(MT76_MCU_RESET, &dev->mphy.state);
clear_bit(MT76_RESET, &dev->mphy.state); clear_bit(MT76_RESET, &dev->mphy.state);
if (phy2) if (phy2)
...@@ -2067,9 +2073,6 @@ void mt7996_mac_reset_work(struct work_struct *work) ...@@ -2067,9 +2073,6 @@ void mt7996_mac_reset_work(struct work_struct *work)
tasklet_schedule(&dev->mt76.irq_tasklet); tasklet_schedule(&dev->mt76.irq_tasklet);
mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
mt7996_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
mt76_worker_enable(&dev->mt76.tx_worker); mt76_worker_enable(&dev->mt76.tx_worker);
local_bh_disable(); local_bh_disable();
......
...@@ -351,6 +351,7 @@ int mt7996_dma_init(struct mt7996_dev *dev); ...@@ -351,6 +351,7 @@ int mt7996_dma_init(struct mt7996_dev *dev);
void mt7996_dma_reset(struct mt7996_dev *dev, bool force); void mt7996_dma_reset(struct mt7996_dev *dev, bool force);
void mt7996_dma_prefetch(struct mt7996_dev *dev); void mt7996_dma_prefetch(struct mt7996_dev *dev);
void mt7996_dma_cleanup(struct mt7996_dev *dev); void mt7996_dma_cleanup(struct mt7996_dev *dev);
void mt7996_dma_start(struct mt7996_dev *dev, bool reset);
void mt7996_init_txpower(struct mt7996_dev *dev, void mt7996_init_txpower(struct mt7996_dev *dev,
struct ieee80211_supported_band *sband); struct ieee80211_supported_band *sband);
int mt7996_txbf_init(struct mt7996_dev *dev); int mt7996_txbf_init(struct mt7996_dev *dev);
......
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