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Commit 8f2f74b4 authored by Palmer Dabbelt's avatar Palmer Dabbelt
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RISC-V: Canaan devicetree fixes 

This series should rid us of dtbs_check errors for the RISC-V Canaan
k210 based boards. To make keeping it that way a little easier, I
changed the Canaan devicetree Makefile so that it would build all of the
devicetrees in the directory if SOC_CANAAN.

Link: https://lore.kernel.org/all/mhng-85044754-c361-40bc-a6a2-7082f35930bb@palmer-ri-x1c9/

* remotes/palmer/riscv-canaan_dt_schema:
  riscv: dts: canaan: build all devicetress if SOC_CANAAN
  riscv: dts: canaan: add specific compatible for kd233's LCD
  riscv: dts: canaan: fix bus {ranges,reg} warnings
  riscv: dts: canaan: remove spi-max-frequency from controllers
  riscv: dts: canaan: use custom compatible for k210 i2s
  riscv: dts: canaan: fix kd233 display spi frequency
  riscv: dts: canaan: fix mmc node names
  riscv: dts: canaan: fix the k210's timer nodes
  riscv: dts: canaan: fix the k210's memory node
  dt-bindings: memory-controllers: add canaan k210 sram controller
  dt-bindings: display: ili9341: document canaan kd233's lcd
  dt-bindings: display: convert ilitek,ili9341.txt to dt-schema
parents c08b4848 0ed04813
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Showing with 153 additions and 72 deletions
Documentation/devicetree/bindings/display/ilitek,ili9341.txt deleted 100644 → 0
View file @ c08b4848
Ilitek ILI9341 display panels
This binding is for display panels using an Ilitek ILI9341 controller in SPI
mode.
Required properties:
- compatible: "adafruit,yx240qv29", "ilitek,ili9341"
- dc-gpios: D/C pin
- reset-gpios: Reset pin
The node for this driver must be a child node of a SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.
Optional properties:
- rotation: panel rotation in degrees counter clockwise (0,90,180,270)
- backlight: phandle of the backlight device attached to the panel
Example:
display@0{
compatible = "adafruit,yx240qv29", "ilitek,ili9341";
reg = <0>;
spi-max-frequency = <32000000>;
dc-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
rotation = <270>;
backlight = <&backlight>;
};
Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml
View file @ 8f2f74b4
......@@ -21,8 +21,10 @@ properties:
compatible:
items:
- enum:
- adafruit,yx240qv29
# ili9341 240*320 Color on stm32f429-disco board
- st,sf-tc240t-9370-t
- canaan,kd233-tft
- const: ilitek,ili9341
reg: true
......@@ -47,31 +49,50 @@ properties:
vddi-led-supply:
description: Voltage supply for the LED driver (1.65 .. 3.3 V)
additionalProperties: false
unevaluatedProperties: false
required:
- compatible
- reg
- dc-gpios
- port
if:
properties:
compatible:
contains:
enum:
- st,sf-tc240t-9370-t
then:
required:
- port
examples:
- |+
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
panel: display@0 {
compatible = "st,sf-tc240t-9370-t",
"ilitek,ili9341";
reg = <0>;
spi-3wire;
spi-max-frequency = <10000000>;
dc-gpios = <&gpiod 13 0>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
compatible = "st,sf-tc240t-9370-t",
"ilitek,ili9341";
reg = <0>;
spi-3wire;
spi-max-frequency = <10000000>;
dc-gpios = <&gpiod 13 0>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
display@1{
compatible = "adafruit,yx240qv29", "ilitek,ili9341";
reg = <1>;
spi-max-frequency = <10000000>;
dc-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
rotation = <270>;
backlight = <&backlight>;
};
};
...
Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml 0 → 100644
View file @ 8f2f74b4
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Canaan K210 SRAM memory controller
description:
The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB
of SRAM. The controller is initialised by the bootloader, which configures
its clocks, before OS bringup.
maintainers:
- Conor Dooley <conor@kernel.org>
properties:
compatible:
enum:
- canaan,k210-sram
clocks:
minItems: 1
items:
- description: sram0 clock
- description: sram1 clock
- description: aisram clock
clock-names:
minItems: 1
items:
- const: sram0
- const: sram1
- const: aisram
required:
- compatible
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/k210-clk.h>
memory-controller {
compatible = "canaan,k210-sram";
clocks = <&sysclk K210_CLK_SRAM0>,
<&sysclk K210_CLK_SRAM1>,
<&sysclk K210_CLK_AI>;
clock-names = "sram0", "sram1", "aisram";
};
arch/riscv/boot/dts/canaan/Makefile
View file @ 8f2f74b4
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))
obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .o, $(dtb-y))
dtb-$(CONFIG_SOC_CANAAN) += canaan_kd233.dtb
dtb-$(CONFIG_SOC_CANAAN) += k210_generic.dtb
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_bit.dtb
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_dock.dtb
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_go.dtb
dtb-$(CONFIG_SOC_CANAAN) += sipeed_maixduino.dtb
obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE))
arch/riscv/boot/dts/canaan/canaan_kd233.dts
View file @ 8f2f74b4
......@@ -127,10 +127,10 @@ &spi0 {
cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
panel@0 {
compatible = "ilitek,ili9341";
compatible = "canaan,kd233-tft", "ilitek,ili9341";
reg = <0>;
dc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <15000000>;
spi-max-frequency = <10000000>;
status = "disabled";
};
};
......@@ -142,7 +142,7 @@ &spi1 {
cs-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
status = "okay";
slot@0 {
mmc@0 {
compatible = "mmc-spi-slot";
reg = <0>;
voltage-ranges = <3300 3300>;
......
arch/riscv/boot/dts/canaan/k210.dtsi
View file @ 8f2f74b4
......@@ -81,11 +81,13 @@ core1 {
sram: memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x400000>, /* sram0 4 MiB */
<0x80400000 0x200000>, /* sram1 2 MiB */
<0x80600000 0x200000>; /* aisram 2 MiB */
};
sram_controller: memory-controller {
compatible = "canaan,k210-sram";
reg = <0x80000000 0x400000>,
<0x80400000 0x200000>,
<0x80600000 0x200000>;
reg-names = "sram0", "sram1", "aisram";
clocks = <&sysclk K210_CLK_SRAM0>,
<&sysclk K210_CLK_SRAM1>,
<&sysclk K210_CLK_AI>;
......@@ -173,7 +175,7 @@ apb0: bus@50200000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-pm-bus";
ranges;
ranges = <0x50200000 0x50200000 0x200000>;
clocks = <&sysclk K210_CLK_APB0>;
gpio1: gpio@50200000 {
......@@ -261,7 +263,7 @@ spi2: spi@50240000 {
};
i2s0: i2s@50250000 {
compatible = "snps,designware-i2s";
compatible = "canaan,k210-i2s", "snps,designware-i2s";
reg = <0x50250000 0x200>;
interrupts = <5>;
clocks = <&sysclk K210_CLK_I2S0>;
......@@ -270,7 +272,7 @@ i2s0: i2s@50250000 {
};
i2s1: i2s@50260000 {
compatible = "snps,designware-i2s";
compatible = "canaan,k210-i2s", "snps,designware-i2s";
reg = <0x50260000 0x200>;
interrupts = <6>;
clocks = <&sysclk K210_CLK_I2S1>;
......@@ -279,7 +281,7 @@ i2s1: i2s@50260000 {
};
i2s2: i2s@50270000 {
compatible = "snps,designware-i2s";
compatible = "canaan,k210-i2s", "snps,designware-i2s";
reg = <0x50270000 0x200>;
interrupts = <7>;
clocks = <&sysclk K210_CLK_I2S2>;
......@@ -329,28 +331,58 @@ fpioa: pinmux@502b0000 {
timer0: timer@502d0000 {
compatible = "snps,dw-apb-timer";
reg = <0x502D0000 0x100>;
interrupts = <14>, <15>;
reg = <0x502D0000 0x14>;
interrupts = <14>;
clocks = <&sysclk K210_CLK_TIMER0>,
<&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER0>;
};
timer1: timer@502e0000 {
timer1: timer@502d0014 {
compatible = "snps,dw-apb-timer";
reg = <0x502D0014 0x14>;
interrupts = <15>;
clocks = <&sysclk K210_CLK_TIMER0>,
<&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER0>;
};
timer2: timer@502e0000 {
compatible = "snps,dw-apb-timer";
reg = <0x502E0000 0x14>;
interrupts = <16>;
clocks = <&sysclk K210_CLK_TIMER1>,
<&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER1>;
};
timer3: timer@502e0014 {
compatible = "snps,dw-apb-timer";
reg = <0x502E0000 0x100>;
interrupts = <16>, <17>;
reg = <0x502E0014 0x114>;
interrupts = <17>;
clocks = <&sysclk K210_CLK_TIMER1>,
<&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER1>;
};
timer2: timer@502f0000 {
timer4: timer@502f0000 {
compatible = "snps,dw-apb-timer";
reg = <0x502F0000 0x100>;
interrupts = <18>, <19>;
reg = <0x502F0000 0x14>;
interrupts = <18>;
clocks = <&sysclk K210_CLK_TIMER2>,
<&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
resets = <&sysrst K210_RST_TIMER2>;
};
timer5: timer@502f0014 {
compatible = "snps,dw-apb-timer";
reg = <0x502F0014 0x14>;
interrupts = <19>;
clocks = <&sysclk K210_CLK_TIMER2>,
<&sysclk K210_CLK_APB0>;
clock-names = "timer", "pclk";
......@@ -362,7 +394,7 @@ apb1: bus@50400000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-pm-bus";
ranges;
ranges = <0x50400000 0x50400000 0x40100>;
clocks = <&sysclk K210_CLK_APB1>;
wdt0: watchdog@50400000 {
......@@ -417,7 +449,7 @@ apb2: bus@52000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-pm-bus";
ranges;
ranges = <0x52000000 0x52000000 0x2000200>;
clocks = <&sysclk K210_CLK_APB2>;
spi0: spi@52000000 {
......@@ -431,7 +463,6 @@ spi0: spi@52000000 {
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI0>;
reset-names = "spi";
spi-max-frequency = <25000000>;
num-cs = <4>;
reg-io-width = <4>;
};
......@@ -447,7 +478,6 @@ spi1: spi@53000000 {
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI1>;
reset-names = "spi";
spi-max-frequency = <25000000>;
num-cs = <4>;
reg-io-width = <4>;
};
......@@ -463,8 +493,7 @@ spi3: spi@54000000 {
clock-names = "ssi_clk", "pclk";
resets = <&sysrst K210_RST_SPI3>;
reset-names = "spi";
/* Could possibly go up to 200 MHz */
spi-max-frequency = <100000000>;
num-cs = <4>;
reg-io-width = <4>;
};
......
arch/riscv/boot/dts/canaan/sipeed_maix_bit.dts
View file @ 8f2f74b4
......@@ -189,7 +189,7 @@ &spi1 {
cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
status = "okay";
slot@0 {
mmc@0 {
compatible = "mmc-spi-slot";
reg = <0>;
voltage-ranges = <3300 3300>;
......
arch/riscv/boot/dts/canaan/sipeed_maix_dock.dts
View file @ 8f2f74b4
......@@ -191,7 +191,7 @@ &spi1 {
cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
status = "okay";
slot@0 {
mmc@0 {
compatible = "mmc-spi-slot";
reg = <0>;
voltage-ranges = <3300 3300>;
......
arch/riscv/boot/dts/canaan/sipeed_maix_go.dts
View file @ 8f2f74b4
......@@ -199,7 +199,7 @@ &spi1 {
cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
status = "okay";
slot@0 {
mmc@0 {
compatible = "mmc-spi-slot";
reg = <0>;
voltage-ranges = <3300 3300>;
......
arch/riscv/boot/dts/canaan/sipeed_maixduino.dts
View file @ 8f2f74b4
......@@ -164,7 +164,7 @@ &spi1 {
cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>;
status = "okay";
slot@0 {
mmc@0 {
compatible = "mmc-spi-slot";
reg = <0>;
voltage-ranges = <3300 3300>;
......
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