drm/amd/display: Remove legacy code in DC

This commit just remove some trivial legacy code in some of the DC
files.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

@@ -762,23 +762,11 @@ void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param
 				break;
 			}
 		}
-		// Ported from DCN315
-		if (clk_table->num_entries == 1) {
-			/*smu gives one DPM level, let's take the highest one*/
-			closest_clk_lvl = dcn3_16_soc.num_states - 1;
-		}
 
 		s[i].state = i;
 
 		/* Clocks dependent on voltage level. */
 		s[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz;
-		if (clk_table->num_entries == 1 &&
-		    s[i].dcfclk_mhz <
-		    dcn3_16_soc.clock_limits[closest_clk_lvl].dcfclk_mhz) {
-			/*SMU fix not released yet*/
-			s[i].dcfclk_mhz =
-				dcn3_16_soc.clock_limits[closest_clk_lvl].dcfclk_mhz;
-		}
 		s[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz;
 		s[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
 		s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz *

drivers/gpu/drm/amd/display/dc/hwss/Makefile

@@ -110,10 +110,6 @@ AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN21)
 
 ###############################################################################
 
-###############################################################################
-
-###############################################################################
-
 HWSS_DCN30 = dcn30_hwseq.o dcn30_init.o
 
 AMD_DAL_HWSS_DCN30 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn30/,$(HWSS_DCN30))
@@ -188,8 +184,6 @@ AMD_DISPLAY_FILES += $(AMD_DAL_HWSS_DCN351)
 
 ###############################################################################
 
-###############################################################################
-
 HWSS_DCN401 = dcn401_hwseq.o dcn401_init.o
 
 AMD_DAL_HWSS_DCN401 = $(addprefix $(AMDDALPATH)/dc/hwss/dcn401/,$(HWSS_DCN401))

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

@@ -27,7 +27,7 @@
 #define __DC_HWSS_DCN30_H__
 
 #include "hw_sequencer_private.h"
-#include "dcn20/dcn20_hwseq.h"
+
 struct dc;
 
 void dcn30_init_hw(struct dc *dc);

drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

@@ -53,9 +53,6 @@ static const struct hw_sequencer_funcs dcn301_funcs = {
 	.enable_stream = dcn20_enable_stream,
 	.disable_stream = dce110_disable_stream,
 	.unblank_stream = dcn20_unblank_stream,
-#ifdef FREESYNC_POWER_OPTIMIZE
-	.are_streams_coarse_grain_aligned = dcn20_are_streams_coarse_grain_aligned,
-#endif
 	.blank_stream = dce110_blank_stream,
 	.enable_audio_stream = dce110_enable_audio_stream,
 	.disable_audio_stream = dce110_disable_audio_stream,

drivers/gpu/drm/amd/display/dc/os_types.h

@@ -29,8 +29,6 @@
 
 #include <linux/slab.h>
 #include <linux/kgdb.h>
-#include <linux/kref.h>
-#include <linux/types.h>
 #include <linux/delay.h>
 #include <linux/mm.h>